mirror of
https://github.com/Zeal-Operating-System/ZealOS.git
synced 2024-12-25 15:10:28 +00:00
Merge branch 'master' into network-loopback
This commit is contained in:
TomAwezome
GitHub
commit
9f3f051762
9 changed files with 157 additions and 72 deletions
|
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@ -24,9 +24,12 @@ TMPISODIR="$TMPDIR/iso"
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|||
TMPDISK="$TMPDIR/ZealOS.raw"
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||||
TMPMOUNT="$TMPDIR/mnt"
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||||
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||||
# Change this if your default QEMU version does not work and you have installed a different version elsewhere.
|
||||
QEMU_BIN_PATH=$(dirname "$(which qemu-system-x86_64)")
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||||
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||||
mount_tempdisk() {
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||||
sudo modprobe nbd
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||||
sudo qemu-nbd -c /dev/nbd0 -f raw $TMPDISK
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sudo $QEMU_BIN_PATH/qemu-nbd -c /dev/nbd0 -f raw $TMPDISK
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sudo partprobe /dev/nbd0
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sudo mount /dev/nbd0p1 $TMPMOUNT
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}
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@ -34,7 +37,7 @@ mount_tempdisk() {
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umount_tempdisk() {
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sync
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sudo umount $TMPMOUNT
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sudo qemu-nbd -d /dev/nbd0
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sudo $QEMU_BIN_PATH/qemu-nbd -d /dev/nbd0
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}
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[ ! -d $TMPMOUNT ] && mkdir -p $TMPMOUNT
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@ -46,8 +49,8 @@ echo "Building ZealBooter..."
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set +e
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echo "Making temp vdisk, running auto-install ..."
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qemu-img create -f raw $TMPDISK 1024M
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qemu-system-x86_64 -machine q35,accel=kvm -drive format=raw,file=$TMPDISK -m 1G -rtc base=localtime -smp 4 -cdrom AUTO.ISO -device isa-debug-exit
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$QEMU_BIN_PATH/qemu-img create -f raw $TMPDISK 1024M
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$QEMU_BIN_PATH/qemu-system-x86_64 -machine q35,accel=kvm -drive format=raw,file=$TMPDISK -m 1G -rtc base=localtime -smp 4 -cdrom AUTO.ISO -device isa-debug-exit
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echo "Copying all src/ code into vdisk Tmp/OSBuild/ ..."
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rm ../src/Home/Registry.ZC 2> /dev/null
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@ -59,7 +62,7 @@ sudo cp -r ../src/* $TMPMOUNT/Tmp/OSBuild
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umount_tempdisk
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echo "Rebuilding kernel headers, kernel, OS, and building Distro ISO ..."
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qemu-system-x86_64 -machine q35,accel=kvm -drive format=raw,file=$TMPDISK -m 1G -rtc base=localtime -smp 4 -device isa-debug-exit
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$QEMU_BIN_PATH/qemu-system-x86_64 -machine q35,accel=kvm -drive format=raw,file=$TMPDISK -m 1G -rtc base=localtime -smp 4 -device isa-debug-exit
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LIMINE_BINARY_BRANCH="v4.x-branch-binary"
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@ -128,11 +131,11 @@ if [ "$TESTING" = true ]; then
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cd ..
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fi
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echo "Testing limine-zealbooter-xorriso isohybrid boot in UEFI mode ..."
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qemu-system-x86_64 -machine q35,accel=kvm -m 1G -rtc base=localtime -bios ovmf/OVMF.fd -smp 4 -cdrom ZealOS-limine.iso
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$QEMU_BIN_PATH/qemu-system-x86_64 -machine q35,accel=kvm -m 1G -rtc base=localtime -bios ovmf/OVMF.fd -smp 4 -cdrom ZealOS-limine.iso
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echo "Testing limine-zealbooter-xorriso isohybrid boot in BIOS mode ..."
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qemu-system-x86_64 -machine q35,accel=kvm -m 1G -rtc base=localtime -smp 4 -cdrom ZealOS-limine.iso
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$QEMU_BIN_PATH/qemu-system-x86_64 -machine q35,accel=kvm -m 1G -rtc base=localtime -smp 4 -cdrom ZealOS-limine.iso
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echo "Testing native ZealC MyDistro legacy ISO in BIOS mode ..."
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qemu-system-x86_64 -machine q35,accel=kvm -m 1G -rtc base=localtime -smp 4 -cdrom ZealOS-MyDistro.iso
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$QEMU_BIN_PATH/qemu-system-x86_64 -machine q35,accel=kvm -m 1G -rtc base=localtime -smp 4 -cdrom ZealOS-MyDistro.iso
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fi
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# comment these 2 lines if you want lingering old Distro ISOs
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@ -11,6 +11,9 @@ SCRIPT_DIR=$(realpath "$(dirname "$0")")
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SCRIPT_NAME=$(basename "$0")
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EXPECTED_DIR=$(realpath "$PWD")
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|
||||
# Change this if your default QEMU version does not work and you have installed a different version elsewhere.
|
||||
QEMU_BIN_PATH=$(dirname "$(which qemu-system-x86_64)")
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||||
|
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if test "${EXPECTED_DIR}" != "${SCRIPT_DIR}"
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then
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( cd "$SCRIPT_DIR" || exit ; "./$SCRIPT_NAME" "$@" );
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||||
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@ -50,7 +53,7 @@ print_usage() {
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mount_vdisk() {
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echo "Mounting virtual disk..."
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||||
sudo qemu-nbd -c /dev/nbd0 "$ZEALDISK"
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sudo $QEMU_BIN_PATH/qemu-nbd -c /dev/nbd0 "$ZEALDISK"
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||||
sudo partprobe /dev/nbd0
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sudo mount /dev/nbd0p1 $TMPMOUNT
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}
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@ -59,7 +62,7 @@ umount_vdisk() {
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echo "Unmounting virtual disk..."
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||||
sync
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sudo umount $TMPMOUNT
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sudo qemu-nbd -d /dev/nbd0
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||||
sudo $QEMU_BIN_PATH/qemu-nbd -d /dev/nbd0
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sudo rm -rf $TMPMOUNT
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}
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|
||||
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@ -1,4 +1,8 @@
|
|||
$WW,1$$FG,5$$TX+CX,"ChangeLog"$$FG$
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$IV,1$----12/21/22 03:38:35----$IV,0$
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||||
* Raised version number to 2.01.
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* Created $LK+PU,"FreeAll",A="MN:FreeAll"$ method to /Kernel/Memory/MAllocFree.ZC and extern to $LK+PU,"/Kernel/KernelC.HH",A="FF:::/Kernel/KernelC.HH,FreeAll"$.
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||||
|
||||
$IV,1$----11/02/22 20:26:55----$IV,0$
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||||
* Raised version number to 2.00.
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||||
* Updated the $LK,"Charter",A="FI:::/Doc/Charter.DD"$ to allow non-Public-Domain MBR/UEFI bootloaders, as long as the Public Domain ZealOS HDD/DVD Boot Loaders are included, offered, and functional. The Charter upholds that all operating system code must still be 100% public domain. Updated $LK+PU,"Credits",A="FI:::/Doc/Credits.DD"$, $LK+PU,"FAQ",A="FI:::/Doc/FAQ.DD"$, $LK+PU,"Features.DD",A="FI:::/Doc/Features.DD"$, $LK+PU,"Welcome.DD",A="FI:::/Doc/Welcome.DD"$.
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180
src/Home/Net/Drivers/PCNet.ZC
Executable file → Normal file
180
src/Home/Net/Drivers/PCNet.ZC
Executable file → Normal file
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@ -13,11 +13,6 @@
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|||
- Clear documentation.
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||||
*/
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||||
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||||
//#define PCNET_DEVICE_ID 0x2000
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//#define PCNET_VENDOR_ID 0x1022
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||||
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||||
//#define PCI_REG_COMMAND 0x04
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|
||||
#define PCNET_CMDf_IOEN 0
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#define PCNET_CMDf_BMEN 2
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||||
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@ -28,8 +23,12 @@
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|||
|
||||
#define PCNET_DW_RDP 0x10
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#define PCNET_DW_RAP 0x14
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||||
#define PCNET_DW_BDP 0x1C
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#define PCNET_DW_RESET 0x18 // reset reg location when card is in 32-bit mode
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#define PCNET_BCR_MISC_CONFIG 2
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#define PCNET_BCR_FULL_DUPLEX_CTRL 9
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#define PCNET_CSR_CTRLSTATUS 0
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#define PCNET_CSR_INTERRUPTS 3
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#define PCNET_CSR_FEATURECTRL 4
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@ -62,10 +61,17 @@
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||||
#define PCNET_FEATURE_APADXMT 11
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||||
#define PCNET_BCR_MISC_CONFIG_ASEL 1
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#define PCNET_BCR_FULL_DUPLEX_CTRL_FDEN 0
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#define PCNET_BCR_FULL_DUPLEX_CTRL_AUIFD 1
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#define PCNET_CTRL_INIT 0
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#define PCNET_CTRL_STRT 1
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#define PCNET_CTRL_STOP 2
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#define PCNET_CTRL_RINT 10
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#define PCNET_CTRL_IENA 6
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#define PCNET_CTRL_IDON 8
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#define PCNET_CTRL_RINT 10
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||||
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#define PCNET_RX_BUFF_COUNT 32 // Linux & Shrine Driver use 32 and 8 for
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#define PCNET_TX_BUFF_COUNT 8 // these, we could allow more if wanted.
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@ -88,8 +94,6 @@ class CPCNet
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U8 *rx_de_buffer_phys; // Pointer to the buffer of RX Descriptor Entries. (Code Heap, lower 2Gb)
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U8 *tx_de_buffer_phys; // Pointer to the buffer of TX Descriptor Entries. (Code Heap, lower 2Gb)
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U32 rx_buffer_addr; // Uncached-alias of address of receive buffers.
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U32 tx_buffer_addr; // Uncached-alias of address of transmit buffers.
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U32 rx_buffer_addr_phys; // Physical address of actual receive buffers (< 4 Gb)
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U32 tx_buffer_addr_phys; // Physical address of actual transmit buffers (< 4 Gb)
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@ -164,6 +168,28 @@ U0 PCNetRAPWrite(U32 value)
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OutU32(PCNetIOBaseGet + PCNET_DW_RAP, value);
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}
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U0 PCNetBCRWrite(U32 bcr, U32 value)
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{/* AMD PCNet datasheet p. 1-952
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Summary: Bus Control Registers are
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accessed via the BDP (Bus Data Port).
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Which BCR is selected is based on the value
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in the RAP. */
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PCNetRAPWrite(bcr);
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OutU32(PCNetIOBaseGet + PCNET_DW_BDP, value);
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}
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U32 PCNetBCRRead(U32 bcr)
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{/* AMD PCNet datasheet p. 1-952
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Summary: Bus Control Registers are
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accessed via the BDP (Bus Data Port).
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Which BCR is selected is based on the value
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in the RAP. */
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PCNetRAPWrite(bcr);
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return InU32(PCNetIOBaseGet + PCNET_DW_BDP);
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}
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U0 PCNetCSRWrite(U32 csr, U32 value)
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{/* AMD PCNet datasheet p. 1-952
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Summary: Control and Status Registers are
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@ -186,6 +212,26 @@ U32 PCNetCSRRead(U32 csr)
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return InU32(PCNetIOBaseGet + PCNET_DW_RDP);
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}
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U0 PCNetAutoLinkSelect()
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{
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U32 bcr = PCNetCSRRead(PCNET_BCR_FULL_DUPLEX_CTRL);
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Bts(&bcr, PCNET_BCR_FULL_DUPLEX_CTRL_FDEN);
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Bts(&bcr, PCNET_BCR_FULL_DUPLEX_CTRL_AUIFD);
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PCNetBCRWrite(PCNET_BCR_FULL_DUPLEX_CTRL, bcr);
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}
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U0 PCNetEnableFullDuplex()
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{
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U32 bcr = PCNetCSRRead(PCNET_BCR_MISC_CONFIG);
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Bts(&bcr, PCNET_BCR_MISC_CONFIG_ASEL);
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PCNetBCRWrite(PCNET_BCR_MISC_CONFIG, bcr);
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}
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|
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U0 PCNetSWStyleSet()
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{/* AMD PCNet datasheet p. 1-968
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In CSR58 (Software Style), the 8-bit
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@ -199,7 +245,7 @@ U0 PCNetSWStyleSet()
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csr &= ~0xFF; // clears first 8 bits: SWSTYLE 8-bit register.
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csr |= PCNET_SWSTYLE_SELECTION; // set SWSTYLE to PCNet-PCI mode.
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PCIBts(&csr, PCNET_SWSTYLE_SSIZE32); // set SSIZE32 bit 1
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Bts(&csr, PCNET_SWSTYLE_SSIZE32); // set SSIZE32 bit 1
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PCNetCSRWrite(PCNET_CSR_SOFTWARESTYLE, csr);
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}
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@ -211,10 +257,12 @@ U0 PCNetMACGet()
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APROM accessible at first 16 bytes of PCI IO space. */
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||||
|
||||
I64 i;
|
||||
U64 eeprom_bytes = InU32(PCNetIOBaseGet) | InU32(PCNetIOBaseGet + 4) << 32;
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||||
|
||||
NetLog("PCNET GET MAC: Getting VM MAC.");
|
||||
for (i = 0; i < 6; i++)
|
||||
{
|
||||
pcnet.mac_address[i] = InU8(PCNetIOBaseGet + i);
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pcnet.mac_address[i] = eeprom_bytes.u8[i];
|
||||
NetLog(" %02X", pcnet.mac_address[i]);
|
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}
|
||||
}
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@ -263,20 +311,17 @@ U0 PCNetBuffersAllocate()
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|||
pcnet.rx_de_buffer = dev.uncached_alias + pcnet.rx_de_buffer_phys; // we want uncached
|
||||
pcnet.tx_de_buffer = dev.uncached_alias + pcnet.tx_de_buffer_phys; // access to these.
|
||||
|
||||
pcnet.rx_buffer_addr_phys = CAlloc(ETHERNET_FRAME_SIZE * PCNET_RX_BUFF_COUNT, Fs->code_heap);
|
||||
pcnet.rx_buffer_addr_phys = CAllocAligned(ETHERNET_FRAME_SIZE * PCNET_RX_BUFF_COUNT, 16, Fs->code_heap);
|
||||
|
||||
pcnet.tx_buffer_addr_phys = CAlloc(ETHERNET_FRAME_SIZE * PCNET_TX_BUFF_COUNT, Fs->code_heap);
|
||||
pcnet.tx_buffer_addr_phys = CAllocAligned(ETHERNET_FRAME_SIZE * PCNET_TX_BUFF_COUNT, 16, Fs->code_heap);
|
||||
|
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//Shrine does a check and returns -1 here, if the end of either buffer exceeds 0x100000000
|
||||
|
||||
pcnet.rx_buffer_addr = dev.uncached_alias + pcnet.rx_buffer_addr_phys;
|
||||
pcnet.tx_buffer_addr = dev.uncached_alias + pcnet.tx_buffer_addr_phys;
|
||||
|
||||
CPCNetDescriptorEntry *entry = pcnet.rx_de_buffer;
|
||||
for (de_index = 0; de_index < PCNET_RX_BUFF_COUNT; de_index++)
|
||||
{
|
||||
PCNetDescriptorEntryInit(&entry[de_index],
|
||||
pcnet.rx_buffer_addr + de_index * ETHERNET_FRAME_SIZE,
|
||||
pcnet.rx_buffer_addr_phys + de_index * ETHERNET_FRAME_SIZE,
|
||||
TRUE); // TRUE for is_rx.
|
||||
}
|
||||
|
||||
|
|
@ -284,7 +329,7 @@ U0 PCNetBuffersAllocate()
|
|||
for (de_index = 0; de_index < PCNET_TX_BUFF_COUNT; de_index++)
|
||||
{
|
||||
PCNetDescriptorEntryInit(&entry[de_index],
|
||||
pcnet.tx_buffer_addr + de_index * ETHERNET_FRAME_SIZE,
|
||||
pcnet.tx_buffer_addr_phys + de_index * ETHERNET_FRAME_SIZE,
|
||||
FALSE); // FALSE for is_rx.
|
||||
}
|
||||
}
|
||||
|
|
@ -341,11 +386,11 @@ U0 PCNetDirectInit()
|
|||
Bitshift right of 16 will replace
|
||||
first 16 bits with upper 16 bits,
|
||||
remaining bits cleared.*/
|
||||
PCNetCSRWrite(PCNET_CSR_BADRL, pcnet.rx_buffer_addr & 0xFFFF);
|
||||
PCNetCSRWrite(PCNET_CSR_BADRU, pcnet.rx_buffer_addr >> 16);
|
||||
PCNetCSRWrite(PCNET_CSR_BADRL, pcnet.rx_buffer_addr_phys & 0xFFFF);
|
||||
PCNetCSRWrite(PCNET_CSR_BADRU, pcnet.rx_buffer_addr_phys >> 16);
|
||||
|
||||
PCNetCSRWrite(PCNET_CSR_BADTL, pcnet.tx_buffer_addr & 0xFFFF);
|
||||
PCNetCSRWrite(PCNET_CSR_BADTU, pcnet.tx_buffer_addr >> 16);
|
||||
PCNetCSRWrite(PCNET_CSR_BADTL, pcnet.tx_buffer_addr_phys & 0xFFFF);
|
||||
PCNetCSRWrite(PCNET_CSR_BADTU, pcnet.tx_buffer_addr_phys >> 16);
|
||||
|
||||
/* AMD PCNet datasheet p. 1-967
|
||||
Default value at hardware init is
|
||||
|
|
@ -367,7 +412,7 @@ U0 PCNetDirectInit()
|
|||
|
||||
U8 *PCNetInitBlockSetup()
|
||||
{
|
||||
U8 *setup = CAlloc(sizeof(CPCNetBufferSetup), Fs->code_heap);
|
||||
U8 *setup = CAllocAligned(sizeof(CPCNetBufferSetup), 16, Fs->code_heap);
|
||||
CPCNetBufferSetup *u_setup = setup + dev.uncached_alias;
|
||||
U32 p_setup;
|
||||
|
||||
|
|
@ -397,11 +442,11 @@ U0 PCNetInterruptCSRSet()
|
|||
|
||||
U32 csr = PCNetCSRRead(PCNET_CSR_INTERRUPTS);
|
||||
|
||||
PCIBtr(&csr, PCNET_INT_BSWP);
|
||||
PCIBtr(&csr, PCNET_INT_RINTM);
|
||||
Btr(&csr, PCNET_INT_BSWP);
|
||||
Btr(&csr, PCNET_INT_RINTM);
|
||||
|
||||
PCIBts(&csr, PCNET_INT_IDONM);
|
||||
PCIBts(&csr, PCNET_INT_TINTM);
|
||||
Bts(&csr, PCNET_INT_IDONM);
|
||||
Bts(&csr, PCNET_INT_TINTM);
|
||||
|
||||
PCNetCSRWrite(PCNET_CSR_INTERRUPTS, csr);
|
||||
}
|
||||
|
|
@ -414,7 +459,7 @@ U0 PCNetTXAutoPadEnable()
|
|||
|
||||
U32 csr = PCNetCSRRead(PCNET_CSR_FEATURECTRL);
|
||||
|
||||
PCIBts(&csr, PCNET_FEATURE_APADXMT);
|
||||
Bts(&csr, PCNET_FEATURE_APADXMT);
|
||||
|
||||
PCNetCSRWrite(PCNET_CSR_FEATURECTRL, csr);
|
||||
}
|
||||
|
|
@ -429,14 +474,32 @@ U0 PCNetConfigModeExit()
|
|||
|
||||
U32 csr = PCNetCSRRead(PCNET_CSR_CTRLSTATUS);
|
||||
|
||||
PCIBtr(&csr, PCNET_CTRL_INIT);
|
||||
PCIBtr(&csr, PCNET_CTRL_STOP);
|
||||
Btr(&csr, PCNET_CTRL_INIT);
|
||||
Btr(&csr, PCNET_CTRL_STOP);
|
||||
|
||||
PCIBts(&csr, PCNET_CTRL_STRT);
|
||||
Bts(&csr, PCNET_CTRL_IENA);
|
||||
Bts(&csr, PCNET_CTRL_STRT);
|
||||
|
||||
PCNetCSRWrite(PCNET_CSR_CTRLSTATUS, csr);
|
||||
}
|
||||
|
||||
U0 PCNetUploadConfig()
|
||||
{/* Upload new config and wait for card to acknowlege */
|
||||
U32 csr = 0;
|
||||
|
||||
Bts(&csr, PCNET_CTRL_INIT);
|
||||
|
||||
PCNetCSRWrite(PCNET_CSR_CTRLSTATUS, csr);
|
||||
|
||||
Btr(&csr, PCNET_CTRL_IDON);
|
||||
|
||||
while (!Bt(&csr, PCNET_CTRL_IDON))
|
||||
{
|
||||
Yield;
|
||||
csr = PCNetCSRRead(PCNET_CSR_CTRLSTATUS);
|
||||
}
|
||||
}
|
||||
|
||||
I64 PCNetDriverOwns(CPCNetDescriptorEntry* entry)
|
||||
{/* Returns whether the value of the OWN bit of the
|
||||
Descriptor Entry is zero. If 0, driver owns,
|
||||
|
|
@ -493,9 +556,7 @@ I64 PCNetTransmitPacketAllocate(U8 **packet_buffer_out, I64 length)
|
|||
|
||||
pcnet.current_tx_de_index = (pcnet.current_tx_de_index + 1) & (PCNET_TX_BUFF_COUNT - 1);
|
||||
|
||||
*packet_buffer_out = pcnet.tx_buffer_addr + de_index * ETHERNET_FRAME_SIZE;
|
||||
|
||||
MemSet(*packet_buffer_out, 0, ETHERNET_FRAME_SIZE); // Clear buffer contents in advance.
|
||||
*packet_buffer_out = pcnet.tx_buffer_addr_phys + de_index * ETHERNET_FRAME_SIZE;
|
||||
|
||||
NetLog("PCNET ALLOCATE TX PACKET: de_index: %X.", de_index);
|
||||
return de_index;
|
||||
|
|
@ -558,7 +619,7 @@ I64 PCNetPacketReceive(U8 **packet_buffer_out, U16 *packet_length_out)
|
|||
pcnet.current_rx_de_index = (pcnet.current_rx_de_index + 1) & (PCNET_RX_BUFF_COUNT - 1);
|
||||
NetDebug("PCNET RECEIVE PACKET: de_index incremented = 0x%0X", pcnet.current_rx_de_index);
|
||||
|
||||
*packet_buffer_out = pcnet.rx_buffer_addr + de_index * ETHERNET_FRAME_SIZE;
|
||||
*packet_buffer_out = pcnet.rx_buffer_addr_phys + de_index * ETHERNET_FRAME_SIZE;
|
||||
*packet_length_out = packet_length;
|
||||
|
||||
return de_index;
|
||||
|
|
@ -599,11 +660,12 @@ interrupt U0 PCNetIRQ()
|
|||
if (de_index >= 0) // todo: necessary? check increment logic in PCNetPacketReceive.
|
||||
{
|
||||
NetLog("PCNET IRQ: Pushing copy into Net Queue, releasing receive packet.");
|
||||
NetQueuePush(packet_buffer, packet_length);
|
||||
// uncached read
|
||||
NetQueuePush(packet_buffer + dev.uncached_alias, packet_length);
|
||||
PCNetReceivePacketRelease(de_index);
|
||||
}
|
||||
|
||||
PCIBts(&csr, PCNET_CTRL_RINT);
|
||||
Bts(&csr, PCNET_CTRL_RINT);
|
||||
|
||||
PCNetCSRWrite(PCNET_CSR_CTRLSTATUS, csr);
|
||||
|
||||
|
|
@ -666,10 +728,10 @@ U0 PCNetInit()
|
|||
PCNet32BitModeEnable;
|
||||
|
||||
U32 csr = PCNetCSRRead(PCNET_CSR_CTRLSTATUS);
|
||||
NetLog("PCNET INIT START: what is INIT ?: %d", PCIBt(&csr, PCNET_CTRL_INIT));
|
||||
NetLog("PCNET INIT START: what is STRT ?: %d", PCIBt(&csr, PCNET_CTRL_STRT));
|
||||
NetLog("PCNET INIT START: what is STOP ?: %d", PCIBt(&csr, PCNET_CTRL_STOP));
|
||||
NetLog("PCNET INIT START: what is RINT ?: %d", PCIBt(&csr, PCNET_CTRL_RINT));
|
||||
NetLog("PCNET INIT START: what is INIT ?: %d", Bt(&csr, PCNET_CTRL_INIT));
|
||||
NetLog("PCNET INIT START: what is STRT ?: %d", Bt(&csr, PCNET_CTRL_STRT));
|
||||
NetLog("PCNET INIT START: what is STOP ?: %d", Bt(&csr, PCNET_CTRL_STOP));
|
||||
NetLog("PCNET INIT START: what is RINT ?: %d", Bt(&csr, PCNET_CTRL_RINT));
|
||||
|
||||
|
||||
PCNetSWStyleSet;
|
||||
|
|
@ -686,31 +748,32 @@ U0 PCNetInit()
|
|||
|
||||
PCNetTXAutoPadEnable;
|
||||
|
||||
PCNetCSRWrite(0, PCNetCSRRead(0) | 1 | 1 << 6); // ?
|
||||
PCNetAutoLinkSelect;
|
||||
|
||||
PCNetEnableFullDuplex;
|
||||
|
||||
PCNetUploadConfig;
|
||||
|
||||
csr = PCNetCSRRead(PCNET_CSR_CTRLSTATUS);
|
||||
NetLog("PCNET INIT UPLOAD: what is INIT ?: %d", PCIBt(&csr, PCNET_CTRL_INIT));
|
||||
NetLog("PCNET INIT UPLOAD: what is STRT ?: %d", PCIBt(&csr, PCNET_CTRL_STRT));
|
||||
NetLog("PCNET INIT UPLOAD: what is STOP ?: %d", PCIBt(&csr, PCNET_CTRL_STOP));
|
||||
NetLog("PCNET INIT UPLOAD: what is RINT ?: %d", PCIBt(&csr, PCNET_CTRL_RINT));
|
||||
|
||||
while (!(PCNetCSRRead(0) & 1 << 8)) // ?
|
||||
Yield;
|
||||
NetLog("PCNET INIT UPLOAD: what is INIT ?: %d", Bt(&csr, PCNET_CTRL_INIT));
|
||||
NetLog("PCNET INIT UPLOAD: what is STRT ?: %d", Bt(&csr, PCNET_CTRL_STRT));
|
||||
NetLog("PCNET INIT UPLOAD: what is STOP ?: %d", Bt(&csr, PCNET_CTRL_STOP));
|
||||
NetLog("PCNET INIT UPLOAD: what is RINT ?: %d", Bt(&csr, PCNET_CTRL_RINT));
|
||||
|
||||
PCNetConfigModeExit;
|
||||
|
||||
Sleep(100); //? necessary?
|
||||
|
||||
csr = PCNetCSRRead(PCNET_CSR_CTRLSTATUS);
|
||||
NetLog("PCNET INIT END: what is INIT ?: %d", PCIBt(&csr, PCNET_CTRL_INIT));
|
||||
NetLog("PCNET INIT END: what is STRT ?: %d", PCIBt(&csr, PCNET_CTRL_STRT));
|
||||
NetLog("PCNET INIT END: what is STOP ?: %d", PCIBt(&csr, PCNET_CTRL_STOP));
|
||||
NetLog("PCNET INIT END: what is RINT ?: %d", PCIBt(&csr, PCNET_CTRL_RINT));
|
||||
NetLog("PCNET INIT END: what is TXON ?: %d", PCIBt(&csr, 4));
|
||||
NetLog("PCNET INIT END: what is RXON ?: %d", PCIBt(&csr, 5));
|
||||
NetLog("PCNET INIT END: what is INIT ?: %d", Bt(&csr, PCNET_CTRL_INIT));
|
||||
NetLog("PCNET INIT END: what is STRT ?: %d", Bt(&csr, PCNET_CTRL_STRT));
|
||||
NetLog("PCNET INIT END: what is STOP ?: %d", Bt(&csr, PCNET_CTRL_STOP));
|
||||
NetLog("PCNET INIT END: what is RINT ?: %d", Bt(&csr, PCNET_CTRL_RINT));
|
||||
NetLog("PCNET INIT END: what is TXON ?: %d", Bt(&csr, 4));
|
||||
NetLog("PCNET INIT END: what is RXON ?: %d", Bt(&csr, 5));
|
||||
|
||||
csr = PCNetCSRRead(PCNET_CSR_POLLINT);
|
||||
NetLog("PCNET INIT END: what is POLLINT ?: %d", PCIBt(&csr, PCNET_CTRL_RINT));
|
||||
NetLog("PCNET INIT END: what is POLLINT ?: %d", Bt(&csr, PCNET_CTRL_RINT));
|
||||
|
||||
NetLog("PCNET INIT END: Redirecting interrupts.");
|
||||
PCNetInterruptsSetup;
|
||||
|
|
@ -741,6 +804,7 @@ I64 EthernetFrameAllocate(U8 **packet_buffer_out,
|
|||
}
|
||||
|
||||
de_index = PCNetTransmitPacketAllocate(ðernet_frame, ETHERNET_MAC_HEADER_LENGTH + packet_length);
|
||||
ethernet_frame += dev.uncached_alias; // Make write uncached
|
||||
|
||||
if (de_index < 0)
|
||||
{
|
||||
|
|
@ -748,6 +812,8 @@ I64 EthernetFrameAllocate(U8 **packet_buffer_out,
|
|||
return -1; // Positive value expected. Functions calling this must factor this in.
|
||||
}
|
||||
|
||||
MemSet(ethernet_frame, 0, ETHERNET_FRAME_SIZE); // Clear buffer contents in advance.
|
||||
|
||||
MemCopy(ethernet_frame, destination_address, MAC_ADDRESS_LENGTH);
|
||||
MemCopy(ethernet_frame + MAC_ADDRESS_LENGTH, source_address, MAC_ADDRESS_LENGTH);
|
||||
|
||||
|
|
@ -763,7 +829,7 @@ U0 NetStop()
|
|||
{ // Halt network activity by setting STOP bit on Status CSR.
|
||||
U32 csr = PCNetCSRRead(PCNET_CSR_CTRLSTATUS);
|
||||
|
||||
PCIBts(&csr, PCNET_CTRL_STOP);
|
||||
Bts(&csr, PCNET_CTRL_STOP);
|
||||
|
||||
PCNetCSRWrite(PCNET_CSR_CTRLSTATUS, csr);
|
||||
|
||||
|
|
@ -773,7 +839,7 @@ U0 NetStart()
|
|||
{ // Continue network activity. Setting START bit clears STOP/INIT.
|
||||
U32 csr = PCNetCSRRead(PCNET_CSR_CTRLSTATUS);
|
||||
|
||||
PCIBts(&csr, PCNET_CTRL_STRT);
|
||||
Bts(&csr, PCNET_CTRL_STRT);
|
||||
|
||||
PCNetCSRWrite(PCNET_CSR_CTRLSTATUS, csr);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -13,7 +13,7 @@ CTask *sys_winmgr_task,
|
|||
U8 *rev_bits_table; //Table with U8 bits reversed
|
||||
CDate local_time_offset;
|
||||
F64 *pow10_I64,
|
||||
sys_os_version = 2.00;
|
||||
sys_os_version = 2.01;
|
||||
|
||||
CAutoCompleteDictGlobals acd;
|
||||
CAutoCompleteGlobals ac;
|
||||
|
|
|
|||
|
|
@ -555,6 +555,7 @@ public extern U8 *ReAlloc( U8 *src, U64 size, CTask *mem_task=NU
|
|||
public _extern _MHEAP_CTRL CHeapCtrl *MHeapCtrl( U8 *src);
|
||||
public _extern _MSIZE I64 MSize( U8 *src); //size of heap object
|
||||
public _extern _MSIZE2 I64 MSize2( U8 *src); //Internal size
|
||||
public extern U0 FreeAll(...); //Free all pointers passed
|
||||
|
||||
#help_index "Memory/HeapCtrl"
|
||||
public extern U0 HeapCtrlDel( CHeapCtrl *hc);
|
||||
|
|
@ -735,4 +736,4 @@ public extern F64 tS(); //From SysTimerFreq.
|
|||
#help_index "Windows"
|
||||
public extern Bool WinInside(I64 x, I64 y, CTask *task=NULL, I64 border=0);
|
||||
|
||||
#help_index ""
|
||||
#help_index ""
|
||||
|
|
|
|||
|
|
@ -504,3 +504,11 @@ U8 *SysStrNew(U8 *buf)
|
|||
{//Alloc copy of string in System task's heap.
|
||||
return StrNew(buf, sys_task);
|
||||
}
|
||||
|
||||
U0 FreeAll(...)
|
||||
{// Free all pointers passed
|
||||
U64 cur_arg = 0;
|
||||
|
||||
while (argc--)
|
||||
Free(argv[cur_arg++]);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -15,8 +15,8 @@ U0 LoadDocDefines()
|
|||
//$LK,"DD_BOOT_HIGH_LOC_DVD",A="FF:::/System/Boot/BootDVD.ZC,DD_BOOT_HIGH_LOC_DVD"$
|
||||
|
||||
$TR,"LineRep"$
|
||||
$ID,2$DefinePrint("DD_ZEALOS_LOC","98,675");
|
||||
$ID,-2$
|
||||
$ID,2$DefinePrint("DD_ZEALOS_LOC","98,709");
|
||||
$ID,-2$
|
||||
DefinePrint("DD_MP_VECT", "%08X", MP_VECT_ADDR);
|
||||
DefinePrint("DD_MP_VECT_END", "%08X", MP_VECT_ADDR + COREAP_16BIT_INIT_END - COREAP_16BIT_INIT - 1);
|
||||
|
||||
|
|
|
|||
|
|
@ -124,7 +124,7 @@ U0 GrFixZoomScale()
|
|||
}
|
||||
else
|
||||
{
|
||||
gr.sx = ClampI64(gr.sx, 0, GR_WIDTH - GR_WIDTH / gr.screen_zoom) & ~7;
|
||||
gr.sx = ClampI64(gr.sx, 0, GR_WIDTH - GR_WIDTH / gr.screen_zoom);
|
||||
gr.sy = ClampI64(gr.sy, 0, GR_HEIGHT - GR_HEIGHT / gr.screen_zoom);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in a new issue