From 946c51fa4daaa933fe5a3ae1b0ddd810a44319fe Mon Sep 17 00:00:00 2001 From: TomAwezome Date: Wed, 30 Nov 2022 20:09:04 -0500 Subject: [PATCH 01/10] Fix GrFixZoomScale gr.sx 8 pixel offset lock. --- src/System/Gr/GrScreen.ZC | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/System/Gr/GrScreen.ZC b/src/System/Gr/GrScreen.ZC index b9562f54..dcfd93a9 100755 --- a/src/System/Gr/GrScreen.ZC +++ b/src/System/Gr/GrScreen.ZC @@ -124,7 +124,7 @@ U0 GrFixZoomScale() } else { - gr.sx = ClampI64(gr.sx, 0, GR_WIDTH - GR_WIDTH / gr.screen_zoom) & ~7; + gr.sx = ClampI64(gr.sx, 0, GR_WIDTH - GR_WIDTH / gr.screen_zoom); gr.sy = ClampI64(gr.sy, 0, GR_HEIGHT - GR_HEIGHT / gr.screen_zoom); } } From f4c5814c4b4a5238c6e98f3cf8b610fffaa297dc Mon Sep 17 00:00:00 2001 From: tinkeros Date: Sun, 11 Dec 2022 19:06:40 -0600 Subject: [PATCH 02/10] Add QEMU_BIN_PATH variable --- build/build-iso.sh | 19 +++++++++++-------- build/sync.sh | 7 +++++-- 2 files changed, 16 insertions(+), 10 deletions(-) diff --git a/build/build-iso.sh b/build/build-iso.sh index 5e7199d6..e97d8874 100755 --- a/build/build-iso.sh +++ b/build/build-iso.sh @@ -24,9 +24,12 @@ TMPISODIR="$TMPDIR/iso" TMPDISK="$TMPDIR/ZealOS.raw" TMPMOUNT="$TMPDIR/mnt" +# Change this if your default QEMU version does not work and you have installed a different version elsewhere. +QEMU_BIN_PATH=$(dirname "$(which qemu-system-x86_64)") + mount_tempdisk() { sudo modprobe nbd - sudo qemu-nbd -c /dev/nbd0 -f raw $TMPDISK + sudo $QEMU_BIN_PATH/qemu-nbd -c /dev/nbd0 -f raw $TMPDISK sudo partprobe /dev/nbd0 sudo mount /dev/nbd0p1 $TMPMOUNT } @@ -34,7 +37,7 @@ mount_tempdisk() { umount_tempdisk() { sync sudo umount $TMPMOUNT - sudo qemu-nbd -d /dev/nbd0 + sudo $QEMU_BIN_PATH/qemu-nbd -d /dev/nbd0 } [ ! -d $TMPMOUNT ] && mkdir -p $TMPMOUNT @@ -46,8 +49,8 @@ echo "Building ZealBooter..." set +e echo "Making temp vdisk, running auto-install ..." -qemu-img create -f raw $TMPDISK 1024M -qemu-system-x86_64 -machine q35,accel=kvm -drive format=raw,file=$TMPDISK -m 1G -rtc base=localtime -smp 4 -cdrom AUTO.ISO -device isa-debug-exit +$QEMU_BIN_PATH/qemu-img create -f raw $TMPDISK 1024M +$QEMU_BIN_PATH/qemu-system-x86_64 -machine q35,accel=kvm -drive format=raw,file=$TMPDISK -m 1G -rtc base=localtime -smp 4 -cdrom AUTO.ISO -device isa-debug-exit echo "Copying all src/ code into vdisk Tmp/OSBuild/ ..." rm ../src/Home/Registry.ZC 2> /dev/null @@ -59,7 +62,7 @@ sudo cp -r ../src/* $TMPMOUNT/Tmp/OSBuild umount_tempdisk echo "Rebuilding kernel headers, kernel, OS, and building Distro ISO ..." -qemu-system-x86_64 -machine q35,accel=kvm -drive format=raw,file=$TMPDISK -m 1G -rtc base=localtime -smp 4 -device isa-debug-exit +$QEMU_BIN_PATH/qemu-system-x86_64 -machine q35,accel=kvm -drive format=raw,file=$TMPDISK -m 1G -rtc base=localtime -smp 4 -device isa-debug-exit LIMINE_BINARY_BRANCH="v4.x-branch-binary" @@ -128,11 +131,11 @@ if [ "$TESTING" = true ]; then cd .. fi echo "Testing limine-zealbooter-xorriso isohybrid boot in UEFI mode ..." - qemu-system-x86_64 -machine q35,accel=kvm -m 1G -rtc base=localtime -bios ovmf/OVMF.fd -smp 4 -cdrom ZealOS-limine.iso + $QEMU_BIN_PATH/qemu-system-x86_64 -machine q35,accel=kvm -m 1G -rtc base=localtime -bios ovmf/OVMF.fd -smp 4 -cdrom ZealOS-limine.iso echo "Testing limine-zealbooter-xorriso isohybrid boot in BIOS mode ..." - qemu-system-x86_64 -machine q35,accel=kvm -m 1G -rtc base=localtime -smp 4 -cdrom ZealOS-limine.iso + $QEMU_BIN_PATH/qemu-system-x86_64 -machine q35,accel=kvm -m 1G -rtc base=localtime -smp 4 -cdrom ZealOS-limine.iso echo "Testing native ZealC MyDistro legacy ISO in BIOS mode ..." - qemu-system-x86_64 -machine q35,accel=kvm -m 1G -rtc base=localtime -smp 4 -cdrom ZealOS-MyDistro.iso + $QEMU_BIN_PATH/qemu-system-x86_64 -machine q35,accel=kvm -m 1G -rtc base=localtime -smp 4 -cdrom ZealOS-MyDistro.iso fi # comment these 2 lines if you want lingering old Distro ISOs diff --git a/build/sync.sh b/build/sync.sh index 000afbf6..54227f8c 100755 --- a/build/sync.sh +++ b/build/sync.sh @@ -11,6 +11,9 @@ SCRIPT_DIR=$(realpath "$(dirname "$0")") SCRIPT_NAME=$(basename "$0") EXPECTED_DIR=$(realpath "$PWD") +# Change this if your default QEMU version does not work and you have installed a different version elsewhere. +QEMU_BIN_PATH=$(dirname "$(which qemu-system-x86_64)") + if test "${EXPECTED_DIR}" != "${SCRIPT_DIR}" then ( cd "$SCRIPT_DIR" || exit ; "./$SCRIPT_NAME" "$@" ); @@ -50,7 +53,7 @@ print_usage() { mount_vdisk() { echo "Mounting virtual disk..." - sudo qemu-nbd -c /dev/nbd0 "$ZEALDISK" + sudo $QEMU_BIN_PATH/qemu-nbd -c /dev/nbd0 "$ZEALDISK" sudo partprobe /dev/nbd0 sudo mount /dev/nbd0p1 $TMPMOUNT } @@ -59,7 +62,7 @@ umount_vdisk() { echo "Unmounting virtual disk..." sync sudo umount $TMPMOUNT - sudo qemu-nbd -d /dev/nbd0 + sudo $QEMU_BIN_PATH/qemu-nbd -d /dev/nbd0 sudo rm -rf $TMPMOUNT } From 67e54cdf1ff9c7743d40d65b51bc022a8c38929c Mon Sep 17 00:00:00 2001 From: tinkeros Date: Sun, 11 Dec 2022 20:59:54 -0600 Subject: [PATCH 03/10] Fix PCNetMACGet function --- src/Home/Net/Drivers/PCNet.ZC | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) mode change 100755 => 100644 src/Home/Net/Drivers/PCNet.ZC diff --git a/src/Home/Net/Drivers/PCNet.ZC b/src/Home/Net/Drivers/PCNet.ZC old mode 100755 new mode 100644 index 3146dec9..3183321a --- a/src/Home/Net/Drivers/PCNet.ZC +++ b/src/Home/Net/Drivers/PCNet.ZC @@ -211,10 +211,11 @@ U0 PCNetMACGet() APROM accessible at first 16 bytes of PCI IO space. */ I64 i; + U64 eeprom_bytes = InU32(PCNetIOBaseGet) | InU32(PCNetIOBaseGet + 4) << 32; NetLog("PCNET GET MAC: Getting VM MAC."); for (i = 0; i < 6; i++) { - pcnet.mac_address[i] = InU8(PCNetIOBaseGet + i); + pcnet.mac_address[i] = eeprom_bytes.u8[i]; NetLog(" %02X", pcnet.mac_address[i]); } } From 17a08889979a8f5de22d4fd01c52b512f6c0a6d2 Mon Sep 17 00:00:00 2001 From: TomAwezome Date: Tue, 13 Dec 2022 03:25:53 -0500 Subject: [PATCH 04/10] Add newline for formatting in PCNet code. --- src/Home/Net/Drivers/PCNet.ZC | 1 + 1 file changed, 1 insertion(+) diff --git a/src/Home/Net/Drivers/PCNet.ZC b/src/Home/Net/Drivers/PCNet.ZC index 3183321a..3917d55f 100644 --- a/src/Home/Net/Drivers/PCNet.ZC +++ b/src/Home/Net/Drivers/PCNet.ZC @@ -212,6 +212,7 @@ U0 PCNetMACGet() I64 i; U64 eeprom_bytes = InU32(PCNetIOBaseGet) | InU32(PCNetIOBaseGet + 4) << 32; + NetLog("PCNET GET MAC: Getting VM MAC."); for (i = 0; i < 6; i++) { From c6dde79a8bf402deb254344c231e73b61c24338c Mon Sep 17 00:00:00 2001 From: tinkeros Date: Tue, 13 Dec 2022 20:29:32 -0600 Subject: [PATCH 05/10] Fix driver uncached alias and Bt function usage --- src/Home/Net/Drivers/PCNet.ZC | 116 ++++++++++++++++++---------------- 1 file changed, 63 insertions(+), 53 deletions(-) diff --git a/src/Home/Net/Drivers/PCNet.ZC b/src/Home/Net/Drivers/PCNet.ZC index 3917d55f..65acfb7a 100644 --- a/src/Home/Net/Drivers/PCNet.ZC +++ b/src/Home/Net/Drivers/PCNet.ZC @@ -13,11 +13,6 @@ - Clear documentation. */ -//#define PCNET_DEVICE_ID 0x2000 -//#define PCNET_VENDOR_ID 0x1022 - -//#define PCI_REG_COMMAND 0x04 - #define PCNET_CMDf_IOEN 0 #define PCNET_CMDf_BMEN 2 @@ -65,7 +60,9 @@ #define PCNET_CTRL_INIT 0 #define PCNET_CTRL_STRT 1 #define PCNET_CTRL_STOP 2 -#define PCNET_CTRL_RINT 10 +#define PCNET_CTRL_IENA 6 +#define PCNET_CTRL_IDON 8 +#define PCNET_CTRL_RINT 10 #define PCNET_RX_BUFF_COUNT 32 // Linux & Shrine Driver use 32 and 8 for #define PCNET_TX_BUFF_COUNT 8 // these, we could allow more if wanted. @@ -88,8 +85,6 @@ class CPCNet U8 *rx_de_buffer_phys; // Pointer to the buffer of RX Descriptor Entries. (Code Heap, lower 2Gb) U8 *tx_de_buffer_phys; // Pointer to the buffer of TX Descriptor Entries. (Code Heap, lower 2Gb) - U32 rx_buffer_addr; // Uncached-alias of address of receive buffers. - U32 tx_buffer_addr; // Uncached-alias of address of transmit buffers. U32 rx_buffer_addr_phys; // Physical address of actual receive buffers (< 4 Gb) U32 tx_buffer_addr_phys; // Physical address of actual transmit buffers (< 4 Gb) @@ -199,7 +194,7 @@ U0 PCNetSWStyleSet() csr &= ~0xFF; // clears first 8 bits: SWSTYLE 8-bit register. csr |= PCNET_SWSTYLE_SELECTION; // set SWSTYLE to PCNet-PCI mode. - PCIBts(&csr, PCNET_SWSTYLE_SSIZE32); // set SSIZE32 bit 1 + Bts(&csr, PCNET_SWSTYLE_SSIZE32); // set SSIZE32 bit 1 PCNetCSRWrite(PCNET_CSR_SOFTWARESTYLE, csr); } @@ -271,14 +266,11 @@ U0 PCNetBuffersAllocate() //Shrine does a check and returns -1 here, if the end of either buffer exceeds 0x100000000 - pcnet.rx_buffer_addr = dev.uncached_alias + pcnet.rx_buffer_addr_phys; - pcnet.tx_buffer_addr = dev.uncached_alias + pcnet.tx_buffer_addr_phys; - CPCNetDescriptorEntry *entry = pcnet.rx_de_buffer; for (de_index = 0; de_index < PCNET_RX_BUFF_COUNT; de_index++) { PCNetDescriptorEntryInit(&entry[de_index], - pcnet.rx_buffer_addr + de_index * ETHERNET_FRAME_SIZE, + pcnet.rx_buffer_addr_phys + de_index * ETHERNET_FRAME_SIZE, TRUE); // TRUE for is_rx. } @@ -286,7 +278,7 @@ U0 PCNetBuffersAllocate() for (de_index = 0; de_index < PCNET_TX_BUFF_COUNT; de_index++) { PCNetDescriptorEntryInit(&entry[de_index], - pcnet.tx_buffer_addr + de_index * ETHERNET_FRAME_SIZE, + pcnet.tx_buffer_addr_phys + de_index * ETHERNET_FRAME_SIZE, FALSE); // FALSE for is_rx. } } @@ -343,11 +335,11 @@ U0 PCNetDirectInit() Bitshift right of 16 will replace first 16 bits with upper 16 bits, remaining bits cleared.*/ - PCNetCSRWrite(PCNET_CSR_BADRL, pcnet.rx_buffer_addr & 0xFFFF); - PCNetCSRWrite(PCNET_CSR_BADRU, pcnet.rx_buffer_addr >> 16); + PCNetCSRWrite(PCNET_CSR_BADRL, pcnet.rx_buffer_addr_phys & 0xFFFF); + PCNetCSRWrite(PCNET_CSR_BADRU, pcnet.rx_buffer_addr_phys >> 16); - PCNetCSRWrite(PCNET_CSR_BADTL, pcnet.tx_buffer_addr & 0xFFFF); - PCNetCSRWrite(PCNET_CSR_BADTU, pcnet.tx_buffer_addr >> 16); + PCNetCSRWrite(PCNET_CSR_BADTL, pcnet.tx_buffer_addr_phys & 0xFFFF); + PCNetCSRWrite(PCNET_CSR_BADTU, pcnet.tx_buffer_addr_phys >> 16); /* AMD PCNet datasheet p. 1-967 Default value at hardware init is @@ -399,11 +391,11 @@ U0 PCNetInterruptCSRSet() U32 csr = PCNetCSRRead(PCNET_CSR_INTERRUPTS); - PCIBtr(&csr, PCNET_INT_BSWP); - PCIBtr(&csr, PCNET_INT_RINTM); + Btr(&csr, PCNET_INT_BSWP); + Btr(&csr, PCNET_INT_RINTM); - PCIBts(&csr, PCNET_INT_IDONM); - PCIBts(&csr, PCNET_INT_TINTM); + Bts(&csr, PCNET_INT_IDONM); + Bts(&csr, PCNET_INT_TINTM); PCNetCSRWrite(PCNET_CSR_INTERRUPTS, csr); } @@ -416,7 +408,7 @@ U0 PCNetTXAutoPadEnable() U32 csr = PCNetCSRRead(PCNET_CSR_FEATURECTRL); - PCIBts(&csr, PCNET_FEATURE_APADXMT); + Bts(&csr, PCNET_FEATURE_APADXMT); PCNetCSRWrite(PCNET_CSR_FEATURECTRL, csr); } @@ -431,14 +423,33 @@ U0 PCNetConfigModeExit() U32 csr = PCNetCSRRead(PCNET_CSR_CTRLSTATUS); - PCIBtr(&csr, PCNET_CTRL_INIT); - PCIBtr(&csr, PCNET_CTRL_STOP); + Btr(&csr, PCNET_CTRL_INIT); + Btr(&csr, PCNET_CTRL_STOP); - PCIBts(&csr, PCNET_CTRL_STRT); + Bts(&csr, PCNET_CTRL_STRT); PCNetCSRWrite(PCNET_CSR_CTRLSTATUS, csr); } +U0 PCNetUploadConfig() +{/* Upload new config and wait for card to acknowlege */ + U32 csr = PCNetCSRRead(PCNET_CSR_CTRLSTATUS); + + Bts(&csr, PCNET_CTRL_INIT); + Bts(&csr, PCNET_CTRL_IENA); + + PCNetCSRWrite(PCNET_CSR_CTRLSTATUS, csr); + + Btr(&csr, PCNET_CTRL_IDON); + + while (!Bt(&csr, PCNET_CTRL_IDON)) + { + Yield; + csr = PCNetCSRRead(PCNET_CSR_CTRLSTATUS); + } +} + + I64 PCNetDriverOwns(CPCNetDescriptorEntry* entry) {/* Returns whether the value of the OWN bit of the Descriptor Entry is zero. If 0, driver owns, @@ -495,9 +506,7 @@ I64 PCNetTransmitPacketAllocate(U8 **packet_buffer_out, I64 length) pcnet.current_tx_de_index = (pcnet.current_tx_de_index + 1) & (PCNET_TX_BUFF_COUNT - 1); - *packet_buffer_out = pcnet.tx_buffer_addr + de_index * ETHERNET_FRAME_SIZE; - - MemSet(*packet_buffer_out, 0, ETHERNET_FRAME_SIZE); // Clear buffer contents in advance. + *packet_buffer_out = pcnet.tx_buffer_addr_phys + de_index * ETHERNET_FRAME_SIZE; NetLog("PCNET ALLOCATE TX PACKET: de_index: %X.", de_index); return de_index; @@ -543,7 +552,7 @@ I64 PCNetPacketReceive(U8 **packet_buffer_out, U16 *packet_length_out) pcnet.current_rx_de_index = (pcnet.current_rx_de_index + 1) & (PCNET_RX_BUFF_COUNT - 1); NetDebug("PCNET RECEIVE PACKET: de_index incremented = 0x%0X", pcnet.current_rx_de_index); - *packet_buffer_out = pcnet.rx_buffer_addr + de_index * ETHERNET_FRAME_SIZE; + *packet_buffer_out = pcnet.rx_buffer_addr_phys + de_index * ETHERNET_FRAME_SIZE; *packet_length_out = packet_length; return de_index; @@ -584,11 +593,12 @@ interrupt U0 PCNetIRQ() if (de_index >= 0) // todo: necessary? check increment logic in PCNetPacketReceive. { NetLog("PCNET IRQ: Pushing copy into Net Queue, releasing receive packet."); - NetQueuePush(packet_buffer, packet_length); + // uncached read + NetQueuePush(packet_buffer + dev.uncached_alias, packet_length); PCNetReceivePacketRelease(de_index); } - PCIBts(&csr, PCNET_CTRL_RINT); + Bts(&csr, PCNET_CTRL_RINT); PCNetCSRWrite(PCNET_CSR_CTRLSTATUS, csr); @@ -651,10 +661,10 @@ U0 PCNetInit() PCNet32BitModeEnable; U32 csr = PCNetCSRRead(PCNET_CSR_CTRLSTATUS); - NetLog("PCNET INIT START: what is INIT ?: %d", PCIBt(&csr, PCNET_CTRL_INIT)); - NetLog("PCNET INIT START: what is STRT ?: %d", PCIBt(&csr, PCNET_CTRL_STRT)); - NetLog("PCNET INIT START: what is STOP ?: %d", PCIBt(&csr, PCNET_CTRL_STOP)); - NetLog("PCNET INIT START: what is RINT ?: %d", PCIBt(&csr, PCNET_CTRL_RINT)); + NetLog("PCNET INIT START: what is INIT ?: %d", Bt(&csr, PCNET_CTRL_INIT)); + NetLog("PCNET INIT START: what is STRT ?: %d", Bt(&csr, PCNET_CTRL_STRT)); + NetLog("PCNET INIT START: what is STOP ?: %d", Bt(&csr, PCNET_CTRL_STOP)); + NetLog("PCNET INIT START: what is RINT ?: %d", Bt(&csr, PCNET_CTRL_RINT)); PCNetSWStyleSet; @@ -671,31 +681,28 @@ U0 PCNetInit() PCNetTXAutoPadEnable; - PCNetCSRWrite(0, PCNetCSRRead(0) | 1 | 1 << 6); // ? + PCNetUploadConfig; csr = PCNetCSRRead(PCNET_CSR_CTRLSTATUS); - NetLog("PCNET INIT UPLOAD: what is INIT ?: %d", PCIBt(&csr, PCNET_CTRL_INIT)); - NetLog("PCNET INIT UPLOAD: what is STRT ?: %d", PCIBt(&csr, PCNET_CTRL_STRT)); - NetLog("PCNET INIT UPLOAD: what is STOP ?: %d", PCIBt(&csr, PCNET_CTRL_STOP)); - NetLog("PCNET INIT UPLOAD: what is RINT ?: %d", PCIBt(&csr, PCNET_CTRL_RINT)); - - while (!(PCNetCSRRead(0) & 1 << 8)) // ? - Yield; + NetLog("PCNET INIT UPLOAD: what is INIT ?: %d", Bt(&csr, PCNET_CTRL_INIT)); + NetLog("PCNET INIT UPLOAD: what is STRT ?: %d", Bt(&csr, PCNET_CTRL_STRT)); + NetLog("PCNET INIT UPLOAD: what is STOP ?: %d", Bt(&csr, PCNET_CTRL_STOP)); + NetLog("PCNET INIT UPLOAD: what is RINT ?: %d", Bt(&csr, PCNET_CTRL_RINT)); PCNetConfigModeExit; Sleep(100); //? necessary? csr = PCNetCSRRead(PCNET_CSR_CTRLSTATUS); - NetLog("PCNET INIT END: what is INIT ?: %d", PCIBt(&csr, PCNET_CTRL_INIT)); - NetLog("PCNET INIT END: what is STRT ?: %d", PCIBt(&csr, PCNET_CTRL_STRT)); - NetLog("PCNET INIT END: what is STOP ?: %d", PCIBt(&csr, PCNET_CTRL_STOP)); - NetLog("PCNET INIT END: what is RINT ?: %d", PCIBt(&csr, PCNET_CTRL_RINT)); - NetLog("PCNET INIT END: what is TXON ?: %d", PCIBt(&csr, 4)); - NetLog("PCNET INIT END: what is RXON ?: %d", PCIBt(&csr, 5)); + NetLog("PCNET INIT END: what is INIT ?: %d", Bt(&csr, PCNET_CTRL_INIT)); + NetLog("PCNET INIT END: what is STRT ?: %d", Bt(&csr, PCNET_CTRL_STRT)); + NetLog("PCNET INIT END: what is STOP ?: %d", Bt(&csr, PCNET_CTRL_STOP)); + NetLog("PCNET INIT END: what is RINT ?: %d", Bt(&csr, PCNET_CTRL_RINT)); + NetLog("PCNET INIT END: what is TXON ?: %d", Bt(&csr, 4)); + NetLog("PCNET INIT END: what is RXON ?: %d", Bt(&csr, 5)); csr = PCNetCSRRead(PCNET_CSR_POLLINT); - NetLog("PCNET INIT END: what is POLLINT ?: %d", PCIBt(&csr, PCNET_CTRL_RINT)); + NetLog("PCNET INIT END: what is POLLINT ?: %d", Bt(&csr, PCNET_CTRL_RINT)); NetLog("PCNET INIT END: Redirecting interrupts."); PCNetInterruptsSetup; @@ -726,6 +733,7 @@ I64 EthernetFrameAllocate(U8 **packet_buffer_out, } de_index = PCNetTransmitPacketAllocate(ðernet_frame, ETHERNET_MAC_HEADER_LENGTH + packet_length); + ethernet_frame += dev.uncached_alias; // Make write uncached if (de_index < 0) { @@ -733,6 +741,8 @@ I64 EthernetFrameAllocate(U8 **packet_buffer_out, return -1; // Positive value expected. Functions calling this must factor this in. } + MemSet(ethernet_frame, 0, ETHERNET_FRAME_SIZE); // Clear buffer contents in advance. + MemCopy(ethernet_frame, destination_address, MAC_ADDRESS_LENGTH); MemCopy(ethernet_frame + MAC_ADDRESS_LENGTH, source_address, MAC_ADDRESS_LENGTH); @@ -753,7 +763,7 @@ U0 NetStop() { // Halt network activity by setting STOP bit on Status CSR. U32 csr = PCNetCSRRead(PCNET_CSR_CTRLSTATUS); - PCIBts(&csr, PCNET_CTRL_STOP); + Bts(&csr, PCNET_CTRL_STOP); PCNetCSRWrite(PCNET_CSR_CTRLSTATUS, csr); @@ -763,7 +773,7 @@ U0 NetStart() { // Continue network activity. Setting START bit clears STOP/INIT. U32 csr = PCNetCSRRead(PCNET_CSR_CTRLSTATUS); - PCIBts(&csr, PCNET_CTRL_STRT); + Bts(&csr, PCNET_CTRL_STRT); PCNetCSRWrite(PCNET_CSR_CTRLSTATUS, csr); } From ff2bbca1ab71bed291ffb44da498969f4b1a2cf2 Mon Sep 17 00:00:00 2001 From: Slapparoo Date: Mon, 19 Dec 2022 22:32:49 +1300 Subject: [PATCH 06/10] Convenience method FreeAll --- src/Kernel/KernelC.HH | 3 ++- src/Kernel/Memory/MAllocFree.ZC | 7 +++++++ 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/src/Kernel/KernelC.HH b/src/Kernel/KernelC.HH index 9bd4886a..8fba36fa 100755 --- a/src/Kernel/KernelC.HH +++ b/src/Kernel/KernelC.HH @@ -555,6 +555,7 @@ public extern U8 *ReAlloc( U8 *src, U64 size, CTask *mem_task=NU public _extern _MHEAP_CTRL CHeapCtrl *MHeapCtrl( U8 *src); public _extern _MSIZE I64 MSize( U8 *src); //size of heap object public _extern _MSIZE2 I64 MSize2( U8 *src); //Internal size +public extern U0 FreeAll(...); //Free all pointers passed #help_index "Memory/HeapCtrl" public extern U0 HeapCtrlDel( CHeapCtrl *hc); @@ -735,4 +736,4 @@ public extern F64 tS(); //From SysTimerFreq. #help_index "Windows" public extern Bool WinInside(I64 x, I64 y, CTask *task=NULL, I64 border=0); -#help_index "" \ No newline at end of file +#help_index "" diff --git a/src/Kernel/Memory/MAllocFree.ZC b/src/Kernel/Memory/MAllocFree.ZC index 92912b7d..969b9567 100755 --- a/src/Kernel/Memory/MAllocFree.ZC +++ b/src/Kernel/Memory/MAllocFree.ZC @@ -504,3 +504,10 @@ U8 *SysStrNew(U8 *buf) {//Alloc copy of string in System task's heap. return StrNew(buf, sys_task); } + +U0 FreeAll(...) +{// Free all pointers passed + U64 cur_arg = 0; + while (argc--) + Free(argv[cur_arg++]); +} From aa1066c5bb8d42db4fe263fcb8139e886256bab5 Mon Sep 17 00:00:00 2001 From: tinkeros Date: Tue, 20 Dec 2022 12:35:22 -0600 Subject: [PATCH 07/10] Fix PCNet driver for real hardware usage Align memory buffers Delay enabling interrupts until config is complete Adds functions to Read/Write BCR registers Configures link related BCR registers --- src/Home/Net/Drivers/PCNet.ZC | 62 +++++++++++++++++++++++++++++++---- 1 file changed, 56 insertions(+), 6 deletions(-) diff --git a/src/Home/Net/Drivers/PCNet.ZC b/src/Home/Net/Drivers/PCNet.ZC index 65acfb7a..28b37432 100644 --- a/src/Home/Net/Drivers/PCNet.ZC +++ b/src/Home/Net/Drivers/PCNet.ZC @@ -23,8 +23,12 @@ #define PCNET_DW_RDP 0x10 #define PCNET_DW_RAP 0x14 +#define PCNET_DW_BDP 0x1c #define PCNET_DW_RESET 0x18 // reset reg location when card is in 32-bit mode +#define PCNET_BCR_MISC_CONFIG 2 +#define PCNET_BCR_FULL_DUPLEX_CTRL 9 + #define PCNET_CSR_CTRLSTATUS 0 #define PCNET_CSR_INTERRUPTS 3 #define PCNET_CSR_FEATURECTRL 4 @@ -57,6 +61,11 @@ #define PCNET_FEATURE_APADXMT 11 +#define PCNET_BCR_MISC_CONFIG_ASEL 1 + +#define PCNET_BCR_FULL_DUPLEX_CTRL_FDEN 0 +#define PCNET_BCR_FULL_DUPLEX_CTRL_AUIFD 1 + #define PCNET_CTRL_INIT 0 #define PCNET_CTRL_STRT 1 #define PCNET_CTRL_STOP 2 @@ -159,6 +168,28 @@ U0 PCNetRAPWrite(U32 value) OutU32(PCNetIOBaseGet + PCNET_DW_RAP, value); } +U0 PCNetBCRWrite(U32 bcr, U32 value) +{/* AMD PCNet datasheet p. 1-952 + Summary: Bus Control Registers are + accessed via the BDP (Bus Data Port). + Which BCR is selected is based on the value + in the RAP. */ + + PCNetRAPWrite(bcr); + OutU32(PCNetIOBaseGet + PCNET_DW_BDP, value); +} + +U32 PCNetBCRRead(U32 bcr) +{/* AMD PCNet datasheet p. 1-952 + Summary: Bus Control Registers are + accessed via the BDP (Bus Data Port). + Which BCR is selected is based on the value + in the RAP. */ + + PCNetRAPWrite(bcr); + return InU32(PCNetIOBaseGet + PCNET_DW_BDP); +} + U0 PCNetCSRWrite(U32 csr, U32 value) {/* AMD PCNet datasheet p. 1-952 Summary: Control and Status Registers are @@ -181,6 +212,22 @@ U32 PCNetCSRRead(U32 csr) return InU32(PCNetIOBaseGet + PCNET_DW_RDP); } +U0 PCNetAutoLinkSelect() +{ + U32 bcr = PCNetCSRRead(PCNET_BCR_FULL_DUPLEX_CTRL); + Bts(&bcr,PCNET_BCR_FULL_DUPLEX_CTRL_FDEN); + Bts(&bcr,PCNET_BCR_FULL_DUPLEX_CTRL_AUIFD); + PCNetBCRWrite(PCNET_BCR_FULL_DUPLEX_CTRL,bcr); +} + +U0 PCNetEnableFullDuplex() +{ + U32 bcr = PCNetCSRRead(PCNET_BCR_MISC_CONFIG); + Bts(&bcr,PCNET_BCR_MISC_CONFIG_ASEL); + PCNetBCRWrite(PCNET_BCR_MISC_CONFIG,bcr); +} + + U0 PCNetSWStyleSet() {/* AMD PCNet datasheet p. 1-968 In CSR58 (Software Style), the 8-bit @@ -260,9 +307,9 @@ U0 PCNetBuffersAllocate() pcnet.rx_de_buffer = dev.uncached_alias + pcnet.rx_de_buffer_phys; // we want uncached pcnet.tx_de_buffer = dev.uncached_alias + pcnet.tx_de_buffer_phys; // access to these. - pcnet.rx_buffer_addr_phys = CAlloc(ETHERNET_FRAME_SIZE * PCNET_RX_BUFF_COUNT, Fs->code_heap); + pcnet.rx_buffer_addr_phys = CAllocAligned(ETHERNET_FRAME_SIZE * PCNET_RX_BUFF_COUNT, 16, Fs->code_heap); - pcnet.tx_buffer_addr_phys = CAlloc(ETHERNET_FRAME_SIZE * PCNET_TX_BUFF_COUNT, Fs->code_heap); + pcnet.tx_buffer_addr_phys = CAllocAligned(ETHERNET_FRAME_SIZE * PCNET_TX_BUFF_COUNT, 16, Fs->code_heap); //Shrine does a check and returns -1 here, if the end of either buffer exceeds 0x100000000 @@ -361,7 +408,7 @@ U0 PCNetDirectInit() U8 *PCNetInitBlockSetup() { - U8 *setup = CAlloc(sizeof(CPCNetBufferSetup), Fs->code_heap); + U8 *setup = CAllocAligned(sizeof(CPCNetBufferSetup), 16, Fs->code_heap); CPCNetBufferSetup *u_setup = setup + dev.uncached_alias; U32 p_setup; @@ -426,6 +473,7 @@ U0 PCNetConfigModeExit() Btr(&csr, PCNET_CTRL_INIT); Btr(&csr, PCNET_CTRL_STOP); + Bts(&csr, PCNET_CTRL_IENA); Bts(&csr, PCNET_CTRL_STRT); PCNetCSRWrite(PCNET_CSR_CTRLSTATUS, csr); @@ -433,10 +481,9 @@ U0 PCNetConfigModeExit() U0 PCNetUploadConfig() {/* Upload new config and wait for card to acknowlege */ - U32 csr = PCNetCSRRead(PCNET_CSR_CTRLSTATUS); + U32 csr = 0; Bts(&csr, PCNET_CTRL_INIT); - Bts(&csr, PCNET_CTRL_IENA); PCNetCSRWrite(PCNET_CSR_CTRLSTATUS, csr); @@ -449,7 +496,6 @@ U0 PCNetUploadConfig() } } - I64 PCNetDriverOwns(CPCNetDescriptorEntry* entry) {/* Returns whether the value of the OWN bit of the Descriptor Entry is zero. If 0, driver owns, @@ -681,6 +727,10 @@ U0 PCNetInit() PCNetTXAutoPadEnable; + PCNetAutoLinkSelect; + + PCNetEnableFullDuplex; + PCNetUploadConfig; csr = PCNetCSRRead(PCNET_CSR_CTRLSTATUS); From 113961a0d96cfd0a7f913d487c3f1d9c6e8ca62b Mon Sep 17 00:00:00 2001 From: TomAwezome Date: Wed, 21 Dec 2022 03:23:47 -0500 Subject: [PATCH 08/10] Fix PCNet PR formatting. --- src/Home/Net/Drivers/PCNet.ZC | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/src/Home/Net/Drivers/PCNet.ZC b/src/Home/Net/Drivers/PCNet.ZC index 28b37432..26b09f1d 100644 --- a/src/Home/Net/Drivers/PCNet.ZC +++ b/src/Home/Net/Drivers/PCNet.ZC @@ -23,7 +23,7 @@ #define PCNET_DW_RDP 0x10 #define PCNET_DW_RAP 0x14 -#define PCNET_DW_BDP 0x1c +#define PCNET_DW_BDP 0x1C #define PCNET_DW_RESET 0x18 // reset reg location when card is in 32-bit mode #define PCNET_BCR_MISC_CONFIG 2 @@ -215,16 +215,20 @@ U32 PCNetCSRRead(U32 csr) U0 PCNetAutoLinkSelect() { U32 bcr = PCNetCSRRead(PCNET_BCR_FULL_DUPLEX_CTRL); - Bts(&bcr,PCNET_BCR_FULL_DUPLEX_CTRL_FDEN); - Bts(&bcr,PCNET_BCR_FULL_DUPLEX_CTRL_AUIFD); - PCNetBCRWrite(PCNET_BCR_FULL_DUPLEX_CTRL,bcr); + + Bts(&bcr, PCNET_BCR_FULL_DUPLEX_CTRL_FDEN); + Bts(&bcr, PCNET_BCR_FULL_DUPLEX_CTRL_AUIFD); + + PCNetBCRWrite(PCNET_BCR_FULL_DUPLEX_CTRL, bcr); } U0 PCNetEnableFullDuplex() { U32 bcr = PCNetCSRRead(PCNET_BCR_MISC_CONFIG); - Bts(&bcr,PCNET_BCR_MISC_CONFIG_ASEL); - PCNetBCRWrite(PCNET_BCR_MISC_CONFIG,bcr); + + Bts(&bcr, PCNET_BCR_MISC_CONFIG_ASEL); + + PCNetBCRWrite(PCNET_BCR_MISC_CONFIG, bcr); } From 6d6c059f38784b5aa8655ed27275bbc58d94fa50 Mon Sep 17 00:00:00 2001 From: TomAwezome Date: Wed, 21 Dec 2022 03:33:23 -0500 Subject: [PATCH 09/10] Fix FreeAll PR formatting. --- src/Kernel/KernelC.HH | 2 +- src/Kernel/Memory/MAllocFree.ZC | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/src/Kernel/KernelC.HH b/src/Kernel/KernelC.HH index 8fba36fa..f050d7ee 100755 --- a/src/Kernel/KernelC.HH +++ b/src/Kernel/KernelC.HH @@ -555,7 +555,7 @@ public extern U8 *ReAlloc( U8 *src, U64 size, CTask *mem_task=NU public _extern _MHEAP_CTRL CHeapCtrl *MHeapCtrl( U8 *src); public _extern _MSIZE I64 MSize( U8 *src); //size of heap object public _extern _MSIZE2 I64 MSize2( U8 *src); //Internal size -public extern U0 FreeAll(...); //Free all pointers passed +public extern U0 FreeAll(...); //Free all pointers passed #help_index "Memory/HeapCtrl" public extern U0 HeapCtrlDel( CHeapCtrl *hc); diff --git a/src/Kernel/Memory/MAllocFree.ZC b/src/Kernel/Memory/MAllocFree.ZC index 969b9567..a72c0565 100755 --- a/src/Kernel/Memory/MAllocFree.ZC +++ b/src/Kernel/Memory/MAllocFree.ZC @@ -508,6 +508,7 @@ U8 *SysStrNew(U8 *buf) U0 FreeAll(...) {// Free all pointers passed U64 cur_arg = 0; + while (argc--) Free(argv[cur_arg++]); } From b14b48571694137f47ab204d3c1ef694517eb40d Mon Sep 17 00:00:00 2001 From: TomAwezome Date: Wed, 21 Dec 2022 03:43:23 -0500 Subject: [PATCH 10/10] Document Slapparoo's FreeAll implementation in ChangeLog.DD. --- src/Doc/ChangeLog.DD | 4 ++++ src/Kernel/KGlobals.ZC | 2 +- src/System/Define.ZC | 4 ++-- 3 files changed, 7 insertions(+), 3 deletions(-) diff --git a/src/Doc/ChangeLog.DD b/src/Doc/ChangeLog.DD index 4c92ea5d..2cb3cad5 100755 --- a/src/Doc/ChangeLog.DD +++ b/src/Doc/ChangeLog.DD @@ -1,4 +1,8 @@ $WW,1$$FG,5$$TX+CX,"ChangeLog"$$FG$ +$IV,1$----12/21/22 03:38:35----$IV,0$ +* Raised version number to 2.01. +* Created $LK+PU,"FreeAll",A="MN:FreeAll"$ method to /Kernel/Memory/MAllocFree.ZC and extern to $LK+PU,"/Kernel/KernelC.HH",A="FF:::/Kernel/KernelC.HH,FreeAll"$. + $IV,1$----11/02/22 20:26:55----$IV,0$ * Raised version number to 2.00. * Updated the $LK,"Charter",A="FI:::/Doc/Charter.DD"$ to allow non-Public-Domain MBR/UEFI bootloaders, as long as the Public Domain ZealOS HDD/DVD Boot Loaders are included, offered, and functional. The Charter upholds that all operating system code must still be 100% public domain. Updated $LK+PU,"Credits",A="FI:::/Doc/Credits.DD"$, $LK+PU,"FAQ",A="FI:::/Doc/FAQ.DD"$, $LK+PU,"Features.DD",A="FI:::/Doc/Features.DD"$, $LK+PU,"Welcome.DD",A="FI:::/Doc/Welcome.DD"$. diff --git a/src/Kernel/KGlobals.ZC b/src/Kernel/KGlobals.ZC index 17c3558d..3ccd954e 100755 --- a/src/Kernel/KGlobals.ZC +++ b/src/Kernel/KGlobals.ZC @@ -13,7 +13,7 @@ CTask *sys_winmgr_task, U8 *rev_bits_table; //Table with U8 bits reversed CDate local_time_offset; F64 *pow10_I64, - sys_os_version = 2.00; + sys_os_version = 2.01; CAutoCompleteDictGlobals acd; CAutoCompleteGlobals ac; diff --git a/src/System/Define.ZC b/src/System/Define.ZC index 3130a724..bf8e7bcd 100755 --- a/src/System/Define.ZC +++ b/src/System/Define.ZC @@ -15,8 +15,8 @@ U0 LoadDocDefines() //$LK,"DD_BOOT_HIGH_LOC_DVD",A="FF:::/System/Boot/BootDVD.ZC,DD_BOOT_HIGH_LOC_DVD"$ $TR,"LineRep"$ -$ID,2$DefinePrint("DD_ZEALOS_LOC","98,675"); -$ID,-2$ +$ID,2$DefinePrint("DD_ZEALOS_LOC","98,709"); +$ID,-2$ DefinePrint("DD_MP_VECT", "%08X", MP_VECT_ADDR); DefinePrint("DD_MP_VECT_END", "%08X", MP_VECT_ADDR + COREAP_16BIT_INIT_END - COREAP_16BIT_INIT - 1);