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TomAwezome 1b75d91002 Fix Mount AHCI Port selection. 
Add arg to SATARep to specify drive types to show.
Add checks in AHCIPortInit to verify port signatures, add helper method to get signatures from port.
2021-08-02 16:40:05 -04:00

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<a name="l1"></a><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICFOpEqu</span><span class=cF0>(</span><span class=cF9>CCompCtrl</span><span class=cF0> *cc, </span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> op, </span><span class=cF1>U8</span><span class=cF0> *buf2, </span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l2"></a>{</span><span class=cF2>//for ADD,SUB,DIV,MUL</span><span class=cF0>
<a name="l3"></a> </span><span class=cF9>CICArg</span><span class=cF0> *arg1 = &amp;tmpi-&gt;arg1, *arg2 = &amp;tmpi-&gt;arg2;
<a name="l4"></a> </span><span class=cF1>Bool</span><span class=cF0> dont_push_float, dont_pop_float, p1_mem;
<a name="l5"></a> </span><span class=cF9>I64</span><span class=cF0> rsp_size = </span><span class=cFE>0</span><span class=cF0>, builtin2 = </span><span class=cFE>0</span><span class=cF0>, t1, r1, d1, t2, r2, d2;
<a name="l6"></a>
<a name="l7"></a> </span><span class=cF1>if</span><span class=cF0> (cc-&gt;flags &amp; </span><span class=cF3>CCF_AOT_COMPILE</span><span class=cF0>)
<a name="l8"></a> buf2 = cc-&gt;aotc-&gt;rip;
<a name="l9"></a>
<a name="l10"></a> </span><span class=cFD>CompSetFloatOpPushPop</span><span class=cF0>(cc, tmpi, &amp;dont_push_float, &amp;dont_pop_float);
<a name="l11"></a> </span><span class=cF1>if</span><span class=cF0> (dont_pop_float)
<a name="l12"></a> </span><span class=cF5>throw</span><span class=cF0>(</span><span class=cF6>'Compiler'</span><span class=cF0>);
<a name="l13"></a>
<a name="l14"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_BY_VAL</span><span class=cF0>)
<a name="l15"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l16"></a> p1_mem = </span><span class=cF3>FALSE</span><span class=cF0>;
<a name="l17"></a> </span><span class=cF1>if</span><span class=cF0> (dont_push_float)
<a name="l18"></a> {
<a name="l19"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg1_type_pointed_to != </span><span class=cF3>RT_F64</span><span class=cF0>)
<a name="l20"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l21"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>,
<a name="l22"></a> arg1-&gt;type &amp; </span><span class=cF3>MDG_MASK</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to,
<a name="l23"></a> arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg1-&gt;disp, rip);
<a name="l24"></a> </span><span class=cFD>ICFConvert2</span><span class=cF0>(cc, tmpi, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>FALSE</span><span class=cF0>, rip);
<a name="l25"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l26"></a> t1 = </span><span class=cF3>MDF_SIB</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l27"></a> r1 = </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>;
<a name="l28"></a> d1 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l29"></a> rsp_size += </span><span class=cFE>8</span><span class=cF0>;
<a name="l30"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l31"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l32"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l33"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg1_type_pointed_to &gt;= </span><span class=cF3>RT_I64</span><span class=cF0> &amp;&amp; arg1-&gt;type &amp; </span><span class=cF3>MDG_DISP_SIB_RIP</span><span class=cF0>)
<a name="l34"></a> {
<a name="l35"></a> t1 = arg1-&gt;type &amp; </span><span class=cF3>MDG_MASK</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to;
<a name="l36"></a> r1 = arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>;
<a name="l37"></a> d1 = arg1-&gt;disp;
<a name="l38"></a> p1_mem = </span><span class=cF3>TRUE</span><span class=cF0>;
<a name="l39"></a> }
<a name="l40"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l41"></a> {
<a name="l42"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi, arg1-&gt;type &amp; </span><span class=cF3>MDG_MASK</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to, arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg1-&gt;disp, rip);
<a name="l43"></a> t1 = </span><span class=cF3>MDF_SIB</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l44"></a> r1 = </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>;
<a name="l45"></a> d1 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l46"></a> rsp_size += </span><span class=cFE>8</span><span class=cF0>;
<a name="l47"></a> }
<a name="l48"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l49"></a> }
<a name="l50"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l51"></a> {
<a name="l52"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg1_type_pointed_to != </span><span class=cF3>RT_F64</span><span class=cF0> || arg1-&gt;type &amp; </span><span class=cF3>MDF_STACK</span><span class=cF0>)
<a name="l53"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l54"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, arg2-&gt;type, arg2-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg2-&gt;disp, rip);
<a name="l55"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>,
<a name="l56"></a> arg1-&gt;type &amp; </span><span class=cF3>MDG_MASK</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to,
<a name="l57"></a> arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg1-&gt;disp, rip);
<a name="l58"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg1_type_pointed_to != </span><span class=cF3>RT_F64</span><span class=cF0>)
<a name="l59"></a> </span><span class=cFD>ICFConvert2</span><span class=cF0>(cc, tmpi, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>FALSE</span><span class=cF0>, rip);
<a name="l60"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0x5052</span><span class=cF0>); </span><span class=cF2>//PUSH EDX PUSH EAX</span><span class=cF0>
<a name="l61"></a> rsp_size = </span><span class=cFE>16</span><span class=cF0>;
<a name="l62"></a> t1 = </span><span class=cF3>MDF_SIB</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l63"></a> r1 = </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>;
<a name="l64"></a> d1 = </span><span class=cFE>8</span><span class=cF0>;
<a name="l65"></a> t2 = </span><span class=cF3>MDF_SIB</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l66"></a> r2 = </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>;
<a name="l67"></a> d2 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l68"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l69"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l70"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l71"></a> </span><span class=cF1>if</span><span class=cF0> (arg2-&gt;type.raw_type &gt;= </span><span class=cF3>RT_I64</span><span class=cF0> &amp;&amp; arg2-&gt;type &amp; </span><span class=cF3>MDG_DISP_SIB_RIP</span><span class=cF0>)
<a name="l72"></a> {
<a name="l73"></a> t2 = arg2-&gt;type;
<a name="l74"></a> r2 = arg2-&gt;</span><span class=cF1>reg</span><span class=cF0>;
<a name="l75"></a> d2 = arg2-&gt;disp;
<a name="l76"></a> }
<a name="l77"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l78"></a> {
<a name="l79"></a> </span><span class=cF1>if</span><span class=cF0> (arg2-&gt;type &amp; </span><span class=cF3>MDF_IMM</span><span class=cF0>)
<a name="l80"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l81"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>builtin2 = </span><span class=cFD>ICBuiltInFloatConst</span><span class=cF0>(arg2-&gt;disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>)</span><span class=cF7>)</span><span class=cF0>)
<a name="l82"></a> {
<a name="l83"></a> t2 = </span><span class=cF3>MDF_RIP_DISP32</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l84"></a> r2 = </span><span class=cF3>REG_RIP</span><span class=cF0>;
<a name="l85"></a> d2 = </span><span class=cFD>COCFloatConstFind</span><span class=cF0>(cc, arg2-&gt;disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>) + buf2;
<a name="l86"></a> }
<a name="l87"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l88"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l89"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l90"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi, arg2-&gt;type, arg2-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg2-&gt;disp, rip);
<a name="l91"></a> t2 = </span><span class=cF3>MDF_SIB</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l92"></a> r2 = </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>;
<a name="l93"></a> d2 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l94"></a> rsp_size += </span><span class=cFE>8</span><span class=cF0>;
<a name="l95"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l96"></a> }
<a name="l97"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg1_type_pointed_to &gt;= </span><span class=cF3>RT_I64</span><span class=cF0> &amp;&amp; arg1-&gt;type &amp; </span><span class=cF3>MDG_DISP_SIB_RIP</span><span class=cF0>)
<a name="l98"></a> {
<a name="l99"></a> t1 = arg1-&gt;type &amp; </span><span class=cF3>MDG_MASK</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to;
<a name="l100"></a> r1 = arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>;
<a name="l101"></a> d1 = arg1-&gt;disp;
<a name="l102"></a> p1_mem = </span><span class=cF3>TRUE</span><span class=cF0>;
<a name="l103"></a> }
<a name="l104"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l105"></a> {
<a name="l106"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi, arg1-&gt;type &amp; </span><span class=cF3>MDG_MASK</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to, arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg1-&gt;disp, rip);
<a name="l107"></a> t1 = </span><span class=cF3>MDF_SIB</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l108"></a> r1 = </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>;
<a name="l109"></a> d1 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l110"></a> rsp_size += </span><span class=cFE>8</span><span class=cF0>;
<a name="l111"></a> </span><span class=cF1>if</span><span class=cF0> (r2 == </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>)
<a name="l112"></a> d2 += </span><span class=cFE>8</span><span class=cF0>;
<a name="l113"></a> }
<a name="l114"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l115"></a> }
<a name="l116"></a> </span><span class=cF1>if</span><span class=cF0> (!rsp_size &amp;&amp; !</span><span class=cF7>(</span><span class=cF0>p1_mem &amp;&amp; tmpi-&gt;arg1_type_pointed_to == </span><span class=cF3>RT_F64</span><span class=cF7>)</span><span class=cF0>)
<a name="l117"></a> {
<a name="l118"></a> rsp_size = </span><span class=cFE>8</span><span class=cF0>;
<a name="l119"></a> </span><span class=cFD>ICAddRSP</span><span class=cF0>(tmpi, -</span><span class=cFE>8</span><span class=cF0>);
<a name="l120"></a> }
<a name="l121"></a> </span><span class=cF1>if</span><span class=cF0> (!dont_push_float)
<a name="l122"></a> {
<a name="l123"></a> </span><span class=cF1>if</span><span class=cF0> (builtin2)
<a name="l124"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, builtin2);
<a name="l125"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l126"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, t2, r2, d2, SLASH_OP_FLD, rip);
<a name="l127"></a> }
<a name="l128"></a> </span><span class=cF1>switch</span><span class=cF0> (op.u8[</span><span class=cFE>0</span><span class=cF0>])
<a name="l129"></a> {
<a name="l130"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cFE>4</span><span class=cF0>:
<a name="l131"></a> op = SLASH_OP_FSUBR;
<a name="l132"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l133"></a>
<a name="l134"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cFE>6</span><span class=cF0>:
<a name="l135"></a> op = SLASH_OP_FDIVR;
<a name="l136"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l137"></a> }
<a name="l138"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, t1, r1, d1, op, rip);
<a name="l139"></a> </span><span class=cFD>CompNoteFloatOp</span><span class=cF0>(cc, tmpi, </span><span class=cF3>TRUE</span><span class=cF0>, </span><span class=cF3>FALSE</span><span class=cF0>, CN_INST);
<a name="l140"></a> </span><span class=cF1>if</span><span class=cF0> (p1_mem &amp;&amp; tmpi-&gt;arg1_type_pointed_to == </span><span class=cF3>RT_F64</span><span class=cF0>)
<a name="l141"></a> {
<a name="l142"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, t1, r1, d1, SLASH_OP_FSTP, rip);
<a name="l143"></a> </span><span class=cF1>if</span><span class=cF0> (rsp_size)
<a name="l144"></a> </span><span class=cFD>ICAddRSP</span><span class=cF0>(tmpi, rsp_size);
<a name="l145"></a> }
<a name="l146"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l147"></a> {
<a name="l148"></a> </span><span class=cF1>if</span><span class=cF0> (rsp_size == </span><span class=cFE>8</span><span class=cF0>)
<a name="l149"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_SIB</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, SLASH_OP_FSTP, rip);
<a name="l150"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (rsp_size &gt; </span><span class=cFE>8</span><span class=cF0>)
<a name="l151"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l152"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_SIB</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>, rsp_size - </span><span class=cFE>8</span><span class=cF0>, SLASH_OP_FSTP, rip);
<a name="l153"></a> </span><span class=cFD>ICAddRSP</span><span class=cF0>(tmpi, rsp_size - </span><span class=cFE>8</span><span class=cF0>);
<a name="l154"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l155"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg1_type_pointed_to != </span><span class=cF3>RT_F64</span><span class=cF0>)
<a name="l156"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l157"></a> </span><span class=cFD>ICPop</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l158"></a> </span><span class=cFD>ICFConvert2</span><span class=cF0>(cc, tmpi, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>TRUE</span><span class=cF0>, rip);
<a name="l159"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,arg1-&gt;type &amp; </span><span class=cF3>MDG_MASK</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to,
<a name="l160"></a> arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg1-&gt;disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l161"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l162"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l163"></a> </span><span class=cFD>ICPop</span><span class=cF0>(tmpi, arg1-&gt;type &amp; </span><span class=cF3>MDG_MASK</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to,
<a name="l164"></a> arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg1-&gt;disp, rip);
<a name="l165"></a> }
<a name="l166"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;res.type.mode)
<a name="l167"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp,
<a name="l168"></a> arg1-&gt;type &amp; </span><span class=cF3>MDG_MASK</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to,
<a name="l169"></a> arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg1-&gt;disp, rip);
<a name="l170"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l171"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l172"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l173"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg1_type_pointed_to &gt;= </span><span class=cF3>RT_I64</span><span class=cF0>)
<a name="l174"></a> p1_mem = </span><span class=cF3>TRUE</span><span class=cF0>;
<a name="l175"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l176"></a> p1_mem = </span><span class=cF3>FALSE</span><span class=cF0>;
<a name="l177"></a> </span><span class=cF1>if</span><span class=cF0> (dont_push_float)
<a name="l178"></a> {
<a name="l179"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, arg1-&gt;type, arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg1-&gt;disp, rip);
<a name="l180"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg1_type_pointed_to != </span><span class=cF3>RT_F64</span><span class=cF0>)
<a name="l181"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l182"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_DISP</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l183"></a> </span><span class=cFD>ICFConvert2</span><span class=cF0>(cc, tmpi, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>FALSE</span><span class=cF0>, rip);
<a name="l184"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l185"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l186"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l187"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l188"></a> t1 = </span><span class=cF3>MDF_SIB</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l189"></a> r1 = </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>;
<a name="l190"></a> d1 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l191"></a> rsp_size += </span><span class=cFE>8</span><span class=cF0>;
<a name="l192"></a> }
<a name="l193"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l194"></a> {
<a name="l195"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg1_type_pointed_to != </span><span class=cF3>RT_F64</span><span class=cF0> || arg1-&gt;type &amp; </span><span class=cF3>MDF_STACK</span><span class=cF0>)
<a name="l196"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l197"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, arg2-&gt;type, arg2-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg2-&gt;disp, rip);
<a name="l198"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, arg1-&gt;type, arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg1-&gt;disp, rip);
<a name="l199"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_DISP</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l200"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg1_type_pointed_to != </span><span class=cF3>RT_F64</span><span class=cF0>)
<a name="l201"></a> </span><span class=cFD>ICFConvert2</span><span class=cF0>(cc,tmpi, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>FALSE</span><span class=cF0>, rip);
<a name="l202"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0x5052</span><span class=cF0>); </span><span class=cF2>//PUSH EDX PUSH EAX</span><span class=cF0>
<a name="l203"></a> rsp_size = </span><span class=cFE>16</span><span class=cF0>;
<a name="l204"></a> t1 = </span><span class=cF3>MDF_SIB</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l205"></a> r1 = </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>;
<a name="l206"></a> d1 = </span><span class=cFE>8</span><span class=cF0>;
<a name="l207"></a> t2 = </span><span class=cF3>MDF_SIB</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l208"></a> r2 = </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>;
<a name="l209"></a> d2 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l210"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l211"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l212"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l213"></a> </span><span class=cF1>if</span><span class=cF0> (arg2-&gt;type.raw_type &gt;= </span><span class=cF3>RT_I64</span><span class=cF0> &amp;&amp; arg2-&gt;type &amp; </span><span class=cF3>MDG_DISP_SIB_RIP</span><span class=cF0>)
<a name="l214"></a> {
<a name="l215"></a> t2 = arg2-&gt;type;
<a name="l216"></a> r2 = arg2-&gt;</span><span class=cF1>reg</span><span class=cF0>;
<a name="l217"></a> d2 = arg2-&gt;disp;
<a name="l218"></a> }
<a name="l219"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l220"></a> {
<a name="l221"></a> </span><span class=cF1>if</span><span class=cF0> (arg2-&gt;type &amp; </span><span class=cF3>MDF_IMM</span><span class=cF0>)
<a name="l222"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l223"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>builtin2 = </span><span class=cFD>ICBuiltInFloatConst</span><span class=cF0>(arg2-&gt;disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>)</span><span class=cF7>)</span><span class=cF0>)
<a name="l224"></a> {
<a name="l225"></a> t2 = </span><span class=cF3>MDF_RIP_DISP32</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l226"></a> r2 = </span><span class=cF3>REG_RIP</span><span class=cF0>;
<a name="l227"></a> d2 = </span><span class=cFD>COCFloatConstFind</span><span class=cF0>(cc, arg2-&gt;disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>) + buf2;
<a name="l228"></a> }
<a name="l229"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l230"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l231"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l232"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi, arg2-&gt;type, arg2-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg2-&gt;disp, rip);
<a name="l233"></a> t2 = </span><span class=cF3>MDF_SIB</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l234"></a> r2 = </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>;
<a name="l235"></a> d2 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l236"></a> rsp_size += </span><span class=cFE>8</span><span class=cF0>;
<a name="l237"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l238"></a> }
<a name="l239"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, arg1-&gt;type, arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg1-&gt;disp, rip);
<a name="l240"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l241"></a> t1 = </span><span class=cF3>MDF_SIB</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l242"></a> r1 = </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>;
<a name="l243"></a> d1 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l244"></a> rsp_size += </span><span class=cFE>8</span><span class=cF0>;
<a name="l245"></a> </span><span class=cF1>if</span><span class=cF0> (r2 == </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>)
<a name="l246"></a> d2 += </span><span class=cFE>8</span><span class=cF0>;
<a name="l247"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l248"></a> }
<a name="l249"></a> </span><span class=cF1>if</span><span class=cF0> (!rsp_size &amp;&amp; !</span><span class=cF7>(</span><span class=cF0>p1_mem &amp;&amp; tmpi-&gt;arg1_type_pointed_to == </span><span class=cF3>RT_F64</span><span class=cF7>)</span><span class=cF0>)
<a name="l250"></a> {
<a name="l251"></a> rsp_size = </span><span class=cFE>8</span><span class=cF0>;
<a name="l252"></a> </span><span class=cFD>ICAddRSP</span><span class=cF0>(tmpi, -</span><span class=cFE>8</span><span class=cF0>);
<a name="l253"></a> }
<a name="l254"></a> </span><span class=cF1>if</span><span class=cF0> (!dont_push_float)
<a name="l255"></a> {
<a name="l256"></a> </span><span class=cF1>if</span><span class=cF0> (builtin2)
<a name="l257"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, builtin2);
<a name="l258"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l259"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, t2, r2, d2, SLASH_OP_FLD, rip);
<a name="l260"></a> }
<a name="l261"></a>
<a name="l262"></a> </span><span class=cF1>switch</span><span class=cF0> (op.u8[</span><span class=cFE>0</span><span class=cF0>])
<a name="l263"></a> {
<a name="l264"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cFE>4</span><span class=cF0>:
<a name="l265"></a> op = SLASH_OP_FSUBR;
<a name="l266"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l267"></a>
<a name="l268"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cFE>6</span><span class=cF0>:
<a name="l269"></a> op = SLASH_OP_FDIVR;
<a name="l270"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l271"></a> }
<a name="l272"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, t1, r1, d1, op, rip);
<a name="l273"></a> </span><span class=cFD>CompNoteFloatOp</span><span class=cF0>(cc, tmpi, </span><span class=cF3>TRUE</span><span class=cF0>, </span><span class=cF3>FALSE</span><span class=cF0>, CN_INST);
<a name="l274"></a> </span><span class=cF1>if</span><span class=cF0> (p1_mem &amp;&amp; tmpi-&gt;arg1_type_pointed_to == </span><span class=cF3>RT_F64</span><span class=cF0>)
<a name="l275"></a> {
<a name="l276"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, SLASH_OP_FSTP, rip);
<a name="l277"></a> </span><span class=cF1>if</span><span class=cF0> (rsp_size)
<a name="l278"></a> </span><span class=cFD>ICAddRSP</span><span class=cF0>(tmpi, rsp_size);
<a name="l279"></a> }
<a name="l280"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l281"></a> {
<a name="l282"></a> </span><span class=cF1>if</span><span class=cF0> (rsp_size == </span><span class=cFE>8</span><span class=cF0>)
<a name="l283"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_SIB</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, SLASH_OP_FSTP, rip);
<a name="l284"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (rsp_size &gt; </span><span class=cFE>8</span><span class=cF0>)
<a name="l285"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l286"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_SIB</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>, rsp_size - </span><span class=cFE>8</span><span class=cF0>, SLASH_OP_FSTP, rip);
<a name="l287"></a> </span><span class=cFD>ICAddRSP</span><span class=cF0>(tmpi, rsp_size - </span><span class=cFE>8</span><span class=cF0>);
<a name="l288"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l289"></a> </span><span class=cFD>ICPop</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l290"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg1_type_pointed_to != </span><span class=cF3>RT_F64</span><span class=cF0>)
<a name="l291"></a> </span><span class=cFD>ICFConvert2</span><span class=cF0>(cc, tmpi, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>TRUE</span><span class=cF0>, rip);
<a name="l292"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l293"></a> }
<a name="l294"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;res.type.mode)
<a name="l295"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l296"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l297"></a>}
<a name="l298"></a>
<a name="l299"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICFCmpAndBranch</span><span class=cF0>(</span><span class=cF9>CCompCtrl</span><span class=cF0> *cc, </span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip, </span><span class=cF9>I64</span><span class=cF0> us, </span><span class=cF9>I64</span><span class=cF0> not_us, </span><span class=cF1>U8</span><span class=cF0> *buf, </span><span class=cF9>I64</span><span class=cF0> rip2)
<a name="l300"></a>{
<a name="l301"></a> </span><span class=cF9>CICArg</span><span class=cF0> *arg1, *arg2;
<a name="l302"></a> </span><span class=cF1>Bool</span><span class=cF0> dont_push_float, dont_pop_float, alt, short_jmp;
<a name="l303"></a> </span><span class=cF9>I64</span><span class=cF0> i, rsp_size = </span><span class=cFE>0</span><span class=cF0>, builtin1 = </span><span class=cFE>0</span><span class=cF0>, builtin2 = </span><span class=cFE>0</span><span class=cF0>, t1, r1, d1, t2, r2, d2;
<a name="l304"></a> </span><span class=cF9>CCodeMisc</span><span class=cF0> *lb;
<a name="l305"></a> </span><span class=cF1>U8</span><span class=cF0> *buf2;
<a name="l306"></a>
<a name="l307"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_ALT_TEMPLATE</span><span class=cF0>)
<a name="l308"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l309"></a> arg1 = &amp;tmpi-&gt;arg2;
<a name="l310"></a> arg2 = &amp;tmpi-&gt;arg1;
<a name="l311"></a> alt = </span><span class=cF3>TRUE</span><span class=cF0>;
<a name="l312"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l313"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l314"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l315"></a> arg1 = &amp;tmpi-&gt;arg1;
<a name="l316"></a> arg2 = &amp;tmpi-&gt;arg2;
<a name="l317"></a> alt = </span><span class=cF3>FALSE</span><span class=cF0>;
<a name="l318"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l319"></a>
<a name="l320"></a> </span><span class=cF1>if</span><span class=cF0> (cc-&gt;flags &amp; </span><span class=cF3>CCF_AOT_COMPILE</span><span class=cF0>)
<a name="l321"></a> buf2 = cc-&gt;aotc-&gt;rip;
<a name="l322"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l323"></a> buf2 = buf;
<a name="l324"></a>
<a name="l325"></a> </span><span class=cFD>CompSetFloatOpPushPop</span><span class=cF0>(cc, tmpi, &amp;dont_push_float, &amp;dont_pop_float);
<a name="l326"></a> </span><span class=cF1>if</span><span class=cF0> (dont_push_float)
<a name="l327"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l328"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_POP_CMP</span><span class=cF0> &amp;&amp; alt)
<a name="l329"></a> {
<a name="l330"></a> t2 = </span><span class=cF3>MDF_SIB</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l331"></a> r2 = </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>;
<a name="l332"></a> d2 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l333"></a> rsp_size += </span><span class=cFE>8</span><span class=cF0>;
<a name="l334"></a> }
<a name="l335"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l336"></a> {
<a name="l337"></a> </span><span class=cF1>if</span><span class=cF0> (arg2-&gt;type.raw_type &gt;= </span><span class=cF3>RT_I64</span><span class=cF0> &amp;&amp; arg2-&gt;type &amp; </span><span class=cF3>MDG_DISP_SIB_RIP</span><span class=cF0>)
<a name="l338"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l339"></a> t2 = arg2-&gt;type;
<a name="l340"></a> r2 = arg2-&gt;</span><span class=cF1>reg</span><span class=cF0>;
<a name="l341"></a> d2 = arg2-&gt;disp;
<a name="l342"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l343"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l344"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l345"></a> </span><span class=cF1>if</span><span class=cF0> (arg2-&gt;type &amp; </span><span class=cF3>MDF_IMM</span><span class=cF0>)
<a name="l346"></a> {
<a name="l347"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>builtin2 = </span><span class=cFD>ICBuiltInFloatConst</span><span class=cF0>(arg2-&gt;disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>)</span><span class=cF7>)</span><span class=cF0> || tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_PUSH_CMP</span><span class=cF0>)
<a name="l348"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l349"></a> t2 = </span><span class=cF3>MDF_RIP_DISP32</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l350"></a> r2 = </span><span class=cF3>REG_RIP</span><span class=cF0>;
<a name="l351"></a> d2 = </span><span class=cFD>COCFloatConstFind</span><span class=cF0>(cc, arg2-&gt;disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>) + buf2;
<a name="l352"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l353"></a> }
<a name="l354"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l355"></a> {
<a name="l356"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi, arg2-&gt;type, arg2-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg2-&gt;disp, rip2);
<a name="l357"></a> t2 = </span><span class=cF3>MDF_SIB</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l358"></a> r2 = </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>;
<a name="l359"></a> d2 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l360"></a> rsp_size += </span><span class=cFE>8</span><span class=cF0>;
<a name="l361"></a> }
<a name="l362"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l363"></a> }
<a name="l364"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l365"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l366"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l367"></a> </span><span class=cF1>if</span><span class=cF0> (alt)
<a name="l368"></a> {
<a name="l369"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>arg2-&gt;type &amp; </span><span class=cF3>MDF_STACK</span><span class=cF7>)</span><span class=cF0>)
<a name="l370"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l371"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_POP_CMP</span><span class=cF0>)
<a name="l372"></a> {
<a name="l373"></a> t1 = </span><span class=cF3>MDF_SIB</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l374"></a> r1 = </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>;
<a name="l375"></a> d1 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l376"></a> rsp_size += </span><span class=cFE>8</span><span class=cF0>;
<a name="l377"></a> }
<a name="l378"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l379"></a> {
<a name="l380"></a> </span><span class=cF1>if</span><span class=cF0> (arg1-&gt;type.raw_type &gt;= </span><span class=cF3>RT_I64</span><span class=cF0> &amp;&amp; arg1-&gt;type &amp; </span><span class=cF3>MDG_DISP_SIB_RIP</span><span class=cF0>)
<a name="l381"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l382"></a> t1 = arg1-&gt;type;
<a name="l383"></a> r1 = arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>;
<a name="l384"></a> d1 = arg1-&gt;disp;
<a name="l385"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l386"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l387"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l388"></a> </span><span class=cF1>if</span><span class=cF0> (arg1-&gt;type &amp; </span><span class=cF3>MDF_IMM</span><span class=cF0>)
<a name="l389"></a> {
<a name="l390"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>builtin1 = </span><span class=cFD>ICBuiltInFloatConst</span><span class=cF0>(arg1-&gt;disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>)</span><span class=cF7>)</span><span class=cF0>)
<a name="l391"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l392"></a> t1 = </span><span class=cF3>MDF_RIP_DISP32</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l393"></a> r1 = </span><span class=cF3>REG_RIP</span><span class=cF0>;
<a name="l394"></a> d1 = </span><span class=cFD>COCFloatConstFind</span><span class=cF0>(cc, arg1-&gt;disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>) + buf2;
<a name="l395"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l396"></a> }
<a name="l397"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l398"></a> {
<a name="l399"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi, arg1-&gt;type, arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg1-&gt;disp, rip2);
<a name="l400"></a> t1 = </span><span class=cF3>MDF_SIB</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l401"></a> r1 = </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>;
<a name="l402"></a> d1 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l403"></a> rsp_size += </span><span class=cFE>8</span><span class=cF0>;
<a name="l404"></a> }
<a name="l405"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l406"></a> }
<a name="l407"></a> </span><span class=cF1>if</span><span class=cF0> (arg2-&gt;type.raw_type &gt;= </span><span class=cF3>RT_I64</span><span class=cF0> &amp;&amp; arg2-&gt;type &amp; </span><span class=cF3>MDG_DISP_SIB_RIP</span><span class=cF0>)
<a name="l408"></a> {
<a name="l409"></a> t2 = arg2-&gt;type;
<a name="l410"></a> r2 = arg2-&gt;</span><span class=cF1>reg</span><span class=cF0>;
<a name="l411"></a> d2 = arg2-&gt;disp;
<a name="l412"></a> }
<a name="l413"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l414"></a> {
<a name="l415"></a> </span><span class=cF1>if</span><span class=cF0> (arg2-&gt;type &amp; </span><span class=cF3>MDF_IMM</span><span class=cF0>)
<a name="l416"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l417"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>builtin2 = </span><span class=cFD>ICBuiltInFloatConst</span><span class=cF0>(arg2-&gt;disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>)</span><span class=cF7>)</span><span class=cF0> || tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_PUSH_CMP</span><span class=cF0>)
<a name="l418"></a> {
<a name="l419"></a> t2 = </span><span class=cF3>MDF_RIP_DISP32</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l420"></a> r2 = </span><span class=cF3>REG_RIP</span><span class=cF0>;
<a name="l421"></a> d2 = </span><span class=cFD>COCFloatConstFind</span><span class=cF0>(cc, arg2-&gt;disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>) + buf2;
<a name="l422"></a> }
<a name="l423"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l424"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l425"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l426"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi, arg2-&gt;type, arg2-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg2-&gt;disp, rip2);
<a name="l427"></a> t2 = </span><span class=cF3>MDF_SIB</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l428"></a> r2 = </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>;
<a name="l429"></a> d2 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l430"></a> rsp_size += </span><span class=cFE>8</span><span class=cF0>;
<a name="l431"></a> </span><span class=cF1>if</span><span class=cF0> (r1 == </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>)
<a name="l432"></a> d1 += </span><span class=cFE>8</span><span class=cF0>;
<a name="l433"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l434"></a> }
<a name="l435"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l436"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l437"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l438"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_POP_CMP</span><span class=cF0>)
<a name="l439"></a> </span><span class=cFD>ICPopRegs</span><span class=cF0>(tmpi, </span><span class=cFE>1</span><span class=cF0> &lt;&lt; </span><span class=cF3>REG_RDX</span><span class=cF0>);
<a name="l440"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l441"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, arg1-&gt;type, arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg1-&gt;disp, rip2);
<a name="l442"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, arg2-&gt;type, arg2-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg2-&gt;disp, rip2);
<a name="l443"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0x5052</span><span class=cF0>); </span><span class=cF2>//PUSH EDX PUSH EAX</span><span class=cF0>
<a name="l444"></a> rsp_size = </span><span class=cFE>16</span><span class=cF0>;
<a name="l445"></a> t1 = </span><span class=cF3>MDF_SIB</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l446"></a> r1 = </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>;
<a name="l447"></a> d1 = </span><span class=cFE>8</span><span class=cF0>;
<a name="l448"></a> t2 = </span><span class=cF3>MDF_SIB</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l449"></a> r2 = </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>;
<a name="l450"></a> d2 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l451"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l452"></a> }
<a name="l453"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l454"></a> {
<a name="l455"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>arg1-&gt;type &amp; </span><span class=cF3>MDF_STACK</span><span class=cF7>)</span><span class=cF0>)
<a name="l456"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l457"></a> </span><span class=cF1>if</span><span class=cF0> (arg2-&gt;type.raw_type &gt;= </span><span class=cF3>RT_I64</span><span class=cF0> &amp;&amp; arg2-&gt;type &amp; </span><span class=cF3>MDG_DISP_SIB_RIP</span><span class=cF0>)
<a name="l458"></a> {
<a name="l459"></a> t2 = arg2-&gt;type;
<a name="l460"></a> r2 = arg2-&gt;</span><span class=cF1>reg</span><span class=cF0>;
<a name="l461"></a> d2 = arg2-&gt;disp;
<a name="l462"></a> }
<a name="l463"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l464"></a> {
<a name="l465"></a> </span><span class=cF1>if</span><span class=cF0> (arg2-&gt;type &amp; </span><span class=cF3>MDF_IMM</span><span class=cF0>)
<a name="l466"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l467"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>builtin2 = </span><span class=cFD>ICBuiltInFloatConst</span><span class=cF0>(arg2-&gt;disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>)</span><span class=cF7>)</span><span class=cF0> || tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_PUSH_CMP</span><span class=cF0>)
<a name="l468"></a> {
<a name="l469"></a> t2 = </span><span class=cF3>MDF_RIP_DISP32</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l470"></a> r2 = </span><span class=cF3>REG_RIP</span><span class=cF0>;
<a name="l471"></a> d2 = </span><span class=cFD>COCFloatConstFind</span><span class=cF0>(cc, arg2-&gt;disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>) + buf2;
<a name="l472"></a> }
<a name="l473"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l474"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l475"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l476"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi, arg2-&gt;type, arg2-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg2-&gt;disp, rip2);
<a name="l477"></a> t2 = </span><span class=cF3>MDF_SIB</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l478"></a> r2 = </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>;
<a name="l479"></a> d2 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l480"></a> rsp_size += </span><span class=cFE>8</span><span class=cF0>;
<a name="l481"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l482"></a> }
<a name="l483"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_POP_CMP</span><span class=cF0>)
<a name="l484"></a> {
<a name="l485"></a> t1 = </span><span class=cF3>MDF_SIB</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l486"></a> r1 = </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>;
<a name="l487"></a> d1 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l488"></a> rsp_size += </span><span class=cFE>8</span><span class=cF0>;
<a name="l489"></a> </span><span class=cF1>if</span><span class=cF0> (r2 == </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>)
<a name="l490"></a> d1 += </span><span class=cFE>8</span><span class=cF0>;
<a name="l491"></a> }
<a name="l492"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l493"></a> {
<a name="l494"></a> </span><span class=cF1>if</span><span class=cF0> (arg1-&gt;type.raw_type &gt;= </span><span class=cF3>RT_I64</span><span class=cF0> &amp;&amp; arg1-&gt;type &amp; </span><span class=cF3>MDG_DISP_SIB_RIP</span><span class=cF0>)
<a name="l495"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l496"></a> t1 = arg1-&gt;type;
<a name="l497"></a> r1 = arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>;
<a name="l498"></a> d1 = arg1-&gt;disp;
<a name="l499"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l500"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l501"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l502"></a> </span><span class=cF1>if</span><span class=cF0> (arg1-&gt;type &amp; </span><span class=cF3>MDF_IMM</span><span class=cF0>)
<a name="l503"></a> {
<a name="l504"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>builtin1 = </span><span class=cFD>ICBuiltInFloatConst</span><span class=cF0>(arg1-&gt;disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>)</span><span class=cF7>)</span><span class=cF0>)
<a name="l505"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l506"></a> t1 = </span><span class=cF3>MDF_RIP_DISP32</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l507"></a> r1 = </span><span class=cF3>REG_RIP</span><span class=cF0>;
<a name="l508"></a> d1 = </span><span class=cFD>COCFloatConstFind</span><span class=cF0>(cc, arg1-&gt;disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>) + buf2;
<a name="l509"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l510"></a> }
<a name="l511"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l512"></a> {
<a name="l513"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi, arg1-&gt;type, arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg1-&gt;disp, rip2);
<a name="l514"></a> t1 = </span><span class=cF3>MDF_SIB</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l515"></a> r1 = </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>;
<a name="l516"></a> d1 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l517"></a> rsp_size += </span><span class=cFE>8</span><span class=cF0>;
<a name="l518"></a> </span><span class=cF1>if</span><span class=cF0> (r2 == </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>)
<a name="l519"></a> d2 += </span><span class=cFE>8</span><span class=cF0>;
<a name="l520"></a> }
<a name="l521"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l522"></a> }
<a name="l523"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l524"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l525"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l526"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, arg2-&gt;type, arg2-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg2-&gt;disp, rip2);
<a name="l527"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_POP_CMP</span><span class=cF0>)
<a name="l528"></a> </span><span class=cFD>ICPopRegs</span><span class=cF0>(tmpi, </span><span class=cFE>1</span><span class=cF0> &lt;&lt; </span><span class=cF3>REG_RDX</span><span class=cF0>);
<a name="l529"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l530"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, arg1-&gt;type, arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg1-&gt;disp, rip2);
<a name="l531"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0x5052</span><span class=cF0>); </span><span class=cF2>//PUSH EDX PUSH EAX</span><span class=cF0>
<a name="l532"></a> rsp_size = </span><span class=cFE>16</span><span class=cF0>;
<a name="l533"></a> t1 = </span><span class=cF3>MDF_SIB</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l534"></a> r1 = </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>;
<a name="l535"></a> d1 = </span><span class=cFE>8</span><span class=cF0>;
<a name="l536"></a> t2 = </span><span class=cF3>MDF_SIB</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l537"></a> r2 = </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>;
<a name="l538"></a> d2 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l539"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l540"></a> }
<a name="l541"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l542"></a> </span><span class=cF1>if</span><span class=cF0> (!dont_push_float)
<a name="l543"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l544"></a> </span><span class=cF1>if</span><span class=cF0> (builtin1)
<a name="l545"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, builtin1);
<a name="l546"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l547"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, t1, r1, d1, SLASH_OP_FLD, rip2);
<a name="l548"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l549"></a> </span><span class=cF1>if</span><span class=cF0> (!alt)
<a name="l550"></a> us = not_us;
<a name="l551"></a> </span><span class=cF1>if</span><span class=cF0> (builtin2)
<a name="l552"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, builtin2);
<a name="l553"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l554"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, t2, r2, d2, SLASH_OP_FLD, rip2);
<a name="l555"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_PUSH_CMP</span><span class=cF0>)
<a name="l556"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l557"></a> t2 = </span><span class=cF3>MDF_SIB</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l558"></a> r2 = </span><span class=cF3>REG_RSP</span><span class=cF0> + </span><span class=cF3>REG_RSP</span><span class=cF0> &lt;&lt; </span><span class=cFE>8</span><span class=cF0>;
<a name="l559"></a> d2 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l560"></a> </span><span class=cF1>if</span><span class=cF0> (!rsp_size)
<a name="l561"></a> {
<a name="l562"></a> rsp_size = </span><span class=cFE>8</span><span class=cF0>;
<a name="l563"></a> </span><span class=cFD>ICAddRSP</span><span class=cF0>(tmpi, -</span><span class=cFE>8</span><span class=cF0>);
<a name="l564"></a> }
<a name="l565"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (rsp_size == </span><span class=cFE>16</span><span class=cF0>)
<a name="l566"></a> d2 = </span><span class=cFE>8</span><span class=cF0>;
<a name="l567"></a>
<a name="l568"></a> </span><span class=cF1>if</span><span class=cF0> (alt)
<a name="l569"></a> {
<a name="l570"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0xF1DF</span><span class=cF0>); </span><span class=cF2>//FCOMIP</span><span class=cF0>
<a name="l571"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, t2, r2, d2, SLASH_OP_FSTP, rip2);
<a name="l572"></a> }
<a name="l573"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l574"></a> {
<a name="l575"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0xF1DB</span><span class=cF0>); </span><span class=cF2>//FCOMI</span><span class=cF0>
<a name="l576"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, t2, r2, d2, SLASH_OP_FSTP, rip2);
<a name="l577"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, </span><span class=cFE>0xF7D9C0DD</span><span class=cF0>); </span><span class=cF2>//FFREE,FINCSTP</span><span class=cF0>
<a name="l578"></a> }
<a name="l579"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l580"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l581"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l582"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0xF1DF</span><span class=cF0>); </span><span class=cF2>//FCOMIP</span><span class=cF0>
<a name="l583"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, </span><span class=cFE>0xF7D9C0DD</span><span class=cF0>); </span><span class=cF2>//FFREE, FINCSTP</span><span class=cF0>
<a name="l584"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l585"></a> </span><span class=cFD>CompNoteFloatOp</span><span class=cF0>(cc, tmpi, </span><span class=cF3>TRUE</span><span class=cF0>, </span><span class=cF3>FALSE</span><span class=cF0>, CN_INST);
<a name="l586"></a>
<a name="l587"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_PUSH_CMP</span><span class=cF0>)
<a name="l588"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l589"></a> </span><span class=cF1>if</span><span class=cF0> (r2.u8[</span><span class=cFE>0</span><span class=cF0>] == </span><span class=cF3>REG_RSP</span><span class=cF0>)
<a name="l590"></a> {
<a name="l591"></a> </span><span class=cF1>while</span><span class=cF0> (d2 &amp;&amp; rsp_size)
<a name="l592"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l593"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0x5B</span><span class=cF0>); </span><span class=cF2>//POP RBX (Dont change flags)</span><span class=cF0>
<a name="l594"></a> rsp_size -= </span><span class=cFE>8</span><span class=cF0>;
<a name="l595"></a> d2 -= </span><span class=cFE>8</span><span class=cF0>;
<a name="l596"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l597"></a> }
<a name="l598"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l599"></a> {
<a name="l600"></a> </span><span class=cF1>while</span><span class=cF0> (rsp_size)
<a name="l601"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l602"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0x5B</span><span class=cF0>); </span><span class=cF2>//POP RBX (Dont change flags)</span><span class=cF0>
<a name="l603"></a> rsp_size -= </span><span class=cFE>8</span><span class=cF0>;
<a name="l604"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l605"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi, t2, r2, d2, rip2);
<a name="l606"></a> }
<a name="l607"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l608"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l609"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l610"></a> </span><span class=cF1>while</span><span class=cF0> (rsp_size)
<a name="l611"></a> {
<a name="l612"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0x5B</span><span class=cF0>); </span><span class=cF2>//POP RBX (Dont change flags)</span><span class=cF0>
<a name="l613"></a> rsp_size -= </span><span class=cFE>8</span><span class=cF0>;
<a name="l614"></a> }
<a name="l615"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l616"></a>
<a name="l617"></a> rip += tmpi-&gt;ic_count;
<a name="l618"></a> lb = </span><span class=cFD>OptLabelFwd</span><span class=cF0>(tmpi-&gt;ic_data);
<a name="l619"></a> short_jmp = </span><span class=cF5>ToBool</span><span class=cF0>(tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_SHORT_JMP</span><span class=cF0>);
<a name="l620"></a> </span><span class=cF1>if</span><span class=cF0> (!buf &amp;&amp; lb-&gt;addr != </span><span class=cF3>INVALID_PTR</span><span class=cF0>)
<a name="l621"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l622"></a> i = lb-&gt;addr - (rip + </span><span class=cFE>2</span><span class=cF0>);
<a name="l623"></a> </span><span class=cF1>if</span><span class=cF0> (lb-&gt;flags &amp; </span><span class=cF3>CMF_POP_CMP</span><span class=cF0>)
<a name="l624"></a> {
<a name="l625"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_PUSH_CMP</span><span class=cF0>)
<a name="l626"></a> i += </span><span class=cFE>4</span><span class=cF0>;
<a name="l627"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l628"></a> i += </span><span class=cFE>8</span><span class=cF0>;
<a name="l629"></a> }
<a name="l630"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0> &lt;= i &lt;= </span><span class=cF3>I8_MAX</span><span class=cF0>)
<a name="l631"></a> short_jmp = </span><span class=cF3>TRUE</span><span class=cF0>;
<a name="l632"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l633"></a>
<a name="l634"></a> </span><span class=cF1>if</span><span class=cF0> (short_jmp)
<a name="l635"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l636"></a> tmpi-&gt;ic_flags |= </span><span class=cF3>ICF_SHORT_JMP</span><span class=cF0>;
<a name="l637"></a> i = lb-&gt;addr - (rip + </span><span class=cFE>2</span><span class=cF0>);
<a name="l638"></a> </span><span class=cF1>if</span><span class=cF0> (lb-&gt;flags &amp; </span><span class=cF3>CMF_POP_CMP</span><span class=cF0>)
<a name="l639"></a> {
<a name="l640"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_PUSH_CMP</span><span class=cF0>)
<a name="l641"></a> i += </span><span class=cFE>4</span><span class=cF0>;
<a name="l642"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l643"></a> i += </span><span class=cFE>8</span><span class=cF0>;
<a name="l644"></a> }
<a name="l645"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, i &lt;&lt; </span><span class=cFE>8</span><span class=cF0> + us.u8[</span><span class=cFE>2</span><span class=cF0>]);
<a name="l646"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l647"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l648"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l649"></a> tmpi-&gt;ic_flags &amp;= ~</span><span class=cF3>ICF_SHORT_JMP</span><span class=cF0>;
<a name="l650"></a> i = lb-&gt;addr - (rip + </span><span class=cFE>6</span><span class=cF0>);
<a name="l651"></a> </span><span class=cF1>if</span><span class=cF0> (lb-&gt;flags &amp; </span><span class=cF3>CMF_POP_CMP</span><span class=cF0>)
<a name="l652"></a> {
<a name="l653"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_PUSH_CMP</span><span class=cF0>)
<a name="l654"></a> i += </span><span class=cFE>4</span><span class=cF0>;
<a name="l655"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l656"></a> i += </span><span class=cFE>8</span><span class=cF0>;
<a name="l657"></a> }
<a name="l658"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, us.u16[</span><span class=cFE>0</span><span class=cF0>]);
<a name="l659"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, i);
<a name="l660"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l661"></a>}
<a name="l662"></a>
<a name="l663"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICFMul</span><span class=cF0>(</span><span class=cF9>CCompCtrl</span><span class=cF0> *cc, </span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF1>U8</span><span class=cF0> *buf, </span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l664"></a>{
<a name="l665"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDF_IMM</span><span class=cF0> &amp;&amp; tmpi-&gt;arg1.type &amp; </span><span class=cF3>RTG_MASK</span><span class=cF0> == </span><span class=cF3>RT_F64</span><span class=cF0> &amp;&amp; tmpi-&gt;arg1.disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0> == </span><span class=cFE>1</span><span class=cF0>.</span><span class=cFE>0</span><span class=cF0>)
<a name="l666"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l667"></a> </span><span class=cFD>CompNoteFloatOp</span><span class=cF0>(cc, tmpi, </span><span class=cF3>FALSE</span><span class=cF0>, </span><span class=cF3>FALSE</span><span class=cF0>, CN_INST);
<a name="l668"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp, tmpi-&gt;arg2.type, tmpi-&gt;arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg2.disp, rip);
<a name="l669"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l670"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg2.type &amp; </span><span class=cF3>MDF_IMM</span><span class=cF0> &amp;&amp; tmpi-&gt;arg2.type &amp; </span><span class=cF3>RTG_MASK</span><span class=cF0> == </span><span class=cF3>RT_F64</span><span class=cF0> &amp;&amp; tmpi-&gt;arg2.disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0> == </span><span class=cFE>1</span><span class=cF0>.</span><span class=cFE>0</span><span class=cF0>)
<a name="l671"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l672"></a> </span><span class=cFD>CompNoteFloatOp</span><span class=cF0>(cc, tmpi, </span><span class=cF3>FALSE</span><span class=cF0>, </span><span class=cF3>FALSE</span><span class=cF0>, CN_INST);
<a name="l673"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip);
<a name="l674"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l675"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l676"></a> </span><span class=cFD>ICFOp</span><span class=cF0>(cc, tmpi, SLASH_OP_FMUL, buf, rip);
<a name="l677"></a>}
<a name="l678"></a>
<a name="l679"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICFDiv</span><span class=cF0>(</span><span class=cF9>CCompCtrl</span><span class=cF0> *cc, </span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF1>U8</span><span class=cF0> *buf, </span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l680"></a>{
<a name="l681"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg2.type &amp; </span><span class=cF3>MDF_IMM</span><span class=cF0> &amp;&amp; tmpi-&gt;arg2.type &amp; </span><span class=cF3>RTG_MASK</span><span class=cF0> == </span><span class=cF3>RT_F64</span><span class=cF0> &amp;&amp; tmpi-&gt;arg2.disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0> == </span><span class=cFE>1</span><span class=cF0>.</span><span class=cFE>0</span><span class=cF0>)
<a name="l682"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l683"></a> </span><span class=cFD>CompNoteFloatOp</span><span class=cF0>(cc, tmpi, </span><span class=cF3>FALSE</span><span class=cF0>, </span><span class=cF3>FALSE</span><span class=cF0>, CN_INST);
<a name="l684"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip);
<a name="l685"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l686"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l687"></a> </span><span class=cFD>ICFOp</span><span class=cF0>(cc, tmpi, SLASH_OP_FDIV, buf, rip);
<a name="l688"></a>}
<a name="l689"></a>
<a name="l690"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICFAdd</span><span class=cF0>(</span><span class=cF9>CCompCtrl</span><span class=cF0> *cc, </span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF1>U8</span><span class=cF0> *buf, </span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l691"></a>{
<a name="l692"></a> </span><span class=cF1>Bool</span><span class=cF0> dont_push_float, dont_pop_float;
<a name="l693"></a>
<a name="l694"></a> </span><span class=cFD>CompSetFloatOpPushPop</span><span class=cF0>(cc, tmpi, &amp;dont_push_float, &amp;dont_pop_float);
<a name="l695"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDF_IMM</span><span class=cF0> &amp;&amp; !tmpi-&gt;arg1.disp)
<a name="l696"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l697"></a> </span><span class=cF1>if</span><span class=cF0> (dont_push_float)
<a name="l698"></a> {
<a name="l699"></a> </span><span class=cFD>ICCopyTemplate</span><span class=cF0>(cc, tmpi, </span><span class=cF3>CMP_TEMPLATE_FSTP</span><span class=cF0>, </span><span class=cF3>FALSE</span><span class=cF0>, </span><span class=cF3>TRUE</span><span class=cF0>, </span><span class=cF3>TRUE</span><span class=cF0>, CN_INST);
<a name="l700"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l701"></a> }
<a name="l702"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (dont_pop_float)
<a name="l703"></a> {
<a name="l704"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi-&gt;arg2.type, tmpi-&gt;arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg2.disp, rip);
<a name="l705"></a> </span><span class=cFD>ICCopyTemplate</span><span class=cF0>(cc, tmpi, </span><span class=cF3>CMP_TEMPLATE_FLD</span><span class=cF0>, </span><span class=cF3>FALSE</span><span class=cF0>, </span><span class=cF3>TRUE</span><span class=cF0>, </span><span class=cF3>TRUE</span><span class=cF0>, CN_INST);
<a name="l706"></a> }
<a name="l707"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l708"></a> {
<a name="l709"></a> </span><span class=cFD>CompNoteFloatOp</span><span class=cF0>(cc, tmpi, </span><span class=cF3>TRUE</span><span class=cF0>, </span><span class=cF3>TRUE</span><span class=cF0>, CN_INST);
<a name="l710"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp, tmpi-&gt;arg2.type, tmpi-&gt;arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg2.disp, rip);
<a name="l711"></a> }
<a name="l712"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l713"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg2.type &amp; </span><span class=cF3>MDF_IMM</span><span class=cF0> &amp;&amp; !tmpi-&gt;arg2.disp)
<a name="l714"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l715"></a> </span><span class=cF1>if</span><span class=cF0> (dont_push_float)
<a name="l716"></a> {
<a name="l717"></a> </span><span class=cFD>ICCopyTemplate</span><span class=cF0>(cc, tmpi, </span><span class=cF3>CMP_TEMPLATE_FSTP</span><span class=cF0>, </span><span class=cF3>FALSE</span><span class=cF0>, </span><span class=cF3>TRUE</span><span class=cF0>, </span><span class=cF3>TRUE</span><span class=cF0>, CN_INST);
<a name="l718"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l719"></a> }
<a name="l720"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (dont_pop_float)
<a name="l721"></a> {
<a name="l722"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip);
<a name="l723"></a> </span><span class=cFD>ICCopyTemplate</span><span class=cF0>(cc, tmpi, </span><span class=cF3>CMP_TEMPLATE_FLD</span><span class=cF0>, </span><span class=cF3>FALSE</span><span class=cF0>, </span><span class=cF3>TRUE</span><span class=cF0>, </span><span class=cF3>TRUE</span><span class=cF0>, CN_INST);
<a name="l724"></a> }
<a name="l725"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l726"></a> {
<a name="l727"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip);
<a name="l728"></a> </span><span class=cFD>CompNoteFloatOp</span><span class=cF0>(cc, tmpi, </span><span class=cF3>TRUE</span><span class=cF0>, </span><span class=cF3>TRUE</span><span class=cF0>, CN_INST);
<a name="l729"></a> }
<a name="l730"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l731"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l732"></a> </span><span class=cFD>ICFOp</span><span class=cF0>(cc, tmpi, SLASH_OP_FADD, buf, rip);
<a name="l733"></a>}
<a name="l734"></a>
<a name="l735"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICFSub</span><span class=cF0>(</span><span class=cF9>CCompCtrl</span><span class=cF0> *cc, </span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF1>U8</span><span class=cF0> *buf, </span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l736"></a>{
<a name="l737"></a> </span><span class=cF1>Bool</span><span class=cF0> dont_push_float, dont_pop_float;
<a name="l738"></a>
<a name="l739"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg2.type &amp; </span><span class=cF3>MDF_IMM</span><span class=cF0> &amp;&amp; !tmpi-&gt;arg2.disp)
<a name="l740"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l741"></a> </span><span class=cFD>CompSetFloatOpPushPop</span><span class=cF0>(cc, tmpi, &amp;dont_push_float, &amp;dont_pop_float);
<a name="l742"></a> </span><span class=cF1>if</span><span class=cF0> (dont_push_float)
<a name="l743"></a> {
<a name="l744"></a> </span><span class=cFD>ICCopyTemplate</span><span class=cF0>(cc, tmpi, </span><span class=cF3>CMP_TEMPLATE_FSTP</span><span class=cF0>, </span><span class=cF3>FALSE</span><span class=cF0>, </span><span class=cF3>TRUE</span><span class=cF0>, </span><span class=cF3>TRUE</span><span class=cF0>, CN_INST);
<a name="l745"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l746"></a> }
<a name="l747"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (dont_pop_float)
<a name="l748"></a> {
<a name="l749"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip);
<a name="l750"></a> </span><span class=cFD>ICCopyTemplate</span><span class=cF0>(cc, tmpi, </span><span class=cF3>CMP_TEMPLATE_FLD</span><span class=cF0>, </span><span class=cF3>FALSE</span><span class=cF0>, </span><span class=cF3>TRUE</span><span class=cF0>, </span><span class=cF3>TRUE</span><span class=cF0>, CN_INST);
<a name="l751"></a> }
<a name="l752"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l753"></a> {
<a name="l754"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip);
<a name="l755"></a> </span><span class=cFD>CompNoteFloatOp</span><span class=cF0>(cc, tmpi, </span><span class=cF3>TRUE</span><span class=cF0>, </span><span class=cF3>TRUE</span><span class=cF0>, CN_INST);
<a name="l756"></a> }
<a name="l757"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l758"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l759"></a> </span><span class=cFD>ICFOp</span><span class=cF0>(cc, tmpi, SLASH_OP_FSUB, buf, rip);
<a name="l760"></a>}
<a name="l761"></a>
<a name="l762"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICFPreIncDec</span><span class=cF0>(</span><span class=cF9>CCompCtrl</span><span class=cF0> *cc, </span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> op, </span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l763"></a>{
<a name="l764"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_BY_VAL</span><span class=cF0>)
<a name="l765"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l766"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDG_MASK</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip);
<a name="l767"></a> </span><span class=cFD>ICCopyTemplate</span><span class=cF0>(cc, tmpi, op, </span><span class=cF3>FALSE</span><span class=cF0>, </span><span class=cF3>TRUE</span><span class=cF0>, </span><span class=cF3>TRUE</span><span class=cF0>, CN_INST);
<a name="l768"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l769"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l770"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l771"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l772"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip);
<a name="l773"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l774"></a> </span><span class=cFD>ICCopyTemplate</span><span class=cF0>(cc, tmpi, op, </span><span class=cF3>FALSE</span><span class=cF0>, </span><span class=cF3>TRUE</span><span class=cF0>, </span><span class=cF3>TRUE</span><span class=cF0>, CN_INST);
<a name="l775"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l776"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l777"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;res.type.mode)
<a name="l778"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l779"></a>}
<a name="l780"></a>
<a name="l781"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICFPostIncDec</span><span class=cF0>(</span><span class=cF9>CCompCtrl</span><span class=cF0> *cc, </span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> op, </span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l782"></a>{
<a name="l783"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_BY_VAL</span><span class=cF0>)
<a name="l784"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l785"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDG_MASK</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip);
<a name="l786"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;res.type.mode)
<a name="l787"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l788"></a> </span><span class=cFD>ICCopyTemplate</span><span class=cF0>(cc, tmpi, op, </span><span class=cF3>FALSE</span><span class=cF0>, </span><span class=cF3>TRUE</span><span class=cF0>, </span><span class=cF3>TRUE</span><span class=cF0>, CN_INST);
<a name="l789"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l790"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l791"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l792"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l793"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip);
<a name="l794"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l795"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;res.type.mode)
<a name="l796"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l797"></a> </span><span class=cFD>ICCopyTemplate</span><span class=cF0>(cc, tmpi, op, </span><span class=cF3>FALSE</span><span class=cF0>, </span><span class=cF3>TRUE</span><span class=cF0>, </span><span class=cF3>TRUE</span><span class=cF0>, CN_INST);
<a name="l798"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l799"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l800"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;res.type.mode)
<a name="l801"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l802"></a>}
<a name="l803"></a>
<a name="l804"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICFTemplateFun</span><span class=cF0>(</span><span class=cF9>CCompCtrl</span><span class=cF0> *cc, </span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> op, </span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l805"></a>{
<a name="l806"></a> </span><span class=cF1>Bool</span><span class=cF0> dont_push_float, dont_pop_float;
<a name="l807"></a>
<a name="l808"></a> </span><span class=cFD>CompSetFloatOpPushPop</span><span class=cF0>(cc, tmpi, &amp;dont_push_float, &amp;dont_pop_float);
<a name="l809"></a> </span><span class=cF1>if</span><span class=cF0> (!dont_push_float)
<a name="l810"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip);
<a name="l811"></a>
<a name="l812"></a> </span><span class=cFD>ICCopyTemplate</span><span class=cF0>(cc, tmpi, op, </span><span class=cF3>FALSE</span><span class=cF0>, </span><span class=cF3>TRUE</span><span class=cF0>, </span><span class=cF3>TRUE</span><span class=cF0>, CN_INST);
<a name="l813"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;res.type.mode &amp;&amp; !</span><span class=cF7>(</span><span class=cF0>tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_RES_TO_F64</span><span class=cF7>)</span><span class=cF0> &amp;&amp; !</span><span class=cF7>(</span><span class=cF0>tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_RES_TO_INT</span><span class=cF7>)</span><span class=cF0>)
<a name="l814"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l815"></a>}
</span></pre></body>
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