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https://github.com/Zeal-Operating-System/ZealOS.git
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1b75d91002
Add arg to SATARep to specify drive types to show. Add checks in AHCIPortInit to verify port signatures, add helper method to get signatures from port.
864 lines
104 KiB
HTML
Executable file
864 lines
104 KiB
HTML
Executable file
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<pre style="font-family:monospace;font-size:12pt">
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<a name="l1"></a><span class=cF2>/* Intermediate Code to Machine Code</span><span class=cF0>
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<a name="l2"></a>
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<a name="l3"></a></span><span class=cF2>RAX, RBX, RCX and RDX can be clobbered by</span><span class=cF0>
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<a name="l4"></a></span><span class=cF2>each intermediate code's output code.</span><span class=cF0>
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<a name="l5"></a></span><span class=cF2>However, intermediate codes must be</span><span class=cF0>
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<a name="l6"></a></span><span class=cF2>coupled together based on the arg and</span><span class=cF0>
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<a name="l7"></a></span><span class=cF2>res type specifications in the</span><span class=cF4>
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<a name="l8"></a></span><a href="https://zeal-operating-system.github.io/ZealOS/Kernel/KernelA.HH.html#l1775"><span class=cF4>CICArg</span></a><span class=cF2>. RAX is the most common reg</span><span class=cF0>
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<a name="l9"></a></span><span class=cF2>for coupling intermediate codes.</span><span class=cF0>
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<a name="l10"></a>
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<a name="l11"></a></span><span class=cF2>Internal calculations take place on</span><span class=cF0>
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<a name="l12"></a></span><span class=cF2>64-bit vals, so anything which has</span><span class=cF0>
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<a name="l13"></a></span><span class=cF2>found it's way into a reg has been</span><span class=cF0>
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<a name="l14"></a></span><span class=cF2>sign or zero extended to 64-bits.</span><span class=cF0>
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<a name="l15"></a></span><span class=cF2>*/</span><span class=cF0>
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<a name="l16"></a>
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<a name="l17"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICU8</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF1>U8</span><span class=cF0> b)
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<a name="l18"></a>{
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<a name="l19"></a> tmpi->ic_body[tmpi->ic_count++] = b;
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<a name="l20"></a>}
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<a name="l21"></a>
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<a name="l22"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICRex</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF1>U8</span><span class=cF0> b)
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<a name="l23"></a>{
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<a name="l24"></a> </span><span class=cF1>if</span><span class=cF0> (b)
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<a name="l25"></a> tmpi->ic_body[tmpi->ic_count++] = b;
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<a name="l26"></a>}
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<a name="l27"></a>
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<a name="l28"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICOpSizeRex</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF1>U8</span><span class=cF0> b)
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<a name="l29"></a>{
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<a name="l30"></a> tmpi->ic_body[tmpi->ic_count++] = </span><span class=cF3>OC_OP_SIZE_PREFIX</span><span class=cF0>;
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<a name="l31"></a> </span><span class=cF1>if</span><span class=cF0> (b)
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<a name="l32"></a> tmpi->ic_body[tmpi->ic_count++] = b;
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<a name="l33"></a>}
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<a name="l34"></a>
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<a name="l35"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICU16</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>U16</span><span class=cF0> w)
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<a name="l36"></a>{
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<a name="l37"></a> *(&tmpi->ic_body[tmpi->ic_count])(</span><span class=cF9>U16</span><span class=cF0>) = w;
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<a name="l38"></a> tmpi->ic_count += </span><span class=cFE>2</span><span class=cF0>;
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<a name="l39"></a>}
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<a name="l40"></a>
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<a name="l41"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICU24</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>U32</span><span class=cF0> d)
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<a name="l42"></a>{</span><span class=cF2>//Writes extra harmless overhanging byte.</span><span class=cF0>
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<a name="l43"></a> *(&tmpi->ic_body[tmpi->ic_count])(</span><span class=cF9>U32</span><span class=cF0>) = d;
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<a name="l44"></a> tmpi->ic_count += </span><span class=cFE>3</span><span class=cF0>;
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<a name="l45"></a>}
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<a name="l46"></a>
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<a name="l47"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICU32</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>U32</span><span class=cF0> d)
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<a name="l48"></a>{
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<a name="l49"></a> *(&tmpi->ic_body[tmpi->ic_count])(</span><span class=cF9>U32</span><span class=cF0>) = d;
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<a name="l50"></a> tmpi->ic_count += </span><span class=cFE>4</span><span class=cF0>;
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<a name="l51"></a>}
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<a name="l52"></a>
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<a name="l53"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICU64</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>U64</span><span class=cF0> q)
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<a name="l54"></a>{
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<a name="l55"></a> *(&tmpi->ic_body[tmpi->ic_count])(</span><span class=cF9>U64</span><span class=cF0>) = q;
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<a name="l56"></a> tmpi->ic_count += </span><span class=cFE>8</span><span class=cF0>;
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<a name="l57"></a>}
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<a name="l58"></a>
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<a name="l59"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICAddRSP</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> i, </span><span class=cF1>Bool</span><span class=cF0> optimize=</span><span class=cF3>TRUE</span><span class=cF0>)
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<a name="l60"></a>{
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<a name="l61"></a> </span><span class=cF9>I64</span><span class=cF0> j, last_start;
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<a name="l62"></a> </span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpil1;
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<a name="l63"></a>
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<a name="l64"></a> </span><span class=cF1>if</span><span class=cF0> (optimize)
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<a name="l65"></a> </span><span class=cF7>{</span><span class=cF0>
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<a name="l66"></a> tmpil1 = tmpi;
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<a name="l67"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_last_start < </span><span class=cFE>0</span><span class=cF0> && !tmpi->ic_count && </span><span class=cF7>(</span><span class=cF0>tmpil1 = </span><span class=cFD>OptLag1</span><span class=cF0>(tmpi)</span><span class=cF7>)</span><span class=cF0> && tmpil1->ic_last_start < </span><span class=cFE>0</span><span class=cF0>)
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<a name="l68"></a> tmpil1 = </span><span class=cF3>NULL</span><span class=cF0>;
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<a name="l69"></a> </span><span class=cF1>if</span><span class=cF0> (tmpil1)
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<a name="l70"></a> {
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<a name="l71"></a> j = tmpil1->ic_count;
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<a name="l72"></a> </span><span class=cF1>if</span><span class=cF0> (tmpil1->ic_last_start == j - </span><span class=cFE>4</span><span class=cF0> && tmpil1->ic_body[j - </span><span class=cFE>3</span><span class=cF0>] == </span><span class=cFE>0x83</span><span class=cF0> && tmpil1->ic_body[j - </span><span class=cFE>4</span><span class=cF0>] == </span><span class=cFE>0x48</span><span class=cF0>)
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<a name="l73"></a> </span><span class=cF7>{</span><span class=cF0>
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<a name="l74"></a> </span><span class=cF1>if</span><span class=cF0> (tmpil1->ic_body[j - </span><span class=cFE>2</span><span class=cF0>] == </span><span class=cFE>0xEC</span><span class=cF0>)
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<a name="l75"></a> j = -tmpil1->ic_body[j - </span><span class=cFE>1</span><span class=cF0>](</span><span class=cF1>I8</span><span class=cF0>);
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<a name="l76"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (tmpil1->ic_body[j - </span><span class=cFE>2</span><span class=cF0>] == </span><span class=cFE>0xC4</span><span class=cF0>)
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<a name="l77"></a> j = tmpil1->ic_body[j - </span><span class=cFE>1</span><span class=cF0>](</span><span class=cF1>I8</span><span class=cF0>);
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<a name="l78"></a> </span><span class=cF1>else</span><span class=cF0>
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<a name="l79"></a> j = </span><span class=cFE>0</span><span class=cF0>;
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<a name="l80"></a> </span><span class=cF7>}</span><span class=cF0>
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<a name="l81"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (tmpil1->ic_last_start == j - </span><span class=cFE>7</span><span class=cF0> && tmpil1->ic_body[j - </span><span class=cFE>6</span><span class=cF0>] == </span><span class=cFE>0x81</span><span class=cF0> && tmpil1->ic_body[j - </span><span class=cFE>7</span><span class=cF0>] == </span><span class=cFE>0x48</span><span class=cF0>)
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<a name="l82"></a> </span><span class=cF7>{</span><span class=cF0>
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<a name="l83"></a> </span><span class=cF1>if</span><span class=cF0> (tmpil1->ic_body[j - </span><span class=cFE>5</span><span class=cF0>] == </span><span class=cFE>0xEC</span><span class=cF0>)
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<a name="l84"></a> j = -tmpil1->ic_body[j - </span><span class=cFE>4</span><span class=cF0>](</span><span class=cF9>I32</span><span class=cF0>);
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<a name="l85"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (tmpil1->ic_body[j - </span><span class=cFE>5</span><span class=cF0>] == </span><span class=cFE>0xC4</span><span class=cF0>)
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<a name="l86"></a> j = tmpil1->ic_body[j - </span><span class=cFE>4</span><span class=cF0>](</span><span class=cF9>I32</span><span class=cF0>);
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<a name="l87"></a> </span><span class=cF1>else</span><span class=cF0>
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<a name="l88"></a> j = </span><span class=cFE>0</span><span class=cF0>;
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<a name="l89"></a> </span><span class=cF7>}</span><span class=cF0>
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<a name="l90"></a> </span><span class=cF1>else</span><span class=cF0>
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<a name="l91"></a> j = </span><span class=cFE>0</span><span class=cF0>;
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<a name="l92"></a> </span><span class=cF1>if</span><span class=cF0> (j)
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<a name="l93"></a> </span><span class=cF7>{</span><span class=cF0>
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<a name="l94"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi == tmpil1)
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<a name="l95"></a> {
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<a name="l96"></a> tmpi->ic_count = tmpi->ic_last_start;
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<a name="l97"></a> i += j;
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<a name="l98"></a> }
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<a name="l99"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>tmpi->ic_flags & </span><span class=cF3>ICF_PREV_DELETED</span><span class=cF7>)</span><span class=cF0>)
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<a name="l100"></a> {
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<a name="l101"></a> tmpil1->ic_flags |= </span><span class=cF3>ICF_DEL_PREV_INS</span><span class=cF0>;
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<a name="l102"></a> tmpi->ic_flags = tmpi->ic_flags & ~</span><span class=cF3>ICF_CODE_FINAL</span><span class=cF0>|</span><span class=cF3>ICF_PREV_DELETED</span><span class=cF0>;
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<a name="l103"></a> i += j;
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<a name="l104"></a> }
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<a name="l105"></a> </span><span class=cF7>}</span><span class=cF0>
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<a name="l106"></a> }
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<a name="l107"></a> </span><span class=cF7>}</span><span class=cF0>
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<a name="l108"></a> last_start = tmpi->ic_count;
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<a name="l109"></a> </span><span class=cF1>if</span><span class=cF0> (i > </span><span class=cFE>0</span><span class=cF0>)
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<a name="l110"></a> </span><span class=cF7>{</span><span class=cF0>
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<a name="l111"></a> </span><span class=cF1>if</span><span class=cF0> (i <= </span><span class=cF3>I8_MAX</span><span class=cF0>)
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<a name="l112"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, </span><span class=cFE>0xC48348</span><span class=cF0> + i << </span><span class=cFE>24</span><span class=cF0>);
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<a name="l113"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (i <= </span><span class=cF3>I32_MAX</span><span class=cF0>)
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<a name="l114"></a> {
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<a name="l115"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xC48148</span><span class=cF0>);
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<a name="l116"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, i);
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<a name="l117"></a> }
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<a name="l118"></a> </span><span class=cF1>else</span><span class=cF0>
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<a name="l119"></a> </span><span class=cF5>throw</span><span class=cF0>(</span><span class=cF6>'Compiler'</span><span class=cF0>);
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<a name="l120"></a> </span><span class=cF7>}</span><span class=cF0>
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<a name="l121"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (i < </span><span class=cFE>0</span><span class=cF0>)
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<a name="l122"></a> </span><span class=cF7>{</span><span class=cF0>
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<a name="l123"></a> i = -i;
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<a name="l124"></a> </span><span class=cF1>if</span><span class=cF0> (i <= </span><span class=cF3>I8_MAX</span><span class=cF0>)
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<a name="l125"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, </span><span class=cFE>0xEC8348</span><span class=cF0> + i << </span><span class=cFE>24</span><span class=cF0>);
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<a name="l126"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (i <= </span><span class=cF3>I32_MAX</span><span class=cF0>)
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<a name="l127"></a> {
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<a name="l128"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xEC8148</span><span class=cF0>);
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<a name="l129"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, i);
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<a name="l130"></a> }
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<a name="l131"></a> </span><span class=cF1>else</span><span class=cF0>
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<a name="l132"></a> </span><span class=cF5>throw</span><span class=cF0>(</span><span class=cF6>'Compiler'</span><span class=cF0>);
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<a name="l133"></a> </span><span class=cF7>}</span><span class=cF0>
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<a name="l134"></a> </span><span class=cF1>if</span><span class=cF0> (optimize && tmpi->ic_count > last_start)
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<a name="l135"></a> tmpi->ic_last_start = last_start;
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<a name="l136"></a>}
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<a name="l137"></a>
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<a name="l138"></a></span><span class=cF1>extern</span><span class=cF0> </span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICMov</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>CICType</span><span class=cF0> t1, </span><span class=cF9>I64</span><span class=cF0> r1, </span><span class=cF9>I64</span><span class=cF0> d1, </span><span class=cF9>CICType</span><span class=cF0> t2, </span><span class=cF9>I64</span><span class=cF0> r2, </span><span class=cF9>I64</span><span class=cF0> d2, </span><span class=cF9>I64</span><span class=cF0> rip);
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<a name="l139"></a>
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<a name="l140"></a>#</span><span class=cF1>define</span><span class=cF0> MODR_REG </span><span class=cFE>0</span><span class=cF0>
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<a name="l141"></a>#</span><span class=cF1>define</span><span class=cF0> MODR_INDIRECT_REG </span><span class=cFE>1</span><span class=cF0>
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<a name="l142"></a>#</span><span class=cF1>define</span><span class=cF0> MODR_D8_INDIRECT_REG </span><span class=cFE>2</span><span class=cF0>
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<a name="l143"></a>#</span><span class=cF1>define</span><span class=cF0> MODR_D32_INDIRECT_REG </span><span class=cFE>3</span><span class=cF0>
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<a name="l144"></a>#</span><span class=cF1>define</span><span class=cF0> MODR_SIB_INDIRECT_REG </span><span class=cFE>4</span><span class=cF0>
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<a name="l145"></a>#</span><span class=cF1>define</span><span class=cF0> MODR_SIB_D8_INDIRECT_REG </span><span class=cFE>5</span><span class=cF0>
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<a name="l146"></a>#</span><span class=cF1>define</span><span class=cF0> MODR_SIB_D32_INDIRECT_REG </span><span class=cFE>6</span><span class=cF0>
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<a name="l147"></a>#</span><span class=cF1>define</span><span class=cF0> MODR_RIP_REL </span><span class=cFE>7</span><span class=cF0>
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<a name="l148"></a>#</span><span class=cF1>define</span><span class=cF0> MODR_RIP_REL_IMM_U32 </span><span class=cFE>8</span><span class=cF0>
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<a name="l149"></a>
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<a name="l150"></a></span><span class=cF9>I64</span><span class=cF0> </span><span class=cFD>ICModr1</span><span class=cF0>(</span><span class=cF9>I64</span><span class=cF0> r, </span><span class=cF9>CICType</span><span class=cF0> t2, </span><span class=cF9>I64</span><span class=cF0> r2, </span><span class=cF9>I64</span><span class=cF0> d2)
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<a name="l151"></a>{ </span><span class=cF2>//res.u8[0] is type</span><span class=cF0>
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<a name="l152"></a> </span><span class=cF2>//res.u8[1] is REX</span><span class=cF0>
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<a name="l153"></a> </span><span class=cF2>//res.u8[2] is ModR</span><span class=cF0>
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<a name="l154"></a> </span><span class=cF2>//res.u8[3] is SIB</span><span class=cF0>
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<a name="l155"></a> </span><span class=cF9>I64</span><span class=cF0> res = </span><span class=cFE>0</span><span class=cF0>;
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<a name="l156"></a>
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<a name="l157"></a> </span><span class=cF1>if</span><span class=cF0> (t2.raw_type < </span><span class=cF3>RT_I64</span><span class=cF0>)
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<a name="l158"></a> res.u8[</span><span class=cFE>1</span><span class=cF0>] = </span><span class=cFE>0x40</span><span class=cF0>;
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<a name="l159"></a> </span><span class=cF1>else</span><span class=cF0>
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<a name="l160"></a> res.u8[</span><span class=cFE>1</span><span class=cF0>] = </span><span class=cFE>0x48</span><span class=cF0>;
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<a name="l161"></a> </span><span class=cF1>if</span><span class=cF0> (r > </span><span class=cFE>7</span><span class=cF0>)
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<a name="l162"></a> </span><span class=cF7>{</span><span class=cF0>
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<a name="l163"></a> res.u8[</span><span class=cFE>1</span><span class=cF0>] += </span><span class=cFE>4</span><span class=cF0>;
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<a name="l164"></a> r &= </span><span class=cFE>7</span><span class=cF0>;
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<a name="l165"></a> </span><span class=cF7>}</span><span class=cF0>
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<a name="l166"></a> </span><span class=cF1>switch</span><span class=cF0> (</span><span class=cF5>Bsr</span><span class=cF7>(</span><span class=cF0>t2</span><span class=cF7>)</span><span class=cF0>)
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<a name="l167"></a> </span><span class=cF7>{</span><span class=cF0>
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<a name="l168"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_REG</span><span class=cF0>:
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<a name="l169"></a> </span><span class=cF1>if</span><span class=cF0> (r2 > </span><span class=cFE>7</span><span class=cF0>) {
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<a name="l170"></a> res.u8[</span><span class=cFE>1</span><span class=cF0>]++;
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<a name="l171"></a> r2 &= </span><span class=cFE>7</span><span class=cF0>;
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<a name="l172"></a> }
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<a name="l173"></a> res.u8[</span><span class=cFE>2</span><span class=cF0>] = </span><span class=cFE>0xC0</span><span class=cF0> + r << </span><span class=cFE>3</span><span class=cF0> + r2;
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<a name="l174"></a> res.u8[</span><span class=cFE>0</span><span class=cF0>] = MODR_REG;
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<a name="l175"></a> </span><span class=cF1>if</span><span class=cF0> (res.u8[</span><span class=cFE>1</span><span class=cF0>] == </span><span class=cFE>0x40</span><span class=cF0> && </span><span class=cF7>(</span><span class=cF0>t2.raw_type >= </span><span class=cF3>RT_I16</span><span class=cF0> || r < </span><span class=cFE>4</span><span class=cF0> && r2 < </span><span class=cFE>4</span><span class=cF7>)</span><span class=cF0>)
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<a name="l176"></a> res.u8[</span><span class=cFE>1</span><span class=cF0>] = </span><span class=cFE>0</span><span class=cF0>;
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<a name="l177"></a> </span><span class=cF1>break</span><span class=cF0>;
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<a name="l178"></a>
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<a name="l179"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_DISP</span><span class=cF0>:
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<a name="l180"></a> </span><span class=cF1>if</span><span class=cF0> (r2 > </span><span class=cFE>7</span><span class=cF0>)
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<a name="l181"></a> {
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<a name="l182"></a> res.u8[</span><span class=cFE>1</span><span class=cF0>]++;
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<a name="l183"></a> r2 &= </span><span class=cFE>7</span><span class=cF0>;
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<a name="l184"></a> }
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<a name="l185"></a> </span><span class=cF1>if</span><span class=cF0> (!d2 && r2 != </span><span class=cF3>REG_RBP</span><span class=cF0>)
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<a name="l186"></a> {
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<a name="l187"></a> res.u8[</span><span class=cFE>2</span><span class=cF0>] = r << </span><span class=cFE>3</span><span class=cF0> + r2;
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<a name="l188"></a> res.u8[</span><span class=cFE>0</span><span class=cF0>] = MODR_INDIRECT_REG;
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<a name="l189"></a> }
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<a name="l190"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0> <= d2 <= </span><span class=cF3>I8_MAX</span><span class=cF0>)
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<a name="l191"></a> {
|
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<a name="l192"></a> res.u8[</span><span class=cFE>2</span><span class=cF0>] = </span><span class=cFE>0x40</span><span class=cF0> + r << </span><span class=cFE>3</span><span class=cF0> + r2;
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<a name="l193"></a> res.u8[</span><span class=cFE>0</span><span class=cF0>] = MODR_D8_INDIRECT_REG;
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<a name="l194"></a> }
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<a name="l195"></a> </span><span class=cF1>else</span><span class=cF0>
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<a name="l196"></a> {
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<a name="l197"></a> res.u8[</span><span class=cFE>2</span><span class=cF0>] = </span><span class=cFE>0x80</span><span class=cF0> + r << </span><span class=cFE>3</span><span class=cF0> + r2;
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|
<a name="l198"></a> res.u8[</span><span class=cFE>0</span><span class=cF0>] = MODR_D32_INDIRECT_REG;
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<a name="l199"></a> }
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<a name="l200"></a> </span><span class=cF1>if</span><span class=cF0> (res.u8[</span><span class=cFE>1</span><span class=cF0>] == </span><span class=cFE>0x40</span><span class=cF0> && </span><span class=cF7>(</span><span class=cF0>t2.raw_type >= </span><span class=cF3>RT_I16</span><span class=cF0> || r < </span><span class=cFE>4</span><span class=cF7>)</span><span class=cF0>)
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<a name="l201"></a> res.u8[</span><span class=cFE>1</span><span class=cF0>] = </span><span class=cFE>0</span><span class=cF0>;
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|
<a name="l202"></a> </span><span class=cF1>break</span><span class=cF0>;
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|
<a name="l203"></a>
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<a name="l204"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_SIB</span><span class=cF0>:
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<a name="l205"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cFE>7</span><span class=cF0> < r2.u8[</span><span class=cFE>0</span><span class=cF0>] < </span><span class=cF3>REG_NONE</span><span class=cF0>)
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|
<a name="l206"></a> res.u8[</span><span class=cFE>1</span><span class=cF0>]++;
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|
<a name="l207"></a> </span><span class=cF1>if</span><span class=cF0> (r2.u8[</span><span class=cFE>1</span><span class=cF0>] & </span><span class=cFE>15</span><span class=cF0> > </span><span class=cFE>7</span><span class=cF0>)
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|
<a name="l208"></a> res.u8[</span><span class=cFE>1</span><span class=cF0>] += </span><span class=cFE>2</span><span class=cF0>;
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|
<a name="l209"></a> </span><span class=cF1>if</span><span class=cF0> (r2.u8[</span><span class=cFE>0</span><span class=cF0>] == </span><span class=cF3>REG_NONE</span><span class=cF0>)
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|
<a name="l210"></a> {
|
|
<a name="l211"></a> res.u8[</span><span class=cFE>3</span><span class=cF0>] = </span><span class=cFE>5</span><span class=cF0> + (r2.u8[</span><span class=cFE>1</span><span class=cF0>] & </span><span class=cFE>7</span><span class=cF0>) << </span><span class=cFE>3</span><span class=cF0> + r2.u8[</span><span class=cFE>1</span><span class=cF0>] & </span><span class=cFE>0xC0</span><span class=cF0>;
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|
<a name="l212"></a> res.u8[</span><span class=cFE>2</span><span class=cF0>] = </span><span class=cFE>4</span><span class=cF0> + r << </span><span class=cFE>3</span><span class=cF0>;
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|
<a name="l213"></a> res.u8[</span><span class=cFE>0</span><span class=cF0>] = MODR_SIB_D32_INDIRECT_REG;
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|
<a name="l214"></a> }
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|
<a name="l215"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l216"></a> {
|
|
<a name="l217"></a> res.u8[</span><span class=cFE>3</span><span class=cF0>] = r2.u8[</span><span class=cFE>0</span><span class=cF0>] & </span><span class=cFE>7</span><span class=cF0> + (r2.u8[</span><span class=cFE>1</span><span class=cF0>] & </span><span class=cFE>7</span><span class=cF0>) << </span><span class=cFE>3</span><span class=cF0> + r2.u8[</span><span class=cFE>1</span><span class=cF0>] & </span><span class=cFE>0xC0</span><span class=cF0>;
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|
<a name="l218"></a> </span><span class=cF1>if</span><span class=cF0> (!d2 && r2.u8[</span><span class=cFE>0</span><span class=cF0>] & </span><span class=cFE>7</span><span class=cF0> != </span><span class=cF3>REG_RBP</span><span class=cF0>)
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|
<a name="l219"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l220"></a> res.u8[</span><span class=cFE>2</span><span class=cF0>] = </span><span class=cFE>4</span><span class=cF0> + r << </span><span class=cFE>3</span><span class=cF0>;
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|
<a name="l221"></a> res.u8[</span><span class=cFE>0</span><span class=cF0>] = MODR_SIB_INDIRECT_REG;
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<a name="l222"></a> </span><span class=cF7>}</span><span class=cF0>
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<a name="l223"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0> <= d2 <= </span><span class=cF3>I8_MAX</span><span class=cF0>)
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|
<a name="l224"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l225"></a> res.u8[</span><span class=cFE>2</span><span class=cF0>] = </span><span class=cFE>0x44</span><span class=cF0> + r << </span><span class=cFE>3</span><span class=cF0>;
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|
<a name="l226"></a> res.u8[</span><span class=cFE>0</span><span class=cF0>] = MODR_SIB_D8_INDIRECT_REG;
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<a name="l227"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l228"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l229"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l230"></a> res.u8[</span><span class=cFE>2</span><span class=cF0>] = </span><span class=cFE>0x84</span><span class=cF0> + r << </span><span class=cFE>3</span><span class=cF0>;
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|
<a name="l231"></a> res.u8[</span><span class=cFE>0</span><span class=cF0>] = MODR_SIB_D32_INDIRECT_REG;
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|
<a name="l232"></a> </span><span class=cF7>}</span><span class=cF0>
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<a name="l233"></a> }
|
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<a name="l234"></a> </span><span class=cF1>if</span><span class=cF0> (res.u8[</span><span class=cFE>1</span><span class=cF0>] == </span><span class=cFE>0x40</span><span class=cF0> && </span><span class=cF7>(</span><span class=cF0>t2.raw_type >= </span><span class=cF3>RT_I16</span><span class=cF0> || r < </span><span class=cFE>4</span><span class=cF7>)</span><span class=cF0>)
|
|
<a name="l235"></a> res.u8[</span><span class=cFE>1</span><span class=cF0>] = </span><span class=cFE>0</span><span class=cF0>;
|
|
<a name="l236"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l237"></a>
|
|
<a name="l238"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_RIP_DISP32</span><span class=cF0>:
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|
<a name="l239"></a> res.u8[</span><span class=cFE>2</span><span class=cF0>] = </span><span class=cFE>0x05</span><span class=cF0> + r << </span><span class=cFE>3</span><span class=cF0>;
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|
<a name="l240"></a> res.u8[</span><span class=cFE>0</span><span class=cF0>] = MODR_RIP_REL;
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|
<a name="l241"></a> </span><span class=cF1>if</span><span class=cF0> (res.u8[</span><span class=cFE>1</span><span class=cF0>] == </span><span class=cFE>0x40</span><span class=cF0> && </span><span class=cF7>(</span><span class=cF0>t2.raw_type >= </span><span class=cF3>RT_I16</span><span class=cF0> || r < </span><span class=cFE>4</span><span class=cF7>)</span><span class=cF0>)
|
|
<a name="l242"></a> res.u8[</span><span class=cFE>1</span><span class=cF0>] = </span><span class=cFE>0</span><span class=cF0>;
|
|
<a name="l243"></a> </span><span class=cF1>break</span><span class=cF0>;
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|
<a name="l244"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l245"></a>
|
|
<a name="l246"></a> </span><span class=cF1>return</span><span class=cF0> res;
|
|
<a name="l247"></a>}
|
|
<a name="l248"></a>
|
|
<a name="l249"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICModr2</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> i, </span><span class=cF9>CICType</span><span class=cF0> t=</span><span class=cFE>0</span><span class=cF0>, </span><span class=cF9>I64</span><span class=cF0> d, </span><span class=cF9>I64</span><span class=cF0> rip=</span><span class=cFE>0</span><span class=cF0>)
|
|
<a name="l250"></a>{
|
|
<a name="l251"></a> </span><span class=cF1>switch</span><span class=cF0> [i.u8[</span><span class=cFE>0</span><span class=cF0>]]
|
|
<a name="l252"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l253"></a> </span><span class=cF1>case</span><span class=cF0> MODR_REG:
|
|
<a name="l254"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l255"></a>
|
|
<a name="l256"></a> </span><span class=cF1>case</span><span class=cF0> MODR_INDIRECT_REG:
|
|
<a name="l257"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l258"></a>
|
|
<a name="l259"></a> </span><span class=cF1>case</span><span class=cF0> MODR_D8_INDIRECT_REG:
|
|
<a name="l260"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, d);
|
|
<a name="l261"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l262"></a>
|
|
<a name="l263"></a> </span><span class=cF1>case</span><span class=cF0> MODR_D32_INDIRECT_REG:
|
|
<a name="l264"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, d);
|
|
<a name="l265"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l266"></a>
|
|
<a name="l267"></a> </span><span class=cF1>case</span><span class=cF0> MODR_SIB_INDIRECT_REG:
|
|
<a name="l268"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>3</span><span class=cF0>]);
|
|
<a name="l269"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l270"></a>
|
|
<a name="l271"></a> </span><span class=cF1>case</span><span class=cF0> MODR_SIB_D8_INDIRECT_REG:
|
|
<a name="l272"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>3</span><span class=cF0>]);
|
|
<a name="l273"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, d);
|
|
<a name="l274"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l275"></a>
|
|
<a name="l276"></a> </span><span class=cF1>case</span><span class=cF0> MODR_SIB_D32_INDIRECT_REG:
|
|
<a name="l277"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>3</span><span class=cF0>]);
|
|
<a name="l278"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, d);
|
|
<a name="l279"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l280"></a>
|
|
<a name="l281"></a> </span><span class=cF1>case</span><span class=cF0> MODR_RIP_REL_IMM_U32:
|
|
<a name="l282"></a> </span><span class=cF1>switch</span><span class=cF0> (t.raw_type)
|
|
<a name="l283"></a> {
|
|
<a name="l284"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_I8</span><span class=cF0>:
|
|
<a name="l285"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_U8</span><span class=cF0>:
|
|
<a name="l286"></a> d--;
|
|
<a name="l287"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l288"></a>
|
|
<a name="l289"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_I16</span><span class=cF0>:
|
|
<a name="l290"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_U16</span><span class=cF0>:
|
|
<a name="l291"></a> d -= </span><span class=cFE>2</span><span class=cF0>;
|
|
<a name="l292"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l293"></a>
|
|
<a name="l294"></a> </span><span class=cF1>default</span><span class=cF0>:
|
|
<a name="l295"></a> d -= </span><span class=cFE>4</span><span class=cF0>;
|
|
<a name="l296"></a> }
|
|
<a name="l297"></a> </span><span class=cF1>case</span><span class=cF0> MODR_RIP_REL:
|
|
<a name="l298"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, d - </span><span class=cF7>(</span><span class=cF0>rip + </span><span class=cFE>4</span><span class=cF0> + tmpi->ic_count</span><span class=cF7>)</span><span class=cF0>);
|
|
<a name="l299"></a> tmpi->ic_flags &= ~</span><span class=cF3>ICF_CODE_FINAL</span><span class=cF0>;
|
|
<a name="l300"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l301"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l302"></a>}
|
|
<a name="l303"></a>
|
|
<a name="l304"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_INC </span><span class=cFE>0x0003000000FFFE00</span><span class=cF0>
|
|
<a name="l305"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_DEC </span><span class=cFE>0x052B000000FFFE01</span><span class=cF0>
|
|
<a name="l306"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_NOT </span><span class=cFE>0x0000000000F7F602</span><span class=cF0>
|
|
<a name="l307"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_NEG </span><span class=cFE>0x0000000000F7F603</span><span class=cF0>
|
|
<a name="l308"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_IMM_U8 </span><span class=cFE>0x0000000000838000</span><span class=cF0>
|
|
<a name="l309"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_IMM_U32 </span><span class=cFE>0x0000000000818300</span><span class=cF0>
|
|
<a name="l310"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_MUL </span><span class=cFE>0x0000000000F7F604</span><span class=cF0>
|
|
<a name="l311"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_IMUL </span><span class=cFE>0x0000000000F7F605</span><span class=cF0>
|
|
<a name="l312"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_DIV </span><span class=cFE>0x0000000000F7F606</span><span class=cF0>
|
|
<a name="l313"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_MOV </span><span class=cFE>0x0000000000898800</span><span class=cF0>
|
|
<a name="l314"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_MOV_IMM </span><span class=cFE>0x0000000000C7C600</span><span class=cF0>
|
|
<a name="l315"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_PUSH </span><span class=cFE>0x0000000000FFFF06</span><span class=cF0>
|
|
<a name="l316"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_POP </span><span class=cFE>0x00000000008F8F00</span><span class=cF0>
|
|
<a name="l317"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_FADD </span><span class=cFE>0x0000C1DE01DCDC00</span><span class=cF0>
|
|
<a name="l318"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_FSUB </span><span class=cFE>0x0000E9DE01DCDC04</span><span class=cF0>
|
|
<a name="l319"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_FSUBR </span><span class=cFE>0x0000E1DE01DCDC05</span><span class=cF0>
|
|
<a name="l320"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_FMUL </span><span class=cFE>0x0000C9DE01DCDC01</span><span class=cF0>
|
|
<a name="l321"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_FDIV </span><span class=cFE>0x0000F9DE01DCDC06</span><span class=cF0>
|
|
<a name="l322"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_FDIVR </span><span class=cFE>0x0000F1DE01DCDC07</span><span class=cF0>
|
|
<a name="l323"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_FLD </span><span class=cFE>0x0000000001DDDD00</span><span class=cF0>
|
|
<a name="l324"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_FSTP </span><span class=cFE>0x0000000001DDDD03</span><span class=cF0>
|
|
<a name="l325"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_FISTTP </span><span class=cFE>0x0000000001DDDD01</span><span class=cF0>
|
|
<a name="l326"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_FILD </span><span class=cFE>0x0000000001DFDF05</span><span class=cF0>
|
|
<a name="l327"></a>
|
|
<a name="l328"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICSlashOp</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>CICType</span><span class=cF0> t1, </span><span class=cF9>I64</span><span class=cF0> r1, </span><span class=cF9>I64</span><span class=cF0> d1, </span><span class=cF9>I64</span><span class=cF0> op, </span><span class=cF9>I64</span><span class=cF0> rip)
|
|
<a name="l329"></a>{
|
|
<a name="l330"></a> </span><span class=cF9>I64</span><span class=cF0> i;
|
|
<a name="l331"></a> </span><span class=cF1>if</span><span class=cF0> (t1 & </span><span class=cF3>MDF_REG</span><span class=cF0> && !op.u8[</span><span class=cFE>3</span><span class=cF0>])
|
|
<a name="l332"></a> t1 = t1 & (</span><span class=cF3>MDG_MASK</span><span class=cF0> | </span><span class=cF3>RTF_UNSIGNED</span><span class=cF0>) + </span><span class=cF3>RT_I64</span><span class=cF0>; </span><span class=cF2>// Set to 64 bit, preserving unsigned</span><span class=cF0>
|
|
<a name="l333"></a> i = </span><span class=cFD>ICModr1</span><span class=cF0>(op.u8[</span><span class=cFE>0</span><span class=cF0>], t1, r1, d1);
|
|
<a name="l334"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_LOCK</span><span class=cF0> && !</span><span class=cF7>(</span><span class=cF0>t1 & </span><span class=cF3>MDF_REG</span><span class=cF7>)</span><span class=cF0> && op & ~</span><span class=cFE>7</span><span class=cF0> != SLASH_OP_MOV && op != SLASH_OP_MOV_IMM)
|
|
<a name="l335"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cF3>OC_LOCK_PREFIX</span><span class=cF0>);
|
|
<a name="l336"></a> </span><span class=cF1>switch</span><span class=cF0> (t1.raw_type)
|
|
<a name="l337"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l338"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_I8</span><span class=cF0>:
|
|
<a name="l339"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_U8</span><span class=cF0>:
|
|
<a name="l340"></a> </span><span class=cFD>ICRex</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>1</span><span class=cF0>]);
|
|
<a name="l341"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] << </span><span class=cFE>8</span><span class=cF0> + op.u8[</span><span class=cFE>1</span><span class=cF0>]);
|
|
<a name="l342"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l343"></a>
|
|
<a name="l344"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_I16</span><span class=cF0>:
|
|
<a name="l345"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_U16</span><span class=cF0>:
|
|
<a name="l346"></a> </span><span class=cFD>ICOpSizeRex</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>1</span><span class=cF0>]);
|
|
<a name="l347"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] << </span><span class=cFE>8</span><span class=cF0> + op.u8[</span><span class=cFE>2</span><span class=cF0>]);
|
|
<a name="l348"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l349"></a>
|
|
<a name="l350"></a> </span><span class=cF1>default</span><span class=cF0>:
|
|
<a name="l351"></a> </span><span class=cF1>if</span><span class=cF0> (i.u8[</span><span class=cFE>1</span><span class=cF0>] != </span><span class=cFE>0x48</span><span class=cF0> || !op.u8[</span><span class=cFE>3</span><span class=cF0>])
|
|
<a name="l352"></a> </span><span class=cFD>ICRex</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>1</span><span class=cF0>]);
|
|
<a name="l353"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] << </span><span class=cFE>8</span><span class=cF0> + op.u8[</span><span class=cFE>2</span><span class=cF0>]);
|
|
<a name="l354"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l355"></a> </span><span class=cF1>if</span><span class=cF0> (i.u8[</span><span class=cFE>0</span><span class=cF0>] == MODR_RIP_REL && </span><span class=cF7>(</span><span class=cF0>op == SLASH_OP_MOV_IMM || op & ~</span><span class=cFE>7</span><span class=cF0> == SLASH_OP_IMM_U32</span><span class=cF7>)</span><span class=cF0>)
|
|
<a name="l356"></a> i.u8[</span><span class=cFE>0</span><span class=cF0>] = MODR_RIP_REL_IMM_U32;
|
|
<a name="l357"></a> </span><span class=cFD>ICModr2</span><span class=cF0>(tmpi, i, t1, d1, rip);
|
|
<a name="l358"></a>}
|
|
<a name="l359"></a>
|
|
<a name="l360"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICPush</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>CICType</span><span class=cF0> t1, </span><span class=cF9>I64</span><span class=cF0> r1, </span><span class=cF9>I64</span><span class=cF0> d1, </span><span class=cF9>I64</span><span class=cF0> rip)
|
|
<a name="l361"></a>{
|
|
<a name="l362"></a> </span><span class=cF1>switch</span><span class=cF0> (</span><span class=cF5>Bsr</span><span class=cF7>(</span><span class=cF0>t1</span><span class=cF7>)</span><span class=cF0>)
|
|
<a name="l363"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l364"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_REG</span><span class=cF0>:
|
|
<a name="l365"></a> </span><span class=cF1>if</span><span class=cF0> (r1 > </span><span class=cFE>7</span><span class=cF0>)
|
|
<a name="l366"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0x5049</span><span class=cF0> + </span><span class=cF7>(</span><span class=cF0>r1 & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>8</span><span class=cF0>);
|
|
<a name="l367"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l368"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0x50</span><span class=cF0> + r1);
|
|
<a name="l369"></a> </span><span class=cF1>return</span><span class=cF0>;
|
|
<a name="l370"></a>
|
|
<a name="l371"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_IMM</span><span class=cF0>:
|
|
<a name="l372"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0> <= d1 <= </span><span class=cF3>I8_MAX</span><span class=cF0>)
|
|
<a name="l373"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0x6A</span><span class=cF0> + d1 << </span><span class=cFE>8</span><span class=cF0>);
|
|
<a name="l374"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I32_MIN</span><span class=cF0> <= d1 <= </span><span class=cF3>I32_MAX</span><span class=cF0>)
|
|
<a name="l375"></a> {
|
|
<a name="l376"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0x68</span><span class=cF0>);
|
|
<a name="l377"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, d1);
|
|
<a name="l378"></a> }
|
|
<a name="l379"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l380"></a> {
|
|
<a name="l381"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RBX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, t1, r1, d1, rip);
|
|
<a name="l382"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0x50</span><span class=cF0> + </span><span class=cF3>REG_RBX</span><span class=cF0>);
|
|
<a name="l383"></a> }
|
|
<a name="l384"></a> </span><span class=cF1>return</span><span class=cF0>;
|
|
<a name="l385"></a>
|
|
<a name="l386"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_STACK</span><span class=cF0>:
|
|
<a name="l387"></a> </span><span class=cF1>return</span><span class=cF0>;
|
|
<a name="l388"></a>
|
|
<a name="l389"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_DISP</span><span class=cF0>:
|
|
<a name="l390"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_SIB</span><span class=cF0>:
|
|
<a name="l391"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_RIP_DISP32</span><span class=cF0>:
|
|
<a name="l392"></a> </span><span class=cF1>switch</span><span class=cF0> (t1.raw_type)
|
|
<a name="l393"></a> {
|
|
<a name="l394"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_I64</span><span class=cF0>:
|
|
<a name="l395"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_U64</span><span class=cF0>:
|
|
<a name="l396"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_F64</span><span class=cF0>:
|
|
<a name="l397"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, t1, r1, d1, SLASH_OP_PUSH, rip);
|
|
<a name="l398"></a> </span><span class=cF1>return</span><span class=cF0>;
|
|
<a name="l399"></a> }
|
|
<a name="l400"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l401"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l402"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RBX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, t1, r1, d1, rip);
|
|
<a name="l403"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0x5048</span><span class=cF0> + </span><span class=cF3>REG_RBX</span><span class=cF0> << </span><span class=cFE>8</span><span class=cF0>);
|
|
<a name="l404"></a>}
|
|
<a name="l405"></a>
|
|
<a name="l406"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICPushRegs</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> mask)
|
|
<a name="l407"></a>{
|
|
<a name="l408"></a> </span><span class=cF9>I64</span><span class=cF0> i;
|
|
<a name="l409"></a>
|
|
<a name="l410"></a> </span><span class=cF1>for</span><span class=cF0> (i = </span><span class=cFE>0</span><span class=cF0>; i < </span><span class=cF3>REG_REGS_NUM</span><span class=cF0>; i++)
|
|
<a name="l411"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l412"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF5>Bt</span><span class=cF7>(</span><span class=cF0>&mask, i</span><span class=cF7>)</span><span class=cF0>)
|
|
<a name="l413"></a> {
|
|
<a name="l414"></a> </span><span class=cF1>if</span><span class=cF0> (i > </span><span class=cFE>7</span><span class=cF0>)
|
|
<a name="l415"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0x5049</span><span class=cF0> + </span><span class=cF7>(</span><span class=cF0>i & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>8</span><span class=cF0>);
|
|
<a name="l416"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l417"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0x50</span><span class=cF0> + i);
|
|
<a name="l418"></a> }
|
|
<a name="l419"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l420"></a>}
|
|
<a name="l421"></a>
|
|
<a name="l422"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICPop</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>CICType</span><span class=cF0> t1, </span><span class=cF9>I64</span><span class=cF0> r1, </span><span class=cF9>I64</span><span class=cF0> d1, </span><span class=cF9>I64</span><span class=cF0> rip)
|
|
<a name="l423"></a>{
|
|
<a name="l424"></a> </span><span class=cF1>switch</span><span class=cF0> (</span><span class=cF5>Bsr</span><span class=cF7>(</span><span class=cF0>t1</span><span class=cF7>)</span><span class=cF0>)
|
|
<a name="l425"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l426"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_REG</span><span class=cF0>:
|
|
<a name="l427"></a> </span><span class=cF1>if</span><span class=cF0> (r1 > </span><span class=cFE>7</span><span class=cF0>)
|
|
<a name="l428"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0x5849</span><span class=cF0> + </span><span class=cF7>(</span><span class=cF0>r1 & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>8</span><span class=cF0>);
|
|
<a name="l429"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l430"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0x58</span><span class=cF0> + r1);
|
|
<a name="l431"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l432"></a>
|
|
<a name="l433"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_DISP</span><span class=cF0>:
|
|
<a name="l434"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_RIP_DISP32</span><span class=cF0>:
|
|
<a name="l435"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_SIB</span><span class=cF0>:
|
|
<a name="l436"></a> </span><span class=cF1>if</span><span class=cF0> (t1.raw_type < </span><span class=cF3>RT_I64</span><span class=cF0>)
|
|
<a name="l437"></a> {
|
|
<a name="l438"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0x58</span><span class=cF0> + </span><span class=cF3>REG_RBX</span><span class=cF0>);
|
|
<a name="l439"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, t1, r1, d1, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RBX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l440"></a> }
|
|
<a name="l441"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l442"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, t1, r1, d1, SLASH_OP_POP, rip);
|
|
<a name="l443"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l444"></a>
|
|
<a name="l445"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_STACK</span><span class=cF0>:
|
|
<a name="l446"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_IMM</span><span class=cF0>:
|
|
<a name="l447"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0x58</span><span class=cF0> + </span><span class=cF3>REG_RBX</span><span class=cF0>);
|
|
<a name="l448"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, t1, r1, d1, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RBX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l449"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l450"></a>
|
|
<a name="l451"></a> </span><span class=cF1>default</span><span class=cF0>:
|
|
<a name="l452"></a> </span><span class=cFD>ICAddRSP</span><span class=cF0>(tmpi, </span><span class=cFE>8</span><span class=cF0>);
|
|
<a name="l453"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l454"></a>}
|
|
<a name="l455"></a>
|
|
<a name="l456"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICPopRegs</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> mask)
|
|
<a name="l457"></a>{
|
|
<a name="l458"></a> </span><span class=cF9>I64</span><span class=cF0> i;
|
|
<a name="l459"></a>
|
|
<a name="l460"></a> </span><span class=cF1>for</span><span class=cF0> (i = </span><span class=cF3>REG_REGS_NUM</span><span class=cF0> - </span><span class=cFE>1</span><span class=cF0>; i >= </span><span class=cFE>0</span><span class=cF0>; i--)
|
|
<a name="l461"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l462"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF5>Bt</span><span class=cF7>(</span><span class=cF0>&mask,i</span><span class=cF7>)</span><span class=cF0>)
|
|
<a name="l463"></a> {
|
|
<a name="l464"></a> </span><span class=cF1>if</span><span class=cF0> (i > </span><span class=cFE>7</span><span class=cF0>)
|
|
<a name="l465"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0x5849</span><span class=cF0> + </span><span class=cF7>(</span><span class=cF0>i & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>8</span><span class=cF0>);
|
|
<a name="l466"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l467"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0x58</span><span class=cF0> + i);
|
|
<a name="l468"></a> }
|
|
<a name="l469"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l470"></a>}
|
|
<a name="l471"></a>
|
|
<a name="l472"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICZero</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> r)
|
|
<a name="l473"></a>{
|
|
<a name="l474"></a> </span><span class=cF1>if</span><span class=cF0> (r > </span><span class=cFE>7</span><span class=cF0>)
|
|
<a name="l475"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l476"></a> r &= </span><span class=cFE>7</span><span class=cF0>;
|
|
<a name="l477"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xC0334D</span><span class=cF0> + r << </span><span class=cFE>16</span><span class=cF0> + r << </span><span class=cFE>19</span><span class=cF0>);
|
|
<a name="l478"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l479"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l480"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0xC033</span><span class=cF0> + r << </span><span class=cFE>8</span><span class=cF0> + r << </span><span class=cFE>11</span><span class=cF0>);
|
|
<a name="l481"></a>}
|
|
<a name="l482"></a>
|
|
<a name="l483"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICTest</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> r)
|
|
<a name="l484"></a>{
|
|
<a name="l485"></a> </span><span class=cF9>I64</span><span class=cF0> i = </span><span class=cFE>0xC08548</span><span class=cF0>; </span><span class=cF2>// TEST R,R</span><span class=cF0>
|
|
<a name="l486"></a>
|
|
<a name="l487"></a> </span><span class=cF1>if</span><span class=cF0> (r > </span><span class=cFE>7</span><span class=cF0>)
|
|
<a name="l488"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l489"></a> i += </span><span class=cFE>5</span><span class=cF0>;
|
|
<a name="l490"></a> r &= </span><span class=cFE>7</span><span class=cF0>;
|
|
<a name="l491"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l492"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, i + r << </span><span class=cFE>16</span><span class=cF0> + r << </span><span class=cFE>19</span><span class=cF0>);
|
|
<a name="l493"></a>}
|
|
<a name="l494"></a>
|
|
<a name="l495"></a></span><span class=cF9>I64</span><span class=cF0> </span><span class=cFD>ICBuiltInFloatConst</span><span class=cF0>(</span><span class=cF1>F64</span><span class=cF0> d)
|
|
<a name="l496"></a>{</span><span class=cF2>//Returns 2-byte opcode for FLD const or zero</span><span class=cF0>
|
|
<a name="l497"></a> </span><span class=cF1>if</span><span class=cF0> (!d)
|
|
<a name="l498"></a> </span><span class=cF1>return</span><span class=cF0> </span><span class=cFE>0xEED9</span><span class=cF0>;
|
|
<a name="l499"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (d == </span><span class=cFE>1</span><span class=cF0>.</span><span class=cFE>0</span><span class=cF0>)
|
|
<a name="l500"></a> </span><span class=cF1>return</span><span class=cF0> </span><span class=cFE>0xE8D9</span><span class=cF0>;
|
|
<a name="l501"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF5>OptionGet</span><span class=cF7>(</span><span class=cF3>OPTf_NO_BUILTIN_CONST</span><span class=cF7>)</span><span class=cF0>)
|
|
<a name="l502"></a> </span><span class=cF1>return</span><span class=cF0> </span><span class=cFE>0</span><span class=cF0>;
|
|
<a name="l503"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (d == </span><span class=cF3>pi</span><span class=cF0>)
|
|
<a name="l504"></a> </span><span class=cF1>return</span><span class=cF0> </span><span class=cFE>0xEBD9</span><span class=cF0>;
|
|
<a name="l505"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (d == </span><span class=cF3>log2_10</span><span class=cF0>)
|
|
<a name="l506"></a> </span><span class=cF1>return</span><span class=cF0> </span><span class=cFE>0xE9D9</span><span class=cF0>;
|
|
<a name="l507"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (d == </span><span class=cF3>log2_e</span><span class=cF0>)
|
|
<a name="l508"></a> </span><span class=cF1>return</span><span class=cF0> </span><span class=cFE>0xEAD9</span><span class=cF0>;
|
|
<a name="l509"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (d == </span><span class=cF3>log10_2</span><span class=cF0>)
|
|
<a name="l510"></a> </span><span class=cF1>return</span><span class=cF0> </span><span class=cFE>0xECD9</span><span class=cF0>;
|
|
<a name="l511"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (d == </span><span class=cF3>loge_2</span><span class=cF0>)
|
|
<a name="l512"></a> </span><span class=cF1>return</span><span class=cF0> </span><span class=cFE>0xEDD9</span><span class=cF0>;
|
|
<a name="l513"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l514"></a> </span><span class=cF1>return</span><span class=cF0> </span><span class=cFE>0</span><span class=cF0>;
|
|
<a name="l515"></a>}
|
|
<a name="l516"></a>
|
|
<a name="l517"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICMov</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>CICType</span><span class=cF0> t1, </span><span class=cF9>I64</span><span class=cF0> r1, </span><span class=cF9>I64</span><span class=cF0> d1, </span><span class=cF9>CICType</span><span class=cF0> t2, </span><span class=cF9>I64</span><span class=cF0> r2, </span><span class=cF9>I64</span><span class=cF0> d2, </span><span class=cF9>I64</span><span class=cF0> rip)
|
|
<a name="l518"></a>{
|
|
<a name="l519"></a> </span><span class=cF9>I64</span><span class=cF0> i, count1, count2, b1_rex, b2_rex, b1, b2, b1_modr, b2_modr, b1_r1, b1_r2, b2_r1, b2_r2,
|
|
<a name="l520"></a> last_start = tmpi->ic_count;
|
|
<a name="l521"></a> </span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpil1;
|
|
<a name="l522"></a> </span><span class=cF1>Bool</span><span class=cF0> old_lock = </span><span class=cF5>Btr</span><span class=cF0>(&tmpi->ic_flags, </span><span class=cF3>ICf_LOCK</span><span class=cF0>);
|
|
<a name="l523"></a>
|
|
<a name="l524"></a> </span><span class=cF1>switch</span><span class=cF0> (</span><span class=cF5>Bsr</span><span class=cF7>(</span><span class=cF0>t1</span><span class=cF7>)</span><span class=cF0>)
|
|
<a name="l525"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l526"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_REG</span><span class=cF0>:
|
|
<a name="l527"></a> </span><span class=cF1>if</span><span class=cF0> (t2 & </span><span class=cF3>MDF_IMM</span><span class=cF0>)
|
|
<a name="l528"></a> {
|
|
<a name="l529"></a> </span><span class=cF1>if</span><span class=cF0> (!d2)
|
|
<a name="l530"></a> </span><span class=cFD>ICZero</span><span class=cF0>(tmpi, r1);
|
|
<a name="l531"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cFE>0</span><span class=cF0> <= d2 <= </span><span class=cF3>U8_MAX</span><span class=cF0>)
|
|
<a name="l532"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l533"></a> </span><span class=cFD>ICZero</span><span class=cF0>(tmpi, r1);
|
|
<a name="l534"></a> </span><span class=cF1>if</span><span class=cF0> (r1 > </span><span class=cFE>7</span><span class=cF0>)
|
|
<a name="l535"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, d2 << </span><span class=cFE>16</span><span class=cF0> + </span><span class=cF7>(</span><span class=cFE>0xB0</span><span class=cF0> + r1 & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>8</span><span class=cF0> + </span><span class=cFE>0x41</span><span class=cF0>);
|
|
<a name="l536"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (r1 > </span><span class=cFE>3</span><span class=cF0>)
|
|
<a name="l537"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, d2 << </span><span class=cFE>16</span><span class=cF0> + </span><span class=cF7>(</span><span class=cFE>0xB0</span><span class=cF0> + r1</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>8</span><span class=cF0> + </span><span class=cFE>0x40</span><span class=cF0>);
|
|
<a name="l538"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l539"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, d2 << </span><span class=cFE>8</span><span class=cF0> + </span><span class=cFE>0xB0</span><span class=cF0> + r1);
|
|
<a name="l540"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l541"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0> <= d2 < </span><span class=cFE>0</span><span class=cF0>)
|
|
<a name="l542"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l543"></a> </span><span class=cF1>if</span><span class=cF0> (r1 > </span><span class=cFE>7</span><span class=cF0>)
|
|
<a name="l544"></a> {
|
|
<a name="l545"></a> r1 &= </span><span class=cFE>7</span><span class=cF0>;
|
|
<a name="l546"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, d2 << </span><span class=cFE>16</span><span class=cF0> + </span><span class=cF7>(</span><span class=cFE>0xB0</span><span class=cF0> + r1</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>8</span><span class=cF0> + </span><span class=cFE>0x41</span><span class=cF0>);
|
|
<a name="l547"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, </span><span class=cFE>0xC0BE0F4D</span><span class=cF0> + r1 << </span><span class=cFE>24</span><span class=cF0> + r1 << </span><span class=cFE>27</span><span class=cF0>);
|
|
<a name="l548"></a> }
|
|
<a name="l549"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l550"></a> {
|
|
<a name="l551"></a> </span><span class=cF1>if</span><span class=cF0> (r1 > </span><span class=cFE>3</span><span class=cF0>)
|
|
<a name="l552"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, d2 << </span><span class=cFE>16</span><span class=cF0> + </span><span class=cF7>(</span><span class=cFE>0xB0</span><span class=cF0> + r1</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>8</span><span class=cF0> + </span><span class=cFE>0x40</span><span class=cF0>);
|
|
<a name="l553"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l554"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, d2 << </span><span class=cFE>8</span><span class=cF0> + </span><span class=cFE>0xB0</span><span class=cF0> + r1);
|
|
<a name="l555"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, </span><span class=cFE>0xC0BE0F48</span><span class=cF0> + r1 << </span><span class=cFE>24</span><span class=cF0> + r1 << </span><span class=cFE>27</span><span class=cF0>);
|
|
<a name="l556"></a> }
|
|
<a name="l557"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l558"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cFE>0</span><span class=cF0> <= d2 <= </span><span class=cF3>U32_MAX</span><span class=cF0>)
|
|
<a name="l559"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l560"></a> </span><span class=cF1>if</span><span class=cF0> (r1 > </span><span class=cFE>7</span><span class=cF0>)
|
|
<a name="l561"></a> {
|
|
<a name="l562"></a> r1 &= </span><span class=cFE>7</span><span class=cF0>;
|
|
<a name="l563"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cF7>(</span><span class=cFE>0xB8</span><span class=cF0> + r1</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>8</span><span class=cF0> + </span><span class=cFE>0x41</span><span class=cF0>);
|
|
<a name="l564"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, d2);
|
|
<a name="l565"></a> }
|
|
<a name="l566"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l567"></a> {
|
|
<a name="l568"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0xB8</span><span class=cF0> + r1);
|
|
<a name="l569"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, d2);
|
|
<a name="l570"></a> }
|
|
<a name="l571"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l572"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I32_MIN</span><span class=cF0> <= d2 < </span><span class=cFE>0</span><span class=cF0>)
|
|
<a name="l573"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l574"></a> </span><span class=cF1>if</span><span class=cF0> (r1 > </span><span class=cFE>7</span><span class=cF0>)
|
|
<a name="l575"></a> {
|
|
<a name="l576"></a> r1 &= </span><span class=cFE>7</span><span class=cF0>;
|
|
<a name="l577"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cF7>(</span><span class=cFE>0xB8</span><span class=cF0> + r1</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>8</span><span class=cF0> + </span><span class=cFE>0x41</span><span class=cF0>);
|
|
<a name="l578"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, d2);
|
|
<a name="l579"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xC0634D</span><span class=cF0> + r1 << </span><span class=cFE>16</span><span class=cF0> + r1 << </span><span class=cFE>19</span><span class=cF0>);
|
|
<a name="l580"></a> }
|
|
<a name="l581"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l582"></a> {
|
|
<a name="l583"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0xB8</span><span class=cF0> + r1);
|
|
<a name="l584"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, d2);
|
|
<a name="l585"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xC06348</span><span class=cF0> + r1 << </span><span class=cFE>16</span><span class=cF0> + r1 << </span><span class=cFE>19</span><span class=cF0>);
|
|
<a name="l586"></a> }
|
|
<a name="l587"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l588"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l589"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l590"></a> i = </span><span class=cFE>0xB848</span><span class=cF0>;
|
|
<a name="l591"></a> </span><span class=cF1>if</span><span class=cF0> (r1 > </span><span class=cFE>7</span><span class=cF0>)
|
|
<a name="l592"></a> {
|
|
<a name="l593"></a> i++;
|
|
<a name="l594"></a> r1 &= </span><span class=cFE>7</span><span class=cF0>;
|
|
<a name="l595"></a> }
|
|
<a name="l596"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, i + r1 << </span><span class=cFE>8</span><span class=cF0>);
|
|
<a name="l597"></a> </span><span class=cFD>ICU64</span><span class=cF0>(tmpi, d2);
|
|
<a name="l598"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l599"></a> }
|
|
<a name="l600"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (t2 & </span><span class=cF3>MDF_STACK</span><span class=cF0>)
|
|
<a name="l601"></a> </span><span class=cFD>ICPop</span><span class=cF0>(tmpi, t1, r1, d1, rip);
|
|
<a name="l602"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l603"></a> {
|
|
<a name="l604"></a> </span><span class=cF1>if</span><span class=cF0> (r1 == r2 && t2 & </span><span class=cF3>MDF_REG</span><span class=cF0>)
|
|
<a name="l605"></a> </span><span class=cF1>goto</span><span class=cF0> move_done;
|
|
<a name="l606"></a> </span><span class=cF1>if</span><span class=cF0> (t2 & </span><span class=cF3>MDF_REG</span><span class=cF0>)
|
|
<a name="l607"></a> t2 = </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
|
|
<a name="l608"></a> i = </span><span class=cFD>ICModr1</span><span class=cF0>(r1, t2, r2, d2);
|
|
<a name="l609"></a> </span><span class=cF1>if</span><span class=cF0> (t2.raw_type != </span><span class=cF3>RT_U32</span><span class=cF0>)
|
|
<a name="l610"></a> i |= </span><span class=cFE>0x4800</span><span class=cF0>;
|
|
<a name="l611"></a> </span><span class=cFD>ICRex</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>1</span><span class=cF0>]);
|
|
<a name="l612"></a> </span><span class=cF1>switch</span><span class=cF0> (t2.raw_type)
|
|
<a name="l613"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l614"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_I8</span><span class=cF0>:
|
|
<a name="l615"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] << </span><span class=cFE>16</span><span class=cF0> + </span><span class=cFE>0xBE0F</span><span class=cF0>);
|
|
<a name="l616"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l617"></a>
|
|
<a name="l618"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_I16</span><span class=cF0>:
|
|
<a name="l619"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] << </span><span class=cFE>16</span><span class=cF0> + </span><span class=cFE>0xBF0F</span><span class=cF0>);
|
|
<a name="l620"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l621"></a>
|
|
<a name="l622"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_I32</span><span class=cF0>:
|
|
<a name="l623"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] << </span><span class=cFE>8</span><span class=cF0> + </span><span class=cFE>0x63</span><span class=cF0>);
|
|
<a name="l624"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l625"></a>
|
|
<a name="l626"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_U8</span><span class=cF0>:
|
|
<a name="l627"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] << </span><span class=cFE>16</span><span class=cF0> + </span><span class=cFE>0xB60F</span><span class=cF0>);
|
|
<a name="l628"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l629"></a>
|
|
<a name="l630"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_U16</span><span class=cF0>:
|
|
<a name="l631"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] << </span><span class=cFE>16</span><span class=cF0> + </span><span class=cFE>0xB70F</span><span class=cF0>);
|
|
<a name="l632"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l633"></a>
|
|
<a name="l634"></a> </span><span class=cF1>default</span><span class=cF0>:
|
|
<a name="l635"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] << </span><span class=cFE>8</span><span class=cF0> + </span><span class=cFE>0x8B</span><span class=cF0>);
|
|
<a name="l636"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l637"></a> </span><span class=cFD>ICModr2</span><span class=cF0>(tmpi, i,, d2, rip);
|
|
<a name="l638"></a> }
|
|
<a name="l639"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l640"></a>
|
|
<a name="l641"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_STACK</span><span class=cF0>:
|
|
<a name="l642"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_PUSH_CMP</span><span class=cF0>)
|
|
<a name="l643"></a> </span><span class=cFD>ICPopRegs</span><span class=cF0>(tmpi, </span><span class=cFE>1</span><span class=cF0> << </span><span class=cF3>REG_RBX</span><span class=cF0>);
|
|
<a name="l644"></a> </span><span class=cF1>if</span><span class=cF0> (t1.raw_type < t2.raw_type)
|
|
<a name="l645"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi, t2 & </span><span class=cF3>MDG_MASK</span><span class=cF0> + t1.raw_type, r2, d2, rip);
|
|
<a name="l646"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l647"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi, t2, r2, d2, rip);
|
|
<a name="l648"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_PUSH_CMP</span><span class=cF0>)
|
|
<a name="l649"></a> </span><span class=cFD>ICPushRegs</span><span class=cF0>(tmpi, </span><span class=cFE>1</span><span class=cF0> << </span><span class=cF3>REG_RBX</span><span class=cF0>);
|
|
<a name="l650"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l651"></a>
|
|
<a name="l652"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_DISP</span><span class=cF0>:
|
|
<a name="l653"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_RIP_DISP32</span><span class=cF0>:
|
|
<a name="l654"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_SIB</span><span class=cF0>:
|
|
<a name="l655"></a> </span><span class=cF1>if</span><span class=cF0> (t2 & </span><span class=cF3>MDF_IMM</span><span class=cF0> && </span><span class=cF7>(</span><span class=cF0>t1.raw_type < </span><span class=cF3>RT_I64</span><span class=cF0> || (</span><span class=cF3>I32_MIN</span><span class=cF0> <= d2 <= </span><span class=cF3>I32_MAX</span><span class=cF0>)</span><span class=cF7>)</span><span class=cF0>)
|
|
<a name="l656"></a> {
|
|
<a name="l657"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, t1, r1, d1, SLASH_OP_MOV_IMM, rip);
|
|
<a name="l658"></a> </span><span class=cF1>switch</span><span class=cF0> (t1.raw_type)
|
|
<a name="l659"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l660"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_I8</span><span class=cF0>:
|
|
<a name="l661"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_U8</span><span class=cF0>:
|
|
<a name="l662"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, d2);
|
|
<a name="l663"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l664"></a>
|
|
<a name="l665"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_I16</span><span class=cF0>:
|
|
<a name="l666"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_U16</span><span class=cF0>:
|
|
<a name="l667"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, d2);
|
|
<a name="l668"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l669"></a>
|
|
<a name="l670"></a> </span><span class=cF1>default</span><span class=cF0>:
|
|
<a name="l671"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, d2);
|
|
<a name="l672"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l673"></a> }
|
|
<a name="l674"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l675"></a> {
|
|
<a name="l676"></a> </span><span class=cF1>if</span><span class=cF0> (t2 & </span><span class=cF3>MDF_REG</span><span class=cF0>)
|
|
<a name="l677"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, t1, r1, d1, r2 + SLASH_OP_MOV, rip);
|
|
<a name="l678"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l679"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l680"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RBX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, t2, r2, d2, rip);
|
|
<a name="l681"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, t1, r1, d1, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RBX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l682"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l683"></a> }
|
|
<a name="l684"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l685"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l686"></a>move_done:
|
|
<a name="l687"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>(t1 | t2) & (</span><span class=cF3>MDF_STACK</span><span class=cF0> | </span><span class=cF3>MDF_RIP_DISP32</span><span class=cF0>)</span><span class=cF7>)</span><span class=cF0>)
|
|
<a name="l688"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l689"></a> tmpil1 = tmpi;
|
|
<a name="l690"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_last_start < </span><span class=cFE>0</span><span class=cF0> && </span><span class=cF7>(</span><span class=cF0>tmpil1 = </span><span class=cFD>OptLag1</span><span class=cF0>(tmpi)</span><span class=cF7>)</span><span class=cF0> && tmpil1->ic_last_start < </span><span class=cFE>0</span><span class=cF0>)
|
|
<a name="l691"></a> tmpil1 = </span><span class=cF3>NULL</span><span class=cF0>;
|
|
<a name="l692"></a> </span><span class=cF1>if</span><span class=cF0> (tmpil1)
|
|
<a name="l693"></a> {
|
|
<a name="l694"></a> </span><span class=cF1>if</span><span class=cF0> (tmpil1 == tmpi)
|
|
<a name="l695"></a> count1 = last_start - tmpil1->ic_last_start;
|
|
<a name="l696"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l697"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l698"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>tmpil1->ic_flags & </span><span class=cF3>ICF_CODE_FINAL</span><span class=cF7>)</span><span class=cF0>)
|
|
<a name="l699"></a> tmpi->ic_flags &= ~</span><span class=cF3>ICF_CODE_FINAL</span><span class=cF0>;
|
|
<a name="l700"></a> </span><span class=cF1>if</span><span class=cF0> (last_start)
|
|
<a name="l701"></a> count1 = </span><span class=cFE>0</span><span class=cF0>;
|
|
<a name="l702"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l703"></a> count1 = tmpil1->ic_count - tmpil1->ic_last_start;
|
|
<a name="l704"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l705"></a> count2 = tmpi->ic_count - last_start;
|
|
<a name="l706"></a> </span><span class=cF1>if</span><span class=cF0> (count1 && count1 == count2)
|
|
<a name="l707"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l708"></a> b1_rex = tmpil1->ic_body[tmpil1->ic_last_start];
|
|
<a name="l709"></a> b2_rex = tmpi->ic_body[last_start];
|
|
<a name="l710"></a> </span><span class=cF1>if</span><span class=cF0> (b1_rex & </span><span class=cFE>0x48</span><span class=cF0> == </span><span class=cFE>0x48</span><span class=cF0> && b2_rex & </span><span class=cFE>0x48</span><span class=cF0> == </span><span class=cFE>0x48</span><span class=cF0>)
|
|
<a name="l711"></a> {
|
|
<a name="l712"></a> </span><span class=cF1>for</span><span class=cF0> (i = </span><span class=cFE>1</span><span class=cF0>; i < count1; i++)
|
|
<a name="l713"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF7>(</span><span class=cF0>b1 = tmpil1->ic_body[tmpil1->ic_last_start + i]</span><span class=cF7>)</span><span class=cF0> == </span><span class=cF7>(</span><span class=cF0>b2 = tmpi->ic_body[last_start + i]</span><span class=cF7>)</span><span class=cF0>)
|
|
<a name="l714"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l715"></a> </span><span class=cF1>if</span><span class=cF0> (i == </span><span class=cFE>1</span><span class=cF0> && </span><span class=cF7>(</span><span class=cF0>b2 == </span><span class=cFE>0x89</span><span class=cF0> || b2 == </span><span class=cFE>0x8B</span><span class=cF7>)</span><span class=cF0>)
|
|
<a name="l716"></a> {
|
|
<a name="l717"></a> b1_modr = tmpil1->ic_body[tmpil1->ic_last_start + </span><span class=cFE>2</span><span class=cF0>];
|
|
<a name="l718"></a> b1_r1 = b1_modr & </span><span class=cFE>7</span><span class=cF0> + </span><span class=cF5>Bt</span><span class=cF0>(&b1_rex, </span><span class=cFE>0</span><span class=cF0>) << </span><span class=cFE>3</span><span class=cF0>;
|
|
<a name="l719"></a> b1_r2 = b1_modr >> </span><span class=cFE>3</span><span class=cF0> & </span><span class=cFE>7</span><span class=cF0> + </span><span class=cF5>Bt</span><span class=cF0>(&b1_rex, </span><span class=cFE>2</span><span class=cF0>) << </span><span class=cFE>3</span><span class=cF0>;
|
|
<a name="l720"></a> b2_modr = tmpi->ic_body[last_start+</span><span class=cFE>2</span><span class=cF0>];
|
|
<a name="l721"></a> b2_r1 = b2_modr & </span><span class=cFE>7</span><span class=cF0> + </span><span class=cF5>Bt</span><span class=cF0>(&b2_rex, </span><span class=cFE>0</span><span class=cF0>) << </span><span class=cFE>3</span><span class=cF0>;
|
|
<a name="l722"></a> b2_r2 = b2_modr >> </span><span class=cFE>3</span><span class=cF0> & </span><span class=cFE>7</span><span class=cF0> + </span><span class=cF5>Bt</span><span class=cF0>(&b2_rex, </span><span class=cFE>2</span><span class=cF0>) << </span><span class=cFE>3</span><span class=cF0>;
|
|
<a name="l723"></a> </span><span class=cF1>if</span><span class=cF0> (count1 == </span><span class=cFE>3</span><span class=cF0> && b2_modr & </span><span class=cFE>0xC0</span><span class=cF0> == </span><span class=cFE>0xC0</span><span class=cF0>)
|
|
<a name="l724"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l725"></a> </span><span class=cF1>if</span><span class=cF0> (b2_r1 == b2_r2)
|
|
<a name="l726"></a> </span><span class=cF1>goto</span><span class=cF0> move_redundant;
|
|
<a name="l727"></a> </span><span class=cF1>if</span><span class=cF0> (b1_modr & </span><span class=cFE>0xC0</span><span class=cF0> == </span><span class=cFE>0xC0</span><span class=cF0>) {
|
|
<a name="l728"></a> </span><span class=cF1>if</span><span class=cF0> (b1_r1 == b2_r2 && b2_r1 == b1_r2)
|
|
<a name="l729"></a> </span><span class=cF1>goto</span><span class=cF0> move_redundant;
|
|
<a name="l730"></a> }
|
|
<a name="l731"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l732"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (b1_rex != b2_rex || b1_r1 == b1_r2 || </span><span class=cF7>(</span><span class=cF0>t1 | t2</span><span class=cF7>)</span><span class=cF0> & </span><span class=cF3>MDF_SIB</span><span class=cF0>)
|
|
<a name="l733"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l734"></a> }
|
|
<a name="l735"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (b1_rex != b2_rex)
|
|
<a name="l736"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l737"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l738"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (i != </span><span class=cFE>1</span><span class=cF0>)
|
|
<a name="l739"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l740"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (b2 != </span><span class=cFE>0x89</span><span class=cF0> && b2 != </span><span class=cFE>0x8B</span><span class=cF0>)
|
|
<a name="l741"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l742"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l743"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l744"></a> b1_modr = tmpil1->ic_body[tmpil1->ic_last_start + </span><span class=cFE>2</span><span class=cF0>];
|
|
<a name="l745"></a> b1_r1 = b1_modr & </span><span class=cFE>7</span><span class=cF0> + </span><span class=cF5>Bt</span><span class=cF0>(&b1_rex, </span><span class=cFE>0</span><span class=cF0>) << </span><span class=cFE>3</span><span class=cF0>;
|
|
<a name="l746"></a> b1_r2 = b1_modr >> </span><span class=cFE>3</span><span class=cF0> & </span><span class=cFE>7</span><span class=cF0> + </span><span class=cF5>Bt</span><span class=cF0>(&b1_rex, </span><span class=cFE>2</span><span class=cF0>) << </span><span class=cFE>3</span><span class=cF0>;
|
|
<a name="l747"></a> b2_modr = tmpi->ic_body[last_start + </span><span class=cFE>2</span><span class=cF0>];
|
|
<a name="l748"></a> b2_r1 = b2_modr & </span><span class=cFE>7</span><span class=cF0> + </span><span class=cF5>Bt</span><span class=cF0>(&b2_rex, </span><span class=cFE>0</span><span class=cF0>) << </span><span class=cFE>3</span><span class=cF0>;
|
|
<a name="l749"></a> b2_r2 = b2_modr >> </span><span class=cFE>3</span><span class=cF0> & </span><span class=cFE>7</span><span class=cF0> + </span><span class=cF5>Bt</span><span class=cF0>(&b2_rex, </span><span class=cFE>2</span><span class=cF0>) << </span><span class=cFE>3</span><span class=cF0>;
|
|
<a name="l750"></a> </span><span class=cF1>if</span><span class=cF0> (count1 == </span><span class=cFE>3</span><span class=cF0> && b2_modr & </span><span class=cFE>0xC0</span><span class=cF0> == </span><span class=cFE>0xC0</span><span class=cF0>)
|
|
<a name="l751"></a> {
|
|
<a name="l752"></a> </span><span class=cF1>if</span><span class=cF0> (b2_r1 == b2_r2)
|
|
<a name="l753"></a> </span><span class=cF1>goto</span><span class=cF0> move_redundant;
|
|
<a name="l754"></a> </span><span class=cF1>if</span><span class=cF0> (b1 == </span><span class=cFE>0x89</span><span class=cF0> && b2 == </span><span class=cFE>0x8B</span><span class=cF0> || b1 == </span><span class=cFE>0x8B</span><span class=cF0> && b2 == </span><span class=cFE>0x89</span><span class=cF0>)
|
|
<a name="l755"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l756"></a> </span><span class=cF1>if</span><span class=cF0> (b1_modr & </span><span class=cFE>0xC0</span><span class=cF0> == </span><span class=cFE>0xC0</span><span class=cF0>)
|
|
<a name="l757"></a> {
|
|
<a name="l758"></a> </span><span class=cF1>if</span><span class=cF0> (b1_r1 == b2_r1 && b1_r2 == b2_r2 || b1_r1 == b2_r2 && b2_r1 == b1_r2)
|
|
<a name="l759"></a> </span><span class=cF1>goto</span><span class=cF0> move_redundant;
|
|
<a name="l760"></a> }
|
|
<a name="l761"></a> </span><span class=cF1>if</span><span class=cF0> (b1_rex != b2_rex)
|
|
<a name="l762"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l763"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l764"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l765"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l766"></a> }
|
|
<a name="l767"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (b1_r1 == b1_r2 || </span><span class=cF7>(</span><span class=cF0>t1 | t2</span><span class=cF7>)</span><span class=cF0> & </span><span class=cF3>MDF_SIB</span><span class=cF0> || b1_rex != b2_rex ||
|
|
<a name="l768"></a> !</span><span class=cF7>(</span><span class=cF0>b1 == </span><span class=cFE>0x89</span><span class=cF0> && b2 == </span><span class=cFE>0x8B</span><span class=cF0> || b1 == </span><span class=cFE>0x8B</span><span class=cF0> && b2 == </span><span class=cFE>0x89</span><span class=cF7>)</span><span class=cF0>)
|
|
<a name="l769"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l770"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l771"></a> </span><span class=cF1>if</span><span class=cF0> (i == count1)
|
|
<a name="l772"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l773"></a>move_redundant:
|
|
<a name="l774"></a> tmpi->ic_count = last_start;
|
|
<a name="l775"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l776"></a> }
|
|
<a name="l777"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l778"></a> }
|
|
<a name="l779"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l780"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_count > last_start > tmpi->ic_last_start)
|
|
<a name="l781"></a> tmpi->ic_last_start = last_start;
|
|
<a name="l782"></a> </span><span class=cF5>BEqual</span><span class=cF0>(&tmpi->ic_flags, </span><span class=cF3>ICf_LOCK</span><span class=cF0>, old_lock);
|
|
<a name="l783"></a>}
|
|
<a name="l784"></a>
|
|
<a name="l785"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICLea</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>CICType</span><span class=cF0> t1, </span><span class=cF9>I64</span><span class=cF0> r1, </span><span class=cF9>I64</span><span class=cF0> d1, </span><span class=cF9>CICType</span><span class=cF0> t2, </span><span class=cF9>I64</span><span class=cF0> r2, </span><span class=cF9>I64</span><span class=cF0> d2, </span><span class=cF9>CCompCtrl</span><span class=cF0> *cc, </span><span class=cF1>U8</span><span class=cF0> *buf, </span><span class=cF9>I64</span><span class=cF0> rip)
|
|
<a name="l786"></a>{
|
|
<a name="l787"></a> </span><span class=cF9>I64</span><span class=cF0> i;
|
|
<a name="l788"></a> </span><span class=cF9>CAOTAbsAddr</span><span class=cF0> *tmpa;
|
|
<a name="l789"></a>
|
|
<a name="l790"></a> </span><span class=cF1>switch</span><span class=cF0> (</span><span class=cF5>Bsr</span><span class=cF7>(</span><span class=cF0>t1</span><span class=cF7>)</span><span class=cF0>)
|
|
<a name="l791"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l792"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_REG</span><span class=cF0>:
|
|
<a name="l793"></a> i = </span><span class=cFD>ICModr1</span><span class=cF0>(r1, t2, r2, d2);
|
|
<a name="l794"></a> i.u8[</span><span class=cFE>1</span><span class=cF0>] |= </span><span class=cFE>0x48</span><span class=cF0>;
|
|
<a name="l795"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] << </span><span class=cFE>16</span><span class=cF0> + </span><span class=cFE>0x8D00</span><span class=cF0> + i.u8[</span><span class=cFE>1</span><span class=cF0>]);
|
|
<a name="l796"></a> </span><span class=cFD>ICModr2</span><span class=cF0>(tmpi, i,, d2, rip);
|
|
<a name="l797"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l798"></a>
|
|
<a name="l799"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_STACK</span><span class=cF0>:
|
|
<a name="l800"></a> </span><span class=cF1>if</span><span class=cF0> (t2 & </span><span class=cF3>MDF_RIP_DISP32</span><span class=cF0>)
|
|
<a name="l801"></a> {
|
|
<a name="l802"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0x68</span><span class=cF0>);
|
|
<a name="l803"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, d2);
|
|
<a name="l804"></a> </span><span class=cF1>if</span><span class=cF0> (cc->flags & </span><span class=cF3>CCF_AOT_COMPILE</span><span class=cF0> && buf && !</span><span class=cF7>(</span><span class=cF0>cc->flags & </span><span class=cF3>CCF_NO_ABSS</span><span class=cF7>)</span><span class=cF0>)
|
|
<a name="l805"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l806"></a> tmpa = </span><span class=cF5>CAlloc</span><span class=cF0>(</span><span class=cF1>sizeof</span><span class=cF7>(</span><span class=cF9>CAOTAbsAddr</span><span class=cF7>)</span><span class=cF0>);
|
|
<a name="l807"></a> tmpa->next = cc->aotc->abss;
|
|
<a name="l808"></a> tmpa->type = </span><span class=cF3>AAT_ADD_U32</span><span class=cF0>;
|
|
<a name="l809"></a> cc->aotc->abss = tmpa;
|
|
<a name="l810"></a> tmpa->rip = rip + tmpi->ic_count - </span><span class=cFE>4</span><span class=cF0>;
|
|
<a name="l811"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l812"></a> tmpi->ic_flags &= ~</span><span class=cF3>ICF_CODE_FINAL</span><span class=cF0>;
|
|
<a name="l813"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l814"></a> } </span><span class=cF2>// Fall thru</span><span class=cF0>
|
|
<a name="l815"></a> </span><span class=cF1>default</span><span class=cF0>:
|
|
<a name="l816"></a> </span><span class=cFD>ICLea</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, t2, r2, d2, cc, buf, rip);
|
|
<a name="l817"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, t1, r1, d1, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l818"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l819"></a>}
|
|
<a name="l820"></a>
|
|
<a name="l821"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICDeref</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip)
|
|
<a name="l822"></a>{
|
|
<a name="l823"></a> </span><span class=cF9>CICType</span><span class=cF0> t;
|
|
<a name="l824"></a>
|
|
<a name="l825"></a> t = tmpi->res.type.raw_type;
|
|
<a name="l826"></a> </span><span class=cF1>if</span><span class=cF0> (t > tmpi->arg1_type_pointed_to)
|
|
<a name="l827"></a> t = tmpi->arg1_type_pointed_to;
|
|
<a name="l828"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg1.type & </span><span class=cF3>MDF_REG</span><span class=cF0>)
|
|
<a name="l829"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi->res.type, tmpi->res.</span><span class=cF1>reg</span><span class=cF0>, tmpi->res.disp, </span><span class=cF3>MDF_DISP</span><span class=cF0> + t, tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, rip);
|
|
<a name="l830"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l831"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l832"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg1.type, tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, rip);
|
|
<a name="l833"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi->res.type, tmpi->res.</span><span class=cF1>reg</span><span class=cF0>, tmpi->res.disp, </span><span class=cF3>MDF_DISP</span><span class=cF0> + t, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l834"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l835"></a>}
|
|
</span></pre></body>
|
|
</html>
|