mirror of
https://github.com/Zeal-Operating-System/ZealOS.git
synced 2025-01-05 20:26:32 +00:00
1b75d91002
Add arg to SATARep to specify drive types to show. Add checks in AHCIPortInit to verify port signatures, add helper method to get signatures from port.
789 lines
110 KiB
HTML
Executable file
789 lines
110 KiB
HTML
Executable file
<!DOCTYPE HTML>
|
|
<html>
|
|
<head>
|
|
<meta http-equiv="Content-Type" content="text/html;charset=US-ASCII">
|
|
<meta name="generator" content="ZealOS V0.13">
|
|
<style type="text/css">
|
|
body {background-color:#fef1f0;}
|
|
.cF0{color:#000000;background-color:#fef1f0;}
|
|
.cF1{color:#0148a4;background-color:#fef1f0;}
|
|
.cF2{color:#3b7901;background-color:#fef1f0;}
|
|
.cF3{color:#057c7e;background-color:#fef1f0;}
|
|
.cF4{color:#bb2020;background-color:#fef1f0;}
|
|
.cF5{color:#9e42ae;background-color:#fef1f0;}
|
|
.cF6{color:#b57901;background-color:#fef1f0;}
|
|
.cF7{color:#b2b6af;background-color:#fef1f0;}
|
|
.cF8{color:#555753;background-color:#fef1f0;}
|
|
.cF9{color:#678fbb;background-color:#fef1f0;}
|
|
.cFA{color:#82bc49;background-color:#fef1f0;}
|
|
.cFB{color:#0097a2;background-color:#fef1f0;}
|
|
.cFC{color:#e26a6a;background-color:#fef1f0;}
|
|
.cFD{color:#c671bc;background-color:#fef1f0;}
|
|
.cFE{color:#c7ab00;background-color:#fef1f0;}
|
|
.cFF{color:#fef1f0;background-color:#fef1f0;}
|
|
</style>
|
|
</head>
|
|
<body>
|
|
<pre style="font-family:monospace;font-size:12pt">
|
|
<a name="l1"></a><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICAddEct</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,
|
|
<a name="l2"></a> </span><span class=cF9>CICType</span><span class=cF0> t1, </span><span class=cF9>I64</span><span class=cF0> r1, </span><span class=cF9>I64</span><span class=cF0> d1,
|
|
<a name="l3"></a> </span><span class=cF9>CICType</span><span class=cF0> t2, </span><span class=cF9>I64</span><span class=cF0> r2, </span><span class=cF9>I64</span><span class=cF0> d2,
|
|
<a name="l4"></a> </span><span class=cF9>CICType</span><span class=cF0> t3, </span><span class=cF9>I64</span><span class=cF0> r3, </span><span class=cF9>I64</span><span class=cF0> d3,
|
|
<a name="l5"></a> </span><span class=cF9>I64</span><span class=cF0> op, </span><span class=cF9>I64</span><span class=cF0> rip)
|
|
<a name="l6"></a>{
|
|
<a name="l7"></a> </span><span class=cF9>I64</span><span class=cF0> i, tmp,res_reg = </span><span class=cF3>REG_RAX</span><span class=cF0>;
|
|
<a name="l8"></a> </span><span class=cF1>Bool</span><span class=cF0> swap = </span><span class=cF3>FALSE</span><span class=cF0>;
|
|
<a name="l9"></a>
|
|
<a name="l10"></a> </span><span class=cF1>if</span><span class=cF0> (r3 != res_reg)
|
|
<a name="l11"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l12"></a> swap ^= </span><span class=cF3>TRUE</span><span class=cF0>;
|
|
<a name="l13"></a> </span><span class=cF5>SwapI64</span><span class=cF0>(&t2, &t3);
|
|
<a name="l14"></a> </span><span class=cF5>SwapI64</span><span class=cF0>(&r2, &r3);
|
|
<a name="l15"></a> </span><span class=cF5>SwapI64</span><span class=cF0>(&d2, &d3);
|
|
<a name="l16"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l17"></a> </span><span class=cF1>if</span><span class=cF0> (t2.raw_type >= </span><span class=cF3>RT_I64</span><span class=cF0> && r2 != res_reg && t2 & </span><span class=cF3>MDG_REG_DISP_SIB_RIP</span><span class=cF0>)
|
|
<a name="l18"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l19"></a> </span><span class=cF1>if</span><span class=cF0> (t1 & </span><span class=cF3>MDF_REG</span><span class=cF0> && !</span><span class=cF7>(</span><span class=cF0>r2 == r1 && t2 & </span><span class=cF3>MDG_REG_DISP_SIB</span><span class=cF7>)</span><span class=cF0>)
|
|
<a name="l20"></a> res_reg = r1;
|
|
<a name="l21"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, res_reg, </span><span class=cFE>0</span><span class=cF0>, t3, r3, d3, rip);
|
|
<a name="l22"></a> i=</span><span class=cFD>ICModr1</span><span class=cF0>(res_reg, t2, r2, d2);
|
|
<a name="l23"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_LOCK</span><span class=cF0>)
|
|
<a name="l24"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cF3>OC_LOCK_PREFIX</span><span class=cF0>);
|
|
<a name="l25"></a> </span><span class=cFD>ICRex</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>1</span><span class=cF0>]);
|
|
<a name="l26"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] << </span><span class=cFE>8</span><span class=cF0> + op);
|
|
<a name="l27"></a> </span><span class=cFD>ICModr2</span><span class=cF0>(tmpi, i,, d2, rip);
|
|
<a name="l28"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l29"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l30"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l31"></a> </span><span class=cF1>if</span><span class=cF0> (t2 & </span><span class=cF3>MDF_REG</span><span class=cF0>)
|
|
<a name="l32"></a> tmp = r2;
|
|
<a name="l33"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l34"></a> tmp = </span><span class=cF3>REG_RCX</span><span class=cF0>;
|
|
<a name="l35"></a>
|
|
<a name="l36"></a> </span><span class=cF1>if</span><span class=cF0> (t1 & </span><span class=cF3>MDF_REG</span><span class=cF0>)
|
|
<a name="l37"></a> res_reg = r1;
|
|
<a name="l38"></a>
|
|
<a name="l39"></a> </span><span class=cF1>if</span><span class=cF0> (tmp == res_reg)
|
|
<a name="l40"></a> res_reg = </span><span class=cF3>REG_RDX</span><span class=cF0>;
|
|
<a name="l41"></a> </span><span class=cF1>if</span><span class=cF0> (swap)
|
|
<a name="l42"></a> {
|
|
<a name="l43"></a> </span><span class=cF1>if</span><span class=cF0> (r3 == tmp && t3 & </span><span class=cF3>MDG_REG_DISP_SIB</span><span class=cF0>)
|
|
<a name="l44"></a> tmp = </span><span class=cF3>REG_RCX</span><span class=cF0>;
|
|
<a name="l45"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, tmp, </span><span class=cFE>0</span><span class=cF0>, t2, r2, d2, rip);
|
|
<a name="l46"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, res_reg, </span><span class=cFE>0</span><span class=cF0>, t3, r3, d3, rip);
|
|
<a name="l47"></a> }
|
|
<a name="l48"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l49"></a> {
|
|
<a name="l50"></a> </span><span class=cF1>if</span><span class=cF0> (r2 == res_reg && t2 & </span><span class=cF3>MDG_REG_DISP_SIB</span><span class=cF0>)
|
|
<a name="l51"></a> res_reg = </span><span class=cF3>REG_RDX</span><span class=cF0>;
|
|
<a name="l52"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, res_reg, </span><span class=cFE>0</span><span class=cF0>, t3, r3, d3, rip);
|
|
<a name="l53"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, tmp, </span><span class=cFE>0</span><span class=cF0>, t2, r2, d2, rip);
|
|
<a name="l54"></a> }
|
|
<a name="l55"></a> i = </span><span class=cFE>0x48</span><span class=cF0>;
|
|
<a name="l56"></a> </span><span class=cF1>if</span><span class=cF0> (res_reg > </span><span class=cFE>7</span><span class=cF0>)
|
|
<a name="l57"></a> i += </span><span class=cFE>4</span><span class=cF0>;
|
|
<a name="l58"></a> </span><span class=cF1>if</span><span class=cF0> (tmp > </span><span class=cFE>7</span><span class=cF0>)
|
|
<a name="l59"></a> i++;
|
|
<a name="l60"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_LOCK</span><span class=cF0>)
|
|
<a name="l61"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cF3>OC_LOCK_PREFIX</span><span class=cF0>);
|
|
<a name="l62"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xC00000</span><span class=cF0> + i + </span><span class=cF7>(</span><span class=cF0>tmp & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>16</span><span class=cF0> + </span><span class=cF7>(</span><span class=cF0>res_reg & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>19</span><span class=cF0> + op << </span><span class=cFE>8</span><span class=cF0>);
|
|
<a name="l63"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l64"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, t1, r1, d1, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, res_reg, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l65"></a>}
|
|
<a name="l66"></a>
|
|
<a name="l67"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICAddSubEctImm</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,
|
|
<a name="l68"></a> </span><span class=cF9>CICType</span><span class=cF0> t1, </span><span class=cF9>I64</span><span class=cF0> r1, </span><span class=cF9>I64</span><span class=cF0> d1,
|
|
<a name="l69"></a> </span><span class=cF9>CICType</span><span class=cF0> t2, </span><span class=cF9>I64</span><span class=cF0> r2, </span><span class=cF9>I64</span><span class=cF0> d2,
|
|
<a name="l70"></a> </span><span class=cF9>I64</span><span class=cF0> d, </span><span class=cF9>I64</span><span class=cF0> op, </span><span class=cF9>I64</span><span class=cF0> rip)
|
|
<a name="l71"></a>{
|
|
<a name="l72"></a> </span><span class=cF9>I64</span><span class=cF0> i;
|
|
<a name="l73"></a>
|
|
<a name="l74"></a> </span><span class=cF1>if</span><span class=cF0> (op.u8[</span><span class=cFE>0</span><span class=cF0>] == </span><span class=cFE>0x2B</span><span class=cF0>)
|
|
<a name="l75"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l76"></a> op = </span><span class=cFE>0x0003</span><span class=cF0>;
|
|
<a name="l77"></a> d = -d;
|
|
<a name="l78"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l79"></a> </span><span class=cF1>if</span><span class=cF0> (t1 & </span><span class=cF3>MDF_REG</span><span class=cF0>)
|
|
<a name="l80"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l81"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>t2 & </span><span class=cF3>MDF_REG</span><span class=cF7>)</span><span class=cF0>)
|
|
<a name="l82"></a> {
|
|
<a name="l83"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, t1, r1, d1, t2, r2, d2, rip);
|
|
<a name="l84"></a> t2 = t1;
|
|
<a name="l85"></a> r2 = r1;
|
|
<a name="l86"></a> d2 = d1;
|
|
<a name="l87"></a> }
|
|
<a name="l88"></a> </span><span class=cF1>if</span><span class=cF0> (r1 == r2)
|
|
<a name="l89"></a> {
|
|
<a name="l90"></a> </span><span class=cF1>if</span><span class=cF0> (r1 > </span><span class=cFE>7</span><span class=cF0>)
|
|
<a name="l91"></a> i = </span><span class=cFE>0x49</span><span class=cF0>;
|
|
<a name="l92"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l93"></a> i = </span><span class=cFE>0x48</span><span class=cF0>;
|
|
<a name="l94"></a> </span><span class=cF1>if</span><span class=cF0> (!d && </span><span class=cF7>(</span><span class=cF0>op.u8[</span><span class=cFE>0</span><span class=cF0>] == </span><span class=cFE>0x03</span><span class=cF0> || op.u8[</span><span class=cFE>0</span><span class=cF0>] == </span><span class=cFE>0x2B</span><span class=cF0> || op.u8[</span><span class=cFE>0</span><span class=cF0>] == </span><span class=cFE>0x33</span><span class=cF0> || op.u8[</span><span class=cFE>0</span><span class=cF0>] == </span><span class=cFE>0x0B</span><span class=cF7>)</span><span class=cF0>)
|
|
<a name="l95"></a> </span><span class=cF1>return</span><span class=cF0>;
|
|
<a name="l96"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (d == </span><span class=cFE>1</span><span class=cF0> && op.u8[</span><span class=cFE>0</span><span class=cF0>] == </span><span class=cFE>0x03</span><span class=cF0>)
|
|
<a name="l97"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l98"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xC0FF00</span><span class=cF0> + op.u8[</span><span class=cFE>1</span><span class=cF0>] << </span><span class=cFE>19</span><span class=cF0> + i + </span><span class=cF7>(</span><span class=cF0>r1 & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>16</span><span class=cF0>);
|
|
<a name="l99"></a> </span><span class=cF1>return</span><span class=cF0>;
|
|
<a name="l100"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l101"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (d == -</span><span class=cFE>1</span><span class=cF0> && op.u8[</span><span class=cFE>0</span><span class=cF0>] == </span><span class=cFE>0x03</span><span class=cF0>)
|
|
<a name="l102"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l103"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xC8FF00</span><span class=cF0> + i + </span><span class=cF7>(</span><span class=cF0>r1 & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>16</span><span class=cF0>);
|
|
<a name="l104"></a> </span><span class=cF1>return</span><span class=cF0>;
|
|
<a name="l105"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l106"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0> <= d <= </span><span class=cF3>I8_MAX</span><span class=cF0>)
|
|
<a name="l107"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l108"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xC08300</span><span class=cF0> + op.u8[</span><span class=cFE>1</span><span class=cF0>] << </span><span class=cFE>19</span><span class=cF0> + i + </span><span class=cF7>(</span><span class=cF0>r1 & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>16</span><span class=cF0>);
|
|
<a name="l109"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, d);
|
|
<a name="l110"></a> </span><span class=cF1>return</span><span class=cF0>;
|
|
<a name="l111"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l112"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I32_MIN</span><span class=cF0> <= d <= </span><span class=cF3>I32_MAX</span><span class=cF0>)
|
|
<a name="l113"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l114"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xC08100</span><span class=cF0> + op.u8[</span><span class=cFE>1</span><span class=cF0>] << </span><span class=cFE>19</span><span class=cF0> + i + </span><span class=cF7>(</span><span class=cF0>r1 & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>16</span><span class=cF0>);
|
|
<a name="l115"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, d);
|
|
<a name="l116"></a> </span><span class=cF1>return</span><span class=cF0>;
|
|
<a name="l117"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l118"></a> }
|
|
<a name="l119"></a> </span><span class=cF1>if</span><span class=cF0> (op.u8[</span><span class=cFE>0</span><span class=cF0>] == </span><span class=cFE>0x03</span><span class=cF0> && </span><span class=cF3>I32_MIN</span><span class=cF0> <= d <= </span><span class=cF3>I32_MAX</span><span class=cF0> && !</span><span class=cF5>Bt</span><span class=cF7>(</span><span class=cF0>&</span><span class=cFB>cmp</span><span class=cF0>.non_ptr_vars_mask, r2</span><span class=cF7>)</span><span class=cF0>)
|
|
<a name="l120"></a> {
|
|
<a name="l121"></a> i = </span><span class=cFD>ICModr1</span><span class=cF0>(r1, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r2, d);
|
|
<a name="l122"></a> i.u8[</span><span class=cFE>1</span><span class=cF0>] |= </span><span class=cFE>0x48</span><span class=cF0>;
|
|
<a name="l123"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] << </span><span class=cFE>16</span><span class=cF0> + </span><span class=cFE>0x8D00</span><span class=cF0> + i.u8[</span><span class=cFE>1</span><span class=cF0>]);
|
|
<a name="l124"></a> </span><span class=cFD>ICModr2</span><span class=cF0>(tmpi, i,, d, rip);
|
|
<a name="l125"></a> </span><span class=cF1>return</span><span class=cF0>;
|
|
<a name="l126"></a> }
|
|
<a name="l127"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l128"></a> </span><span class=cF1>switch</span><span class=cF0> (</span><span class=cF5>Bsr</span><span class=cF7>(</span><span class=cF0>t1</span><span class=cF7>)</span><span class=cF0>)
|
|
<a name="l129"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l130"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_REG</span><span class=cF0>:
|
|
<a name="l131"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_DISP</span><span class=cF0>:
|
|
<a name="l132"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_SIB</span><span class=cF0>:
|
|
<a name="l133"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_RIP_DISP32</span><span class=cF0>:
|
|
<a name="l134"></a> </span><span class=cF1>if</span><span class=cF0> (t1 != t2 || r1 != r2 || d1 != d2)
|
|
<a name="l135"></a> {
|
|
<a name="l136"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, t1, r1, d1, t2, r2, d2, rip);
|
|
<a name="l137"></a> t2 = t1;
|
|
<a name="l138"></a> r2 = r1;
|
|
<a name="l139"></a> d2 = d1;
|
|
<a name="l140"></a> }
|
|
<a name="l141"></a>
|
|
<a name="l142"></a> </span><span class=cF1>if</span><span class=cF0> (!d &&</span><span class=cF7>(</span><span class=cF0>op.u8[</span><span class=cFE>0</span><span class=cF0>] == </span><span class=cFE>0x03</span><span class=cF0> || op.u8[</span><span class=cFE>0</span><span class=cF0>] == </span><span class=cFE>0x2B</span><span class=cF0> || op.u8[</span><span class=cFE>0</span><span class=cF0>] == </span><span class=cFE>0x33</span><span class=cF0> || op.u8[</span><span class=cFE>0</span><span class=cF0>] == </span><span class=cFE>0x0B</span><span class=cF7>)</span><span class=cF0>)
|
|
<a name="l143"></a> </span><span class=cF1>return</span><span class=cF0>;
|
|
<a name="l144"></a>
|
|
<a name="l145"></a> </span><span class=cF1>if</span><span class=cF0> (op.u8[</span><span class=cFE>0</span><span class=cF0>] == </span><span class=cFE>0x03</span><span class=cF0> && d == -</span><span class=cFE>1</span><span class=cF0>) </span><span class=cF2>//add -1</span><span class=cF0>
|
|
<a name="l146"></a> op.u8[</span><span class=cFE>1</span><span class=cF0>] = </span><span class=cFE>1</span><span class=cF0>; </span><span class=cF2>//Decrement slash val</span><span class=cF0>
|
|
<a name="l147"></a>
|
|
<a name="l148"></a> </span><span class=cF1>if</span><span class=cF0> (op.u8[</span><span class=cFE>0</span><span class=cF0>] == </span><span class=cFE>0x03</span><span class=cF0> && </span><span class=cF7>(</span><span class=cF0>d == </span><span class=cFE>1</span><span class=cF0> || d == -</span><span class=cFE>1</span><span class=cF7>)</span><span class=cF0>) { </span><span class=cF2>//Add</span><span class=cF0>
|
|
<a name="l149"></a> i = </span><span class=cFD>ICModr1</span><span class=cF0>(op.u8[</span><span class=cFE>1</span><span class=cF0>], t1, r1, d1);
|
|
<a name="l150"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>t1 & </span><span class=cF3>MDF_REG</span><span class=cF7>)</span><span class=cF0> && tmpi->ic_flags & </span><span class=cF3>ICF_LOCK</span><span class=cF0>)
|
|
<a name="l151"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cF3>OC_LOCK_PREFIX</span><span class=cF0>);
|
|
<a name="l152"></a> </span><span class=cF1>switch</span><span class=cF0> (t1.raw_type)
|
|
<a name="l153"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l154"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_I8</span><span class=cF0>:
|
|
<a name="l155"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_U8</span><span class=cF0>:
|
|
<a name="l156"></a> </span><span class=cFD>ICRex</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>1</span><span class=cF0>]);
|
|
<a name="l157"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] << </span><span class=cFE>8</span><span class=cF0> + </span><span class=cFE>0xFE</span><span class=cF0>);
|
|
<a name="l158"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l159"></a>
|
|
<a name="l160"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_I16</span><span class=cF0>:
|
|
<a name="l161"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_U16</span><span class=cF0>:
|
|
<a name="l162"></a> </span><span class=cFD>ICOpSizeRex</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>1</span><span class=cF0>]);
|
|
<a name="l163"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] << </span><span class=cFE>8</span><span class=cF0> + </span><span class=cFE>0xFF</span><span class=cF0>);
|
|
<a name="l164"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l165"></a>
|
|
<a name="l166"></a> </span><span class=cF1>default</span><span class=cF0>:
|
|
<a name="l167"></a> </span><span class=cFD>ICRex</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>1</span><span class=cF0>]);
|
|
<a name="l168"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] << </span><span class=cFE>8</span><span class=cF0> + </span><span class=cFE>0xFF</span><span class=cF0>);
|
|
<a name="l169"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l170"></a> </span><span class=cFD>ICModr2</span><span class=cF0>(tmpi, i,, d1, rip);
|
|
<a name="l171"></a> </span><span class=cF1>return</span><span class=cF0>;
|
|
<a name="l172"></a> }
|
|
<a name="l173"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0> <= d <= </span><span class=cF3>I8_MAX</span><span class=cF0> || t1 & </span><span class=cF7>(</span><span class=cF3>RTG_MASK</span><span class=cF0> - </span><span class=cF3>RTF_UNSIGNED</span><span class=cF7>)</span><span class=cF0> == </span><span class=cF3>RT_I8</span><span class=cF0>)
|
|
<a name="l174"></a> {
|
|
<a name="l175"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, t1, r1, d1, SLASH_OP_IMM_U8 + op.u8[</span><span class=cFE>1</span><span class=cF0>], rip + </span><span class=cFE>1</span><span class=cF0>);
|
|
<a name="l176"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, d);
|
|
<a name="l177"></a> </span><span class=cF1>return</span><span class=cF0>;
|
|
<a name="l178"></a> }
|
|
<a name="l179"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I32_MIN</span><span class=cF0> <= d <= </span><span class=cF3>I32_MAX</span><span class=cF0> || t1.raw_type < </span><span class=cF3>RT_I64</span><span class=cF0>)
|
|
<a name="l180"></a> {
|
|
<a name="l181"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, t1, r1, d1, SLASH_OP_IMM_U32 + op.u8[</span><span class=cFE>1</span><span class=cF0>], rip);
|
|
<a name="l182"></a> </span><span class=cF1>if</span><span class=cF0> (t1 & </span><span class=cF7>(</span><span class=cF3>RTG_MASK</span><span class=cF0> - </span><span class=cF3>RTF_UNSIGNED</span><span class=cF7>)</span><span class=cF0> == </span><span class=cF3>RT_I16</span><span class=cF0>)
|
|
<a name="l183"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, d);
|
|
<a name="l184"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l185"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, d);
|
|
<a name="l186"></a> </span><span class=cF1>return</span><span class=cF0>;
|
|
<a name="l187"></a> }
|
|
<a name="l188"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l189"></a>
|
|
<a name="l190"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_STACK</span><span class=cF0>:
|
|
<a name="l191"></a> </span><span class=cFD>ICAddSubEctImm</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, t2, r2, d2, d, op, rip);
|
|
<a name="l192"></a> </span><span class=cFD>ICPushRegs</span><span class=cF0>(tmpi, </span><span class=cFE>1</span><span class=cF0> << </span><span class=cF3>REG_RAX</span><span class=cF0>);
|
|
<a name="l193"></a> </span><span class=cF1>return</span><span class=cF0>;
|
|
<a name="l194"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l195"></a> </span><span class=cFD>ICAddEct</span><span class=cF0>(tmpi, t1, r1, d1, </span><span class=cF3>MDF_IMM</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, d, t2, r2, d2, op.u8[</span><span class=cFE>0</span><span class=cF0>], rip);
|
|
<a name="l196"></a>}
|
|
<a name="l197"></a>
|
|
<a name="l198"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICSub</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,
|
|
<a name="l199"></a> </span><span class=cF9>CICType</span><span class=cF0> t1, </span><span class=cF9>I64</span><span class=cF0> r1, </span><span class=cF9>I64</span><span class=cF0> d1,
|
|
<a name="l200"></a> </span><span class=cF9>CICType</span><span class=cF0> t2, </span><span class=cF9>I64</span><span class=cF0> r2, </span><span class=cF9>I64</span><span class=cF0> d2,
|
|
<a name="l201"></a> </span><span class=cF9>CICType</span><span class=cF0> t3, </span><span class=cF9>I64</span><span class=cF0> r3, </span><span class=cF9>I64</span><span class=cF0> d3,
|
|
<a name="l202"></a> </span><span class=cF9>I64</span><span class=cF0> rip)
|
|
<a name="l203"></a>{
|
|
<a name="l204"></a> </span><span class=cF9>I64</span><span class=cF0> i = </span><span class=cFE>0x48</span><span class=cF0>, op = </span><span class=cFE>0x2B</span><span class=cF0>;
|
|
<a name="l205"></a> </span><span class=cF1>Bool</span><span class=cF0> swap = </span><span class=cF3>FALSE</span><span class=cF0>;
|
|
<a name="l206"></a>
|
|
<a name="l207"></a> </span><span class=cF1>if</span><span class=cF0> (r3 != </span><span class=cF3>REG_RAX</span><span class=cF0>)
|
|
<a name="l208"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l209"></a> swap = </span><span class=cF3>TRUE</span><span class=cF0>;
|
|
<a name="l210"></a> </span><span class=cF5>SwapI64</span><span class=cF0>(&t2, &t3);
|
|
<a name="l211"></a> </span><span class=cF5>SwapI64</span><span class=cF0>(&r2, &r3);
|
|
<a name="l212"></a> </span><span class=cF5>SwapI64</span><span class=cF0>(&d2, &d3);
|
|
<a name="l213"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l214"></a> </span><span class=cF1>if</span><span class=cF0> (t2.raw_type >= </span><span class=cF3>RT_I64</span><span class=cF0> && r2.u8[</span><span class=cFE>0</span><span class=cF0>] != </span><span class=cF3>REG_RAX</span><span class=cF0> &&
|
|
<a name="l215"></a> </span><span class=cF7>(</span><span class=cF0>!(t2 & </span><span class=cF3>MDF_SIB</span><span class=cF0>) || r2.u8[</span><span class=cFE>1</span><span class=cF0>] & </span><span class=cFE>15</span><span class=cF0> != </span><span class=cF3>REG_RAX</span><span class=cF7>)</span><span class=cF0> &&
|
|
<a name="l216"></a> t2 & </span><span class=cF3>MDG_REG_DISP_SIB_RIP</span><span class=cF0>)
|
|
<a name="l217"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l218"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, t3, r3, d3, rip);
|
|
<a name="l219"></a> </span><span class=cF1>if</span><span class=cF0> (!swap)
|
|
<a name="l220"></a> {
|
|
<a name="l221"></a> op = </span><span class=cFE>0x03</span><span class=cF0>;
|
|
<a name="l222"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xD8F748</span><span class=cF0>);
|
|
<a name="l223"></a> }
|
|
<a name="l224"></a> i = </span><span class=cFD>ICModr1</span><span class=cF0>(</span><span class=cF3>REG_RAX</span><span class=cF0>, t2, r2, d2);
|
|
<a name="l225"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_LOCK</span><span class=cF0>)
|
|
<a name="l226"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cF3>OC_LOCK_PREFIX</span><span class=cF0>);
|
|
<a name="l227"></a> </span><span class=cFD>ICRex</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>1</span><span class=cF0>]);
|
|
<a name="l228"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] << </span><span class=cFE>8</span><span class=cF0> + op);
|
|
<a name="l229"></a> </span><span class=cFD>ICModr2</span><span class=cF0>(tmpi, i,, d2, rip);
|
|
<a name="l230"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, t1, r1, d1, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l231"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l232"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l233"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l234"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>t3 & </span><span class=cF3>MDF_REG</span><span class=cF7>)</span><span class=cF0> || t3.raw_type < </span><span class=cF3>RT_I64</span><span class=cF0>)
|
|
<a name="l235"></a> {
|
|
<a name="l236"></a> </span><span class=cF1>if</span><span class=cF0> (swap)
|
|
<a name="l237"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l238"></a> swap = </span><span class=cF3>FALSE</span><span class=cF0>;
|
|
<a name="l239"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, t3, r3, d3, rip);
|
|
<a name="l240"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, t2, r2, d2, rip);
|
|
<a name="l241"></a> r2 = </span><span class=cF3>REG_RAX</span><span class=cF0>;
|
|
<a name="l242"></a> r3 = </span><span class=cF3>REG_RCX</span><span class=cF0>;
|
|
<a name="l243"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l244"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l245"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l246"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, t3, r3, d3, rip);
|
|
<a name="l247"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, t2, r2, d2, rip);
|
|
<a name="l248"></a> r3 = </span><span class=cF3>REG_RAX</span><span class=cF0>;
|
|
<a name="l249"></a> r2 = </span><span class=cF3>REG_RCX</span><span class=cF0>;
|
|
<a name="l250"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l251"></a> }
|
|
<a name="l252"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l253"></a> {
|
|
<a name="l254"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, t2, r2, d2, rip);
|
|
<a name="l255"></a> r2 = </span><span class=cF3>REG_RCX</span><span class=cF0>;
|
|
<a name="l256"></a> }
|
|
<a name="l257"></a> </span><span class=cF1>if</span><span class=cF0> (swap)
|
|
<a name="l258"></a> {
|
|
<a name="l259"></a> op = </span><span class=cFE>0x03</span><span class=cF0>;
|
|
<a name="l260"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xD9F748</span><span class=cF0>);
|
|
<a name="l261"></a> }
|
|
<a name="l262"></a> </span><span class=cF1>if</span><span class=cF0> (r3 > </span><span class=cFE>7</span><span class=cF0>)
|
|
<a name="l263"></a> i++;
|
|
<a name="l264"></a> </span><span class=cF1>if</span><span class=cF0> (r2 > </span><span class=cFE>7</span><span class=cF0>)
|
|
<a name="l265"></a> i += </span><span class=cFE>4</span><span class=cF0>;
|
|
<a name="l266"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_LOCK</span><span class=cF0>)
|
|
<a name="l267"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cF3>OC_LOCK_PREFIX</span><span class=cF0>);
|
|
<a name="l268"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xC00000</span><span class=cF0> + i + </span><span class=cF7>(</span><span class=cF0>r3 & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>16</span><span class=cF0> + </span><span class=cF7>(</span><span class=cF0>r2 & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>19</span><span class=cF0> + op << </span><span class=cFE>8</span><span class=cF0>);
|
|
<a name="l269"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, t1, r1, d1, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r2, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l270"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l271"></a>}
|
|
<a name="l272"></a>
|
|
<a name="l273"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICMul</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip)
|
|
<a name="l274"></a>{
|
|
<a name="l275"></a> </span><span class=cF9>I64</span><span class=cF0> i, r2, r = </span><span class=cF3>REG_RAX</span><span class=cF0>, j;
|
|
<a name="l276"></a> </span><span class=cF9>CICArg</span><span class=cF0> *arg1, *arg2;
|
|
<a name="l277"></a> </span><span class=cF1>Bool</span><span class=cF0> alt;
|
|
<a name="l278"></a>
|
|
<a name="l279"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg1.type & </span><span class=cF3>MDF_IMM</span><span class=cF0>)
|
|
<a name="l280"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l281"></a> arg1 = &tmpi->arg2;
|
|
<a name="l282"></a> arg2 = &tmpi->arg1;
|
|
<a name="l283"></a> alt = </span><span class=cF3>TRUE</span><span class=cF0>;
|
|
<a name="l284"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l285"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l286"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l287"></a> arg1 = &tmpi->arg1;
|
|
<a name="l288"></a> arg2 = &tmpi->arg2;
|
|
<a name="l289"></a> alt = </span><span class=cF3>FALSE</span><span class=cF0>;
|
|
<a name="l290"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l291"></a> i = arg2->disp;
|
|
<a name="l292"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>tmpi->ic_class->raw_type & </span><span class=cF3>RTF_UNSIGNED</span><span class=cF7>)</span><span class=cF0> && arg2->type & </span><span class=cF3>MDF_IMM</span><span class=cF0> && </span><span class=cF3>I32_MIN</span><span class=cF0> <= i <= </span><span class=cF3>I32_MAX</span><span class=cF0>)
|
|
<a name="l293"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l294"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->res.type == </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>)
|
|
<a name="l295"></a> {
|
|
<a name="l296"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi->res.type, tmpi->res.</span><span class=cF1>reg</span><span class=cF0>, tmpi->res.disp, arg1->type, arg1-></span><span class=cF1>reg</span><span class=cF0>, arg1->disp, rip);
|
|
<a name="l297"></a> r = tmpi->res.</span><span class=cF1>reg</span><span class=cF0>;
|
|
<a name="l298"></a> }
|
|
<a name="l299"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l300"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, arg1->type, arg1-></span><span class=cF1>reg</span><span class=cF0>, arg1->disp, rip);
|
|
<a name="l301"></a> </span><span class=cF1>if</span><span class=cF0> (r > </span><span class=cFE>7</span><span class=cF0>)
|
|
<a name="l302"></a> j = </span><span class=cFE>0xC0004D</span><span class=cF0>;
|
|
<a name="l303"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l304"></a> j = </span><span class=cFE>0xC00048</span><span class=cF0>;
|
|
<a name="l305"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0> <= i <= </span><span class=cF3>I8_MAX</span><span class=cF0>)
|
|
<a name="l306"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, i << </span><span class=cFE>24</span><span class=cF0> + </span><span class=cFE>0x6B00</span><span class=cF0> + j + </span><span class=cF7>(</span><span class=cF0>r & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>16</span><span class=cF0> + </span><span class=cF7>(</span><span class=cF0>r & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>19</span><span class=cF0>);
|
|
<a name="l307"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l308"></a> {
|
|
<a name="l309"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0x6900</span><span class=cF0> + j + </span><span class=cF7>(</span><span class=cF0>r & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>16</span><span class=cF0> + </span><span class=cF7>(</span><span class=cF0>r & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>19</span><span class=cF0>);
|
|
<a name="l310"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, i);
|
|
<a name="l311"></a> }
|
|
<a name="l312"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l313"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l314"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l315"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_class->raw_type & </span><span class=cF3>RTF_UNSIGNED</span><span class=cF0>)
|
|
<a name="l316"></a> i = </span><span class=cFE>0xE0F748</span><span class=cF0>;
|
|
<a name="l317"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l318"></a> i = </span><span class=cFE>0xE8F748</span><span class=cF0>;
|
|
<a name="l319"></a> </span><span class=cF1>if</span><span class=cF0> (alt)
|
|
<a name="l320"></a> {
|
|
<a name="l321"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, arg1->type, arg1-></span><span class=cF1>reg</span><span class=cF0>, arg1->disp, rip);
|
|
<a name="l322"></a> r2 = </span><span class=cF3>REG_RCX</span><span class=cF0>;
|
|
<a name="l323"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, arg2->type, arg2-></span><span class=cF1>reg</span><span class=cF0>, arg2->disp, rip);
|
|
<a name="l324"></a> }
|
|
<a name="l325"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l326"></a> {
|
|
<a name="l327"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, arg2->type, arg2-></span><span class=cF1>reg</span><span class=cF0>, arg2->disp, rip);
|
|
<a name="l328"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>arg1->type & </span><span class=cF3>MDF_REG</span><span class=cF7>)</span><span class=cF0> || arg1->type.raw_type < </span><span class=cF3>RT_I64</span><span class=cF0>)
|
|
<a name="l329"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l330"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, arg1->type, arg1-></span><span class=cF1>reg</span><span class=cF0>, arg1->disp, rip);
|
|
<a name="l331"></a> r2 = </span><span class=cF3>REG_RCX</span><span class=cF0>;
|
|
<a name="l332"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l333"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l334"></a> r2 = arg1-></span><span class=cF1>reg</span><span class=cF0>;
|
|
<a name="l335"></a> }
|
|
<a name="l336"></a> </span><span class=cF1>if</span><span class=cF0> (r2 > </span><span class=cFE>7</span><span class=cF0>)
|
|
<a name="l337"></a> {
|
|
<a name="l338"></a> i++;
|
|
<a name="l339"></a> r2 &= </span><span class=cFE>7</span><span class=cF0>;
|
|
<a name="l340"></a> }
|
|
<a name="l341"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, i + r2 << </span><span class=cFE>16</span><span class=cF0>);
|
|
<a name="l342"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l343"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi->res.type, tmpi->res.</span><span class=cF1>reg</span><span class=cF0>, tmpi->res.disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l344"></a>}
|
|
<a name="l345"></a>
|
|
<a name="l346"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICMulEqu</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip)
|
|
<a name="l347"></a>{
|
|
<a name="l348"></a> </span><span class=cF9>I64</span><span class=cF0> i = tmpi->arg2.disp, r = </span><span class=cF3>REG_RAX</span><span class=cF0>, j;
|
|
<a name="l349"></a>
|
|
<a name="l350"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>tmpi->ic_class->raw_type & </span><span class=cF3>RTF_UNSIGNED</span><span class=cF7>)</span><span class=cF0> && tmpi->arg2.type & </span><span class=cF3>MDF_IMM</span><span class=cF0> && </span><span class=cF3>I32_MIN</span><span class=cF0> <= i <= </span><span class=cF3>I32_MAX</span><span class=cF0>)
|
|
<a name="l351"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l352"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_BY_VAL</span><span class=cF0>)
|
|
<a name="l353"></a> {
|
|
<a name="l354"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg1.type == </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>)
|
|
<a name="l355"></a> r = tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>;
|
|
<a name="l356"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l357"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>,
|
|
<a name="l358"></a> tmpi->arg1.type & </span><span class=cF3>MDG_MASK</span><span class=cF0> + tmpi->arg1_type_pointed_to,
|
|
<a name="l359"></a> tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, rip);
|
|
<a name="l360"></a> </span><span class=cF1>if</span><span class=cF0> (r > </span><span class=cFE>7</span><span class=cF0>)
|
|
<a name="l361"></a> j = </span><span class=cFE>0xC0004D</span><span class=cF0>;
|
|
<a name="l362"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l363"></a> j = </span><span class=cFE>0xC00048</span><span class=cF0>;
|
|
<a name="l364"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0> <= i <= </span><span class=cF3>I8_MAX</span><span class=cF0>)
|
|
<a name="l365"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, i << </span><span class=cFE>24</span><span class=cF0> + </span><span class=cFE>0x6B00</span><span class=cF0> + j + </span><span class=cF7>(</span><span class=cF0>r & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>16</span><span class=cF0> + </span><span class=cF7>(</span><span class=cF0>r & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>19</span><span class=cF0>);
|
|
<a name="l366"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l367"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l368"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0x6900</span><span class=cF0> + j + </span><span class=cF7>(</span><span class=cF0>r & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>16</span><span class=cF0> + </span><span class=cF7>(</span><span class=cF0>r & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>19</span><span class=cF0>);
|
|
<a name="l369"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, i);
|
|
<a name="l370"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l371"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi->arg1.type & </span><span class=cF3>MDG_MASK</span><span class=cF0> + tmpi->arg1_type_pointed_to,
|
|
<a name="l372"></a> tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l373"></a> }
|
|
<a name="l374"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l375"></a> {
|
|
<a name="l376"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>,
|
|
<a name="l377"></a> tmpi->arg1.type, tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, rip);
|
|
<a name="l378"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RBX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>,
|
|
<a name="l379"></a> </span><span class=cF3>MDF_DISP</span><span class=cF0> + tmpi->arg1_type_pointed_to, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l380"></a> r = </span><span class=cF3>REG_RBX</span><span class=cF0>;
|
|
<a name="l381"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0> <= i <= </span><span class=cF3>I8_MAX</span><span class=cF0>)
|
|
<a name="l382"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, i << </span><span class=cFE>24</span><span class=cF0> + </span><span class=cFE>0xDB6B48</span><span class=cF0>);
|
|
<a name="l383"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l384"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l385"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xDB6948</span><span class=cF0>);
|
|
<a name="l386"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, i);
|
|
<a name="l387"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l388"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + tmpi->arg1_type_pointed_to, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RBX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l389"></a> }
|
|
<a name="l390"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l391"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l392"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l393"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_class->raw_type & </span><span class=cF3>RTF_UNSIGNED</span><span class=cF0>)
|
|
<a name="l394"></a> i = </span><span class=cFE>0xE3F748</span><span class=cF0>;
|
|
<a name="l395"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l396"></a> i = </span><span class=cFE>0xEBF748</span><span class=cF0>;
|
|
<a name="l397"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_BY_VAL</span><span class=cF0>)
|
|
<a name="l398"></a> {
|
|
<a name="l399"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg2.type, tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg2.disp, rip);
|
|
<a name="l400"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RBX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>,
|
|
<a name="l401"></a> tmpi->arg1.type & </span><span class=cF3>MDG_MASK</span><span class=cF0> + tmpi->arg1_type_pointed_to,
|
|
<a name="l402"></a> tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, rip);
|
|
<a name="l403"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, i);
|
|
<a name="l404"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi->arg1.type & </span><span class=cF3>MDG_MASK</span><span class=cF0> + tmpi->arg1_type_pointed_to,
|
|
<a name="l405"></a> tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l406"></a> }
|
|
<a name="l407"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l408"></a> {
|
|
<a name="l409"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg2.type, tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg2.disp, rip);
|
|
<a name="l410"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg1.type, tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, rip);
|
|
<a name="l411"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RBX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_DISP</span><span class=cF0> + tmpi->arg1_type_pointed_to, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l412"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, i);
|
|
<a name="l413"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + tmpi->arg1_type_pointed_to, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l414"></a> }
|
|
<a name="l415"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l416"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->res.type.mode)
|
|
<a name="l417"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi->res.type, tmpi->res.</span><span class=cF1>reg</span><span class=cF0>, tmpi->res.disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l418"></a>}
|
|
<a name="l419"></a>
|
|
<a name="l420"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICDiv</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip)
|
|
<a name="l421"></a>{
|
|
<a name="l422"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg2.type, tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg2.disp, rip);
|
|
<a name="l423"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg1.type, tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, rip);
|
|
<a name="l424"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_class->raw_type & </span><span class=cF3>RTF_UNSIGNED</span><span class=cF0>)
|
|
<a name="l425"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l426"></a> </span><span class=cFD>ICZero</span><span class=cF0>(tmpi, </span><span class=cF3>REG_RDX</span><span class=cF0>);
|
|
<a name="l427"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xF1F748</span><span class=cF0>);
|
|
<a name="l428"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l429"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l430"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l431"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0x9948</span><span class=cF0>);
|
|
<a name="l432"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xF9F748</span><span class=cF0>);
|
|
<a name="l433"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l434"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi->res.type, tmpi->res.</span><span class=cF1>reg</span><span class=cF0>, tmpi->res.disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l435"></a>}
|
|
<a name="l436"></a>
|
|
<a name="l437"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICDivEqu</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF1>Bool</span><span class=cF0> is_mod, </span><span class=cF9>I64</span><span class=cF0> rip)
|
|
<a name="l438"></a>{
|
|
<a name="l439"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_BY_VAL</span><span class=cF0>)
|
|
<a name="l440"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l441"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg2.type, tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg2.disp, rip);
|
|
<a name="l442"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>,
|
|
<a name="l443"></a> tmpi->arg1.type & </span><span class=cF3>MDG_MASK</span><span class=cF0> + tmpi->arg1_type_pointed_to,
|
|
<a name="l444"></a> tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, rip);
|
|
<a name="l445"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_class->raw_type & </span><span class=cF3>RTF_UNSIGNED</span><span class=cF0>)
|
|
<a name="l446"></a> {
|
|
<a name="l447"></a> </span><span class=cFD>ICZero</span><span class=cF0>(tmpi, </span><span class=cF3>REG_RDX</span><span class=cF0>);
|
|
<a name="l448"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xF1F748</span><span class=cF0>);
|
|
<a name="l449"></a> }
|
|
<a name="l450"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l451"></a> {
|
|
<a name="l452"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0x9948</span><span class=cF0>);
|
|
<a name="l453"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xF9F748</span><span class=cF0>);
|
|
<a name="l454"></a> }
|
|
<a name="l455"></a> </span><span class=cF1>if</span><span class=cF0> (is_mod)
|
|
<a name="l456"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi->arg1.type & </span><span class=cF3>MDG_MASK</span><span class=cF0> + tmpi->arg1_type_pointed_to,
|
|
<a name="l457"></a> tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l458"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l459"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi->arg1.type & </span><span class=cF3>MDG_MASK</span><span class=cF0> + tmpi->arg1_type_pointed_to,
|
|
<a name="l460"></a> tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l461"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l462"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l463"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l464"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg2.type, tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg2.disp, rip);
|
|
<a name="l465"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RBX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg1.type, tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, rip);
|
|
<a name="l466"></a></span><span class=cF2>//dangerous might clobber RBX in Mov, but it doesn't</span><span class=cF0>
|
|
<a name="l467"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_DISP</span><span class=cF0> + tmpi->arg1_type_pointed_to, </span><span class=cF3>REG_RBX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l468"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_class->raw_type & </span><span class=cF3>RTF_UNSIGNED</span><span class=cF0>)
|
|
<a name="l469"></a> {
|
|
<a name="l470"></a> </span><span class=cFD>ICZero</span><span class=cF0>(tmpi, </span><span class=cF3>REG_RDX</span><span class=cF0>);
|
|
<a name="l471"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xF1F748</span><span class=cF0>);
|
|
<a name="l472"></a> }
|
|
<a name="l473"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l474"></a> {
|
|
<a name="l475"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0x9948</span><span class=cF0>);
|
|
<a name="l476"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xF9F748</span><span class=cF0>);
|
|
<a name="l477"></a> }
|
|
<a name="l478"></a> </span><span class=cF1>if</span><span class=cF0> (is_mod)
|
|
<a name="l479"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + tmpi->arg1_type_pointed_to, </span><span class=cF3>REG_RBX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l480"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l481"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + tmpi->arg1_type_pointed_to, </span><span class=cF3>REG_RBX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l482"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l483"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->res.type.mode)
|
|
<a name="l484"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l485"></a> </span><span class=cF1>if</span><span class=cF0> (is_mod)
|
|
<a name="l486"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi->res.type, tmpi->res.</span><span class=cF1>reg</span><span class=cF0>, tmpi->res.disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l487"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l488"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi->res.type, tmpi->res.</span><span class=cF1>reg</span><span class=cF0>, tmpi->res.disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l489"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l490"></a>}
|
|
<a name="l491"></a>
|
|
<a name="l492"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICMod</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip)
|
|
<a name="l493"></a>{
|
|
<a name="l494"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> +</span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg2.type, tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg2.disp, rip);
|
|
<a name="l495"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> +</span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg1.type, tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, rip);
|
|
<a name="l496"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_class->raw_type & </span><span class=cF3>RTF_UNSIGNED</span><span class=cF0>)
|
|
<a name="l497"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l498"></a> </span><span class=cFD>ICZero</span><span class=cF0>(tmpi, </span><span class=cF3>REG_RDX</span><span class=cF0>);
|
|
<a name="l499"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xF1F748</span><span class=cF0>);
|
|
<a name="l500"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l501"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l502"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l503"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0x9948</span><span class=cF0>);
|
|
<a name="l504"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xF9F748</span><span class=cF0>);
|
|
<a name="l505"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l506"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi->res.type, tmpi->res.</span><span class=cF1>reg</span><span class=cF0>, tmpi->res.disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l507"></a>}
|
|
<a name="l508"></a>
|
|
<a name="l509"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICAddSubEctEqu</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF1>U8</span><span class=cF0> type_pointed_to,
|
|
<a name="l510"></a> </span><span class=cF9>CICType</span><span class=cF0> t1, </span><span class=cF9>I64</span><span class=cF0> r1, </span><span class=cF9>I64</span><span class=cF0> d1,
|
|
<a name="l511"></a> </span><span class=cF9>CICType</span><span class=cF0> t2, </span><span class=cF9>I64</span><span class=cF0> r2, </span><span class=cF9>I64</span><span class=cF0> d2,
|
|
<a name="l512"></a> </span><span class=cF9>CICType</span><span class=cF0> t3, </span><span class=cF9>I64</span><span class=cF0> r3, </span><span class=cF9>I64</span><span class=cF0> d3,
|
|
<a name="l513"></a> </span><span class=cF9>I64</span><span class=cF0> op, </span><span class=cF9>I64</span><span class=cF0> rip)
|
|
<a name="l514"></a>{
|
|
<a name="l515"></a> </span><span class=cF1>Bool</span><span class=cF0> done;
|
|
<a name="l516"></a> </span><span class=cF9>I64</span><span class=cF0> res_reg, tmp, i;
|
|
<a name="l517"></a>
|
|
<a name="l518"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_BY_VAL</span><span class=cF0>)
|
|
<a name="l519"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l520"></a> </span><span class=cF1>if</span><span class=cF0> (t3 & </span><span class=cF3>MDF_IMM</span><span class=cF0>)
|
|
<a name="l521"></a> {
|
|
<a name="l522"></a> </span><span class=cFD>ICAddSubEctImm</span><span class=cF0>(tmpi, t2 & </span><span class=cF3>MDG_MASK</span><span class=cF0> + type_pointed_to, r2, d2,
|
|
<a name="l523"></a> t2 & </span><span class=cF3>MDG_MASK</span><span class=cF0> + type_pointed_to, r2, d2, d3, op, rip);
|
|
<a name="l524"></a> </span><span class=cF1>if</span><span class=cF0> (t1.mode)
|
|
<a name="l525"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, t1, r1, d1, t2 & </span><span class=cF3>MDG_MASK</span><span class=cF0> + type_pointed_to, r2, d2, rip);
|
|
<a name="l526"></a> </span><span class=cF1>return</span><span class=cF0>;
|
|
<a name="l527"></a> }
|
|
<a name="l528"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l529"></a> {
|
|
<a name="l530"></a> done = </span><span class=cF3>FALSE</span><span class=cF0>;
|
|
<a name="l531"></a> </span><span class=cF1>if</span><span class=cF0> (type_pointed_to >= </span><span class=cF3>RT_I64</span><span class=cF0>)
|
|
<a name="l532"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l533"></a> </span><span class=cF1>if</span><span class=cF0> (!t1.mode && t2 & </span><span class=cF3>MDG_REG_DISP_SIB_RIP</span><span class=cF0>)
|
|
<a name="l534"></a> {
|
|
<a name="l535"></a> </span><span class=cF1>if</span><span class=cF0> (t3 & </span><span class=cF3>MDF_REG</span><span class=cF0>)
|
|
<a name="l536"></a> tmp = r3;
|
|
<a name="l537"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l538"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l539"></a> tmp = </span><span class=cF3>REG_RCX</span><span class=cF0>;
|
|
<a name="l540"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, tmp, </span><span class=cFE>0</span><span class=cF0>, t3, r3, d3, rip);
|
|
<a name="l541"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l542"></a> i = </span><span class=cFD>ICModr1</span><span class=cF0>(tmp, t2 & </span><span class=cF3>MDG_MASK</span><span class=cF0> + type_pointed_to, r2, d2);
|
|
<a name="l543"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_LOCK</span><span class=cF0>)
|
|
<a name="l544"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cF3>OC_LOCK_PREFIX</span><span class=cF0>);
|
|
<a name="l545"></a> </span><span class=cFD>ICRex</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>1</span><span class=cF0>]);
|
|
<a name="l546"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] << </span><span class=cFE>8</span><span class=cF0> + op.u8[</span><span class=cFE>5</span><span class=cF0>]);
|
|
<a name="l547"></a> </span><span class=cFD>ICModr2</span><span class=cF0>(tmpi, i,, d2, rip);
|
|
<a name="l548"></a> </span><span class=cF1>return</span><span class=cF0>;
|
|
<a name="l549"></a> }
|
|
<a name="l550"></a> </span><span class=cF1>if</span><span class=cF0> (t3.raw_type >= </span><span class=cF3>RT_I64</span><span class=cF0> && t3 & </span><span class=cF3>MDG_REG_DISP_SIB_RIP</span><span class=cF0>)
|
|
<a name="l551"></a> {
|
|
<a name="l552"></a> </span><span class=cF1>if</span><span class=cF0> (t2 & </span><span class=cF3>MDF_REG</span><span class=cF0>)
|
|
<a name="l553"></a> res_reg = r2;
|
|
<a name="l554"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l555"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l556"></a> res_reg = </span><span class=cF3>REG_RCX</span><span class=cF0>;
|
|
<a name="l557"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, t2, r2, d2, rip);
|
|
<a name="l558"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l559"></a> i = </span><span class=cFD>ICModr1</span><span class=cF0>(res_reg, t3 & </span><span class=cF3>MDG_MASK</span><span class=cF0> + type_pointed_to, r3, d3);
|
|
<a name="l560"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_LOCK</span><span class=cF0>)
|
|
<a name="l561"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cF3>OC_LOCK_PREFIX</span><span class=cF0>);
|
|
<a name="l562"></a> </span><span class=cFD>ICRex</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>1</span><span class=cF0>]);
|
|
<a name="l563"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] << </span><span class=cFE>8</span><span class=cF0> + op.u8[</span><span class=cFE>0</span><span class=cF0>]);
|
|
<a name="l564"></a> </span><span class=cFD>ICModr2</span><span class=cF0>(tmpi, i,, d3, rip);
|
|
<a name="l565"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, t2 & </span><span class=cF3>MDG_MASK</span><span class=cF0> + type_pointed_to, r2, d2, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, res_reg, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l566"></a> done = </span><span class=cF3>TRUE</span><span class=cF0>;
|
|
<a name="l567"></a> }
|
|
<a name="l568"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l569"></a> </span><span class=cF1>if</span><span class=cF0> (!done)
|
|
<a name="l570"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l571"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, t3, r3, d3, rip);
|
|
<a name="l572"></a> </span><span class=cF1>if</span><span class=cF0> (t2 & </span><span class=cF3>MDF_REG</span><span class=cF0> && r2 != </span><span class=cF3>REG_RAX</span><span class=cF0>)
|
|
<a name="l573"></a> res_reg = r2;
|
|
<a name="l574"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l575"></a> {
|
|
<a name="l576"></a> res_reg = </span><span class=cF3>REG_RCX</span><span class=cF0>;
|
|
<a name="l577"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, t2 & </span><span class=cF3>MDG_MASK</span><span class=cF0> + type_pointed_to, r2, d2, rip);
|
|
<a name="l578"></a> }
|
|
<a name="l579"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_LOCK</span><span class=cF0>)
|
|
<a name="l580"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cF3>OC_LOCK_PREFIX</span><span class=cF0>);
|
|
<a name="l581"></a> </span><span class=cF1>if</span><span class=cF0> (res_reg > </span><span class=cFE>7</span><span class=cF0>)
|
|
<a name="l582"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0x4C</span><span class=cF0>);
|
|
<a name="l583"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l584"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0x48</span><span class=cF0>);
|
|
<a name="l585"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0xC000</span><span class=cF0> + op.u8[</span><span class=cFE>0</span><span class=cF0>] + </span><span class=cF7>(</span><span class=cF0>res_reg & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>11</span><span class=cF0>);
|
|
<a name="l586"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, t2 & </span><span class=cF3>MDG_MASK</span><span class=cF0> + type_pointed_to, r2, d2, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, res_reg, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l587"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l588"></a> }
|
|
<a name="l589"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l590"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l591"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l592"></a> done = </span><span class=cF3>FALSE</span><span class=cF0>;
|
|
<a name="l593"></a> </span><span class=cF1>if</span><span class=cF0> (t3 & </span><span class=cF3>MDF_IMM</span><span class=cF0> && op.u8[</span><span class=cFE>2</span><span class=cF0>])
|
|
<a name="l594"></a> {
|
|
<a name="l595"></a> </span><span class=cF1>if</span><span class=cF0> (!d3.u32[</span><span class=cFE>1</span><span class=cF0>])
|
|
<a name="l596"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l597"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_RES_NOT_USED</span><span class=cF0> && t2 & </span><span class=cF3>MDF_REG</span><span class=cF0> && d3</span><span class=cF7>(</span><span class=cF9>U64</span><span class=cF7>)</span><span class=cF0> <= </span><span class=cF3>I8_MAX</span><span class=cF0>)
|
|
<a name="l598"></a> {
|
|
<a name="l599"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + type_pointed_to, r2, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cFE>0x838000</span><span class=cF0> + op.u8[</span><span class=cFE>4</span><span class=cF0>], rip);
|
|
<a name="l600"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, d3);
|
|
<a name="l601"></a> done = </span><span class=cF3>TRUE</span><span class=cF0>;
|
|
<a name="l602"></a> }
|
|
<a name="l603"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (op.u8[</span><span class=cFE>2</span><span class=cF0>] == </span><span class=cFE>0x24</span><span class=cF0>)
|
|
<a name="l604"></a> {</span><span class=cF2>//AND</span><span class=cF0>
|
|
<a name="l605"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, t2, r2, d2, rip);
|
|
<a name="l606"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_DISP</span><span class=cF0> + type_pointed_to, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l607"></a> res_reg = </span><span class=cF3>REG_RAX</span><span class=cF0>;
|
|
<a name="l608"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_LOCK</span><span class=cF0>)
|
|
<a name="l609"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cF3>OC_LOCK_PREFIX</span><span class=cF0>);
|
|
<a name="l610"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, op.u8[</span><span class=cFE>3</span><span class=cF0>] << </span><span class=cFE>8</span><span class=cF0> + </span><span class=cFE>0x40</span><span class=cF0>);
|
|
<a name="l611"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, d3);
|
|
<a name="l612"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + type_pointed_to, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, res_reg, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l613"></a> done = </span><span class=cF3>TRUE</span><span class=cF0>;
|
|
<a name="l614"></a> }
|
|
<a name="l615"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (type_pointed_to < </span><span class=cF3>RT_I64</span><span class=cF0>)
|
|
<a name="l616"></a> {</span><span class=cF2>//OR/XOR</span><span class=cF0>
|
|
<a name="l617"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, t2, r2, d2, rip);
|
|
<a name="l618"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_DISP</span><span class=cF0> + type_pointed_to, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l619"></a> res_reg = </span><span class=cF3>REG_RAX</span><span class=cF0>;
|
|
<a name="l620"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_LOCK</span><span class=cF0>)
|
|
<a name="l621"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cF3>OC_LOCK_PREFIX</span><span class=cF0>);
|
|
<a name="l622"></a> </span><span class=cF1>if</span><span class=cF0> (d3.u16[</span><span class=cFE>1</span><span class=cF0>])
|
|
<a name="l623"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l624"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, op.u8[</span><span class=cFE>3</span><span class=cF0>] << </span><span class=cFE>8</span><span class=cF0> + </span><span class=cFE>0x40</span><span class=cF0>);
|
|
<a name="l625"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, d3);
|
|
<a name="l626"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l627"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (d3.u8[</span><span class=cFE>1</span><span class=cF0>])
|
|
<a name="l628"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l629"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, op.u8[</span><span class=cFE>3</span><span class=cF0>] << </span><span class=cFE>16</span><span class=cF0> + </span><span class=cFE>0x4000</span><span class=cF0> + </span><span class=cF3>OC_OP_SIZE_PREFIX</span><span class=cF0>);
|
|
<a name="l630"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, d3);
|
|
<a name="l631"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l632"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l633"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l634"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, op.u8[</span><span class=cFE>2</span><span class=cF0>] << </span><span class=cFE>8</span><span class=cF0> + </span><span class=cFE>0x40</span><span class=cF0>);
|
|
<a name="l635"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, d3);
|
|
<a name="l636"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l637"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + type_pointed_to, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, res_reg, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l638"></a> done = </span><span class=cF3>TRUE</span><span class=cF0>;
|
|
<a name="l639"></a> }
|
|
<a name="l640"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l641"></a> }
|
|
<a name="l642"></a> </span><span class=cF1>if</span><span class=cF0> (!done)
|
|
<a name="l643"></a> {
|
|
<a name="l644"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, t3, r3, d3, rip);
|
|
<a name="l645"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, t2, r2, d2, rip);
|
|
<a name="l646"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RBX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_DISP</span><span class=cF0> + type_pointed_to, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l647"></a> res_reg = </span><span class=cF3>REG_RBX</span><span class=cF0>;
|
|
<a name="l648"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_LOCK</span><span class=cF0>)
|
|
<a name="l649"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cF3>OC_LOCK_PREFIX</span><span class=cF0>);
|
|
<a name="l650"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0x48</span><span class=cF0>);
|
|
<a name="l651"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0xC000</span><span class=cF0> + op.u8[</span><span class=cFE>0</span><span class=cF0>] + </span><span class=cF7>(</span><span class=cF0>res_reg & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>11</span><span class=cF0>);
|
|
<a name="l652"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + type_pointed_to, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, res_reg, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l653"></a> }
|
|
<a name="l654"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l655"></a> </span><span class=cF1>if</span><span class=cF0> (t1.mode)
|
|
<a name="l656"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, t1, r1, d1, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, res_reg, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l657"></a>}
|
|
<a name="l658"></a>
|
|
<a name="l659"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICShift</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,
|
|
<a name="l660"></a> </span><span class=cF9>CICType</span><span class=cF0> t1, </span><span class=cF9>I64</span><span class=cF0> r1, </span><span class=cF9>I64</span><span class=cF0> d1,
|
|
<a name="l661"></a> </span><span class=cF9>CICType</span><span class=cF0> t2, </span><span class=cF9>I64</span><span class=cF0> r2, </span><span class=cF9>I64</span><span class=cF0> d2,
|
|
<a name="l662"></a> </span><span class=cF9>CICType</span><span class=cF0> t3, </span><span class=cF9>I64</span><span class=cF0> r3, </span><span class=cF9>I64</span><span class=cF0> d3,
|
|
<a name="l663"></a> </span><span class=cF9>I64</span><span class=cF0> us, </span><span class=cF9>I64</span><span class=cF0> is, </span><span class=cF9>I64</span><span class=cF0> rip)
|
|
<a name="l664"></a>{
|
|
<a name="l665"></a> </span><span class=cF9>I64</span><span class=cF0> i = </span><span class=cFE>0x48</span><span class=cF0>, res_reg;
|
|
<a name="l666"></a>
|
|
<a name="l667"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_class->raw_type & </span><span class=cF3>RTF_UNSIGNED</span><span class=cF0> || tmpi->ic_flags & </span><span class=cF3>ICF_USE_UNSIGNED</span><span class=cF0>)
|
|
<a name="l668"></a> is = us;
|
|
<a name="l669"></a> </span><span class=cF1>if</span><span class=cF0> (t1 & </span><span class=cF3>MDF_REG</span><span class=cF0>)
|
|
<a name="l670"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l671"></a> res_reg = r1;
|
|
<a name="l672"></a> </span><span class=cF1>if</span><span class=cF0> (res_reg > </span><span class=cFE>7</span><span class=cF0>)
|
|
<a name="l673"></a> i++;
|
|
<a name="l674"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l675"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l676"></a> res_reg = </span><span class=cF3>REG_RAX</span><span class=cF0>;
|
|
<a name="l677"></a> </span><span class=cF1>if</span><span class=cF0> (t3 & </span><span class=cF3>MDF_IMM</span><span class=cF0>)
|
|
<a name="l678"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l679"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, res_reg, </span><span class=cFE>0</span><span class=cF0>, t2, r2, d2, rip);
|
|
<a name="l680"></a> </span><span class=cF1>if</span><span class=cF0> (d3 == </span><span class=cFE>1</span><span class=cF0>)
|
|
<a name="l681"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, i + is.u16[</span><span class=cFE>2</span><span class=cF0>] << </span><span class=cFE>8</span><span class=cF0> + </span><span class=cF7>(</span><span class=cF0>res_reg & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>16</span><span class=cF0>);
|
|
<a name="l682"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l683"></a> {
|
|
<a name="l684"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, i + is.u16[</span><span class=cFE>0</span><span class=cF0>] << </span><span class=cFE>8</span><span class=cF0> + </span><span class=cF7>(</span><span class=cF0>res_reg & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>16</span><span class=cF0>);
|
|
<a name="l685"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, d3);
|
|
<a name="l686"></a> }
|
|
<a name="l687"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l688"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l689"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l690"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, t3, r3, d3, rip);
|
|
<a name="l691"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, res_reg, </span><span class=cFE>0</span><span class=cF0>, t2, r2, d2, rip);
|
|
<a name="l692"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, i + is.u16[</span><span class=cFE>1</span><span class=cF0>] << </span><span class=cFE>8</span><span class=cF0> + </span><span class=cF7>(</span><span class=cF0>res_reg & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>16</span><span class=cF0>);
|
|
<a name="l693"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l694"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, t1, r1, d1, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, res_reg, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l695"></a>}
|
|
<a name="l696"></a>
|
|
<a name="l697"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICShiftEqu</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF1>U8</span><span class=cF0> type_pointed_to,
|
|
<a name="l698"></a> </span><span class=cF9>CICType</span><span class=cF0> t1, </span><span class=cF9>I64</span><span class=cF0> r1, </span><span class=cF9>I64</span><span class=cF0> d1,
|
|
<a name="l699"></a> </span><span class=cF9>CICType</span><span class=cF0> t2, </span><span class=cF9>I64</span><span class=cF0> r2, </span><span class=cF9>I64</span><span class=cF0> d2,
|
|
<a name="l700"></a> </span><span class=cF9>CICType</span><span class=cF0> t3, </span><span class=cF9>I64</span><span class=cF0> r3, </span><span class=cF9>I64</span><span class=cF0> d3,
|
|
<a name="l701"></a> </span><span class=cF9>I64</span><span class=cF0> us, </span><span class=cF9>I64</span><span class=cF0> is, </span><span class=cF9>I64</span><span class=cF0> rip)
|
|
<a name="l702"></a>{
|
|
<a name="l703"></a> </span><span class=cF9>I64</span><span class=cF0> res_reg;
|
|
<a name="l704"></a>
|
|
<a name="l705"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_class->raw_type & </span><span class=cF3>RTF_UNSIGNED</span><span class=cF0> || tmpi->ic_flags & </span><span class=cF3>ICF_USE_UNSIGNED</span><span class=cF0>)
|
|
<a name="l706"></a> is = us;
|
|
<a name="l707"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_BY_VAL</span><span class=cF0>)
|
|
<a name="l708"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l709"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>t3 & </span><span class=cF3>MDF_IMM</span><span class=cF7>)</span><span class=cF0>)
|
|
<a name="l710"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, t3, r3, d3, rip);
|
|
<a name="l711"></a> </span><span class=cF1>if</span><span class=cF0> (t2 & </span><span class=cF3>MDF_REG</span><span class=cF0>)
|
|
<a name="l712"></a> res_reg = r2;
|
|
<a name="l713"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l714"></a> {
|
|
<a name="l715"></a> res_reg = </span><span class=cF3>REG_RAX</span><span class=cF0>;
|
|
<a name="l716"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, t2 & </span><span class=cF3>MDG_MASK</span><span class=cF0> + type_pointed_to, r2, d2, rip);
|
|
<a name="l717"></a> }
|
|
<a name="l718"></a> </span><span class=cF1>if</span><span class=cF0> (res_reg > </span><span class=cFE>7</span><span class=cF0>)
|
|
<a name="l719"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0x49</span><span class=cF0>);
|
|
<a name="l720"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l721"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0x48</span><span class=cF0>);
|
|
<a name="l722"></a> </span><span class=cF1>if</span><span class=cF0> (t3 & </span><span class=cF3>MDF_IMM</span><span class=cF0>)
|
|
<a name="l723"></a> {
|
|
<a name="l724"></a> </span><span class=cF1>if</span><span class=cF0> (d3 == </span><span class=cFE>1</span><span class=cF0>)
|
|
<a name="l725"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, is.u16[</span><span class=cFE>2</span><span class=cF0>] + </span><span class=cF7>(</span><span class=cF0>res_reg & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>8</span><span class=cF0>);
|
|
<a name="l726"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l727"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l728"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, is.u16[</span><span class=cFE>0</span><span class=cF0>] + </span><span class=cF7>(</span><span class=cF0>res_reg & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>8</span><span class=cF0>);
|
|
<a name="l729"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, d3);
|
|
<a name="l730"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l731"></a> }
|
|
<a name="l732"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l733"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, is.u16[</span><span class=cFE>1</span><span class=cF0>] + </span><span class=cF7>(</span><span class=cF0>res_reg & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>8</span><span class=cF0>);
|
|
<a name="l734"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, t2 & </span><span class=cF3>MDG_MASK</span><span class=cF0> + type_pointed_to, r2, d2, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, res_reg, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l735"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l736"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l737"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l738"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>t3 & </span><span class=cF3>MDF_IMM</span><span class=cF7>)</span><span class=cF0>)
|
|
<a name="l739"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, t3, r3, d3, rip);
|
|
<a name="l740"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, t2, r2, d2, rip);
|
|
<a name="l741"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_DISP</span><span class=cF0> + type_pointed_to, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l742"></a> res_reg = </span><span class=cF3>REG_RAX</span><span class=cF0>;
|
|
<a name="l743"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0x48</span><span class=cF0>);
|
|
<a name="l744"></a> </span><span class=cF1>if</span><span class=cF0> (t3 & </span><span class=cF3>MDF_IMM</span><span class=cF0>)
|
|
<a name="l745"></a> {
|
|
<a name="l746"></a> </span><span class=cF1>if</span><span class=cF0> (d3 == </span><span class=cFE>1</span><span class=cF0>)
|
|
<a name="l747"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, is.u16[</span><span class=cFE>2</span><span class=cF0>] + </span><span class=cF7>(</span><span class=cF0>res_reg & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>8</span><span class=cF0>);
|
|
<a name="l748"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l749"></a> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l750"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, is.u16[</span><span class=cFE>0</span><span class=cF0>] + </span><span class=cF7>(</span><span class=cF0>res_reg & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>8</span><span class=cF0>);
|
|
<a name="l751"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, d3);
|
|
<a name="l752"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l753"></a> }
|
|
<a name="l754"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l755"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, is.u16[</span><span class=cFE>1</span><span class=cF0>] + </span><span class=cF7>(</span><span class=cF0>res_reg & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>8</span><span class=cF0>);
|
|
<a name="l756"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + type_pointed_to, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, res_reg, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l757"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l758"></a> </span><span class=cF1>if</span><span class=cF0> (t1.mode)
|
|
<a name="l759"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, t1, r1, d1, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, res_reg, </span><span class=cFE>0</span><span class=cF0>, rip);
|
|
<a name="l760"></a>}
|
|
</span></pre></body>
|
|
</html>
|