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<a name="l1"></a><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICAndBranch</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip, </span><span class=cF9>I64</span><span class=cF0> is, </span><span class=cF1>U8</span><span class=cF0> *buf, </span><span class=cF9>I64</span><span class=cF0> rip2)
<a name="l2"></a>{
<a name="l3"></a> </span><span class=cF9>U64</span><span class=cF0> i;
<a name="l4"></a> </span><span class=cF9>I64</span><span class=cF0> it, t1, r1, d1, r2;
<a name="l5"></a> </span><span class=cF1>Bool</span><span class=cF0> short_jmp, swap, override;
<a name="l6"></a> </span><span class=cF9>CCodeMisc</span><span class=cF0> *lb;
<a name="l7"></a> </span><span class=cF9>CICArg</span><span class=cF0> *arg1, *arg2;
<a name="l8"></a>
<a name="l9"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg1.type & </span><span class=cF3>MDF_IMM</span><span class=cF0>)
<a name="l10"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l11"></a> swap = </span><span class=cF3>TRUE</span><span class=cF0>;
<a name="l12"></a> arg1 = &tmpi->arg2;
<a name="l13"></a> arg2 = &tmpi->arg1;
<a name="l14"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l15"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l16"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l17"></a> swap = </span><span class=cF3>FALSE</span><span class=cF0>;
<a name="l18"></a> arg1 = &tmpi->arg1;
<a name="l19"></a> arg2 = &tmpi->arg2;
<a name="l20"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l21"></a>
<a name="l22"></a> </span><span class=cF1>if</span><span class=cF0> (arg2->type & </span><span class=cF3>MDF_IMM</span><span class=cF0> && arg2->disp > </span><span class=cF3>U32_MAX</span><span class=cF0>)
<a name="l23"></a> override = </span><span class=cF3>TRUE</span><span class=cF0>;
<a name="l24"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l25"></a> override = </span><span class=cF3>FALSE</span><span class=cF0>;
<a name="l26"></a>
<a name="l27"></a> </span><span class=cF1>if</span><span class=cF0> (arg1->type.raw_type < arg2->type.raw_type)
<a name="l28"></a> it = arg1->type.raw_type;
<a name="l29"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l30"></a> it = arg2->type.raw_type;
<a name="l31"></a>
<a name="l32"></a> i = arg2->disp;
<a name="l33"></a> </span><span class=cF1>if</span><span class=cF0> (arg2->type & </span><span class=cF3>MDF_IMM</span><span class=cF0> && i <= </span><span class=cF3>U32_MAX</span><span class=cF0>)
<a name="l34"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l35"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, arg1->type, arg1-></span><span class=cF1>reg</span><span class=cF0>, arg1->disp, rip2);
<a name="l36"></a> </span><span class=cF1>if</span><span class=cF0> (i <= </span><span class=cF3>U8_MAX</span><span class=cF0>)
<a name="l37"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, i << </span><span class=cFE>8</span><span class=cF0> + </span><span class=cFE>0xA8</span><span class=cF0>);
<a name="l38"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (i <= </span><span class=cF3>U16_MAX</span><span class=cF0>)
<a name="l39"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, i << </span><span class=cFE>16</span><span class=cF0> + </span><span class=cFE>0xA900</span><span class=cF0> + </span><span class=cF3>OC_OP_SIZE_PREFIX</span><span class=cF0>);
<a name="l40"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l41"></a> {
<a name="l42"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0xA9</span><span class=cF0>);
<a name="l43"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, i);
<a name="l44"></a> }
<a name="l45"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l46"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l47"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l48"></a> t1 = </span><span class=cF3>MDF_REG</span><span class=cF0> + it;
<a name="l49"></a> d1 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l50"></a> </span><span class=cF1>if</span><span class=cF0> (swap && !override)
<a name="l51"></a> {
<a name="l52"></a> </span><span class=cF1>if</span><span class=cF0> (arg1->type & </span><span class=cF3>MDF_REG</span><span class=cF0>)
<a name="l53"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l54"></a> r1 = arg1-></span><span class=cF1>reg</span><span class=cF0>;
<a name="l55"></a> swap = </span><span class=cF3>TRUE</span><span class=cF0>;
<a name="l56"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l57"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l58"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l59"></a> r1 = </span><span class=cF3>REG_RCX</span><span class=cF0>;
<a name="l60"></a> swap = </span><span class=cF3>FALSE</span><span class=cF0>;
<a name="l61"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l62"></a> </span><span class=cF1>if</span><span class=cF0> (arg2->type & </span><span class=cF3>MDF_REG</span><span class=cF0>)
<a name="l63"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l64"></a> r2 = arg2-></span><span class=cF1>reg</span><span class=cF0>;
<a name="l65"></a> swap = </span><span class=cF3>FALSE</span><span class=cF0>;
<a name="l66"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l67"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l68"></a> r2 = </span><span class=cF3>REG_RDX</span><span class=cF0>;
<a name="l69"></a> </span><span class=cF1>if</span><span class=cF0> (swap)
<a name="l70"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l71"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>arg1->type & </span><span class=cF3>MDF_REG</span><span class=cF7>)</span><span class=cF0> || r1 != arg1-></span><span class=cF1>reg</span><span class=cF0>)
<a name="l72"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r1, </span><span class=cFE>0</span><span class=cF0>, arg1->type, arg1-></span><span class=cF1>reg</span><span class=cF0>, arg1->disp, rip2);
<a name="l73"></a> </span><span class=cF1>if</span><span class=cF0> (arg2->type & </span><span class=cF3>MDG_REG_DISP_SIB_RIP</span><span class=cF0>)
<a name="l74"></a> {
<a name="l75"></a> t1 = arg2->type & </span><span class=cF3>MDG_MASK</span><span class=cF0> + it;
<a name="l76"></a> r2 = arg2-></span><span class=cF1>reg</span><span class=cF0>;
<a name="l77"></a> d1 = arg2->disp;
<a name="l78"></a> }
<a name="l79"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l80"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r2, </span><span class=cFE>0</span><span class=cF0>, arg2->type, arg2-></span><span class=cF1>reg</span><span class=cF0>, arg2->disp, rip2);
<a name="l81"></a> i = </span><span class=cFD>ICModr1</span><span class=cF0>(r1, t1, r2, d1);
<a name="l82"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l83"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l84"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l85"></a> </span><span class=cF1>if</span><span class=cF0> (arg1->type & </span><span class=cF3>MDG_REG_DISP_SIB_RIP</span><span class=cF0>)
<a name="l86"></a> {
<a name="l87"></a> t1 = arg1->type & </span><span class=cF3>MDG_MASK</span><span class=cF0> + it;
<a name="l88"></a> r1 = arg1-></span><span class=cF1>reg</span><span class=cF0>;
<a name="l89"></a> d1 = arg1->disp;
<a name="l90"></a> }
<a name="l91"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l92"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r1, </span><span class=cFE>0</span><span class=cF0>, arg1->type, arg1-></span><span class=cF1>reg</span><span class=cF0>, arg1->disp, rip2);
<a name="l93"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>arg2->type & </span><span class=cF3>MDF_REG</span><span class=cF7>)</span><span class=cF0> || r2 != arg2-></span><span class=cF1>reg</span><span class=cF0>)
<a name="l94"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r2, </span><span class=cFE>0</span><span class=cF0>, arg2->type, arg2-></span><span class=cF1>reg</span><span class=cF0>, arg2->disp, rip2);
<a name="l95"></a> i = </span><span class=cFD>ICModr1</span><span class=cF0>(r2, t1, r1, d1);
<a name="l96"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l97"></a> }
<a name="l98"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l99"></a> {
<a name="l100"></a> </span><span class=cF1>if</span><span class=cF0> (arg2->type & </span><span class=cF3>MDF_REG</span><span class=cF0>)
<a name="l101"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l102"></a> r2 = arg2-></span><span class=cF1>reg</span><span class=cF0>;
<a name="l103"></a> swap = </span><span class=cF3>FALSE</span><span class=cF0>;
<a name="l104"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l105"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l106"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l107"></a> r2 = </span><span class=cF3>REG_RDX</span><span class=cF0>;
<a name="l108"></a> swap = </span><span class=cF3>TRUE</span><span class=cF0>;
<a name="l109"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l110"></a> </span><span class=cF1>if</span><span class=cF0> (arg1->type & </span><span class=cF3>MDF_REG</span><span class=cF0>)
<a name="l111"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l112"></a> r1 = arg1-></span><span class=cF1>reg</span><span class=cF0>;
<a name="l113"></a> swap = </span><span class=cF3>TRUE</span><span class=cF0>;
<a name="l114"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l115"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l116"></a> r1 = </span><span class=cF3>REG_RCX</span><span class=cF0>;
<a name="l117"></a> </span><span class=cF1>if</span><span class=cF0> (override)
<a name="l118"></a> swap = </span><span class=cF3>FALSE</span><span class=cF0>;
<a name="l119"></a> </span><span class=cF1>if</span><span class=cF0> (swap)
<a name="l120"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l121"></a> </span><span class=cF1>if</span><span class=cF0> (arg2->type & </span><span class=cF3>MDG_REG_DISP_SIB_RIP</span><span class=cF0>)
<a name="l122"></a> {
<a name="l123"></a> t1 = arg2->type & </span><span class=cF3>MDG_MASK</span><span class=cF0> + it;
<a name="l124"></a> r2 = arg2-></span><span class=cF1>reg</span><span class=cF0>;
<a name="l125"></a> d1 = arg2->disp;
<a name="l126"></a> }
<a name="l127"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l128"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r2, </span><span class=cFE>0</span><span class=cF0>, arg2->type, arg2-></span><span class=cF1>reg</span><span class=cF0>, arg2->disp, rip2);
<a name="l129"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>arg1->type & </span><span class=cF3>MDF_REG</span><span class=cF7>)</span><span class=cF0> || r1 != arg1-></span><span class=cF1>reg</span><span class=cF0>)
<a name="l130"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r1, </span><span class=cFE>0</span><span class=cF0>, arg1->type, arg1-></span><span class=cF1>reg</span><span class=cF0>, arg1->disp, rip2);
<a name="l131"></a> i = </span><span class=cFD>ICModr1</span><span class=cF0>(r1, t1, r2, d1);
<a name="l132"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l133"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l134"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l135"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>arg2->type & </span><span class=cF3>MDF_REG</span><span class=cF7>)</span><span class=cF0> || r2 != arg2-></span><span class=cF1>reg</span><span class=cF0>)
<a name="l136"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r2, </span><span class=cFE>0</span><span class=cF0>, arg2->type, arg2-></span><span class=cF1>reg</span><span class=cF0>, arg2->disp, rip2);
<a name="l137"></a> </span><span class=cF1>if</span><span class=cF0> (arg1->type & </span><span class=cF3>MDG_REG_DISP_SIB_RIP</span><span class=cF0>)
<a name="l138"></a> {
<a name="l139"></a> t1 = arg1->type & </span><span class=cF3>MDG_MASK</span><span class=cF0> + it;
<a name="l140"></a> r1 = arg1-></span><span class=cF1>reg</span><span class=cF0>;
<a name="l141"></a> d1 = arg1->disp;
<a name="l142"></a> }
<a name="l143"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l144"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r1, </span><span class=cFE>0</span><span class=cF0>, arg1->type, arg1-></span><span class=cF1>reg</span><span class=cF0>, arg1->disp, rip2);
<a name="l145"></a> i = </span><span class=cFD>ICModr1</span><span class=cF0>(r2, t1, r1, d1);
<a name="l146"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l147"></a> }
<a name="l148"></a> </span><span class=cF1>switch</span><span class=cF0> (it)
<a name="l149"></a> {
<a name="l150"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_I8</span><span class=cF0>:
<a name="l151"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_U8</span><span class=cF0>:
<a name="l152"></a> </span><span class=cFD>ICRex</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>1</span><span class=cF0>]);
<a name="l153"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] << </span><span class=cFE>8</span><span class=cF0> + </span><span class=cFE>0x84</span><span class=cF0>);
<a name="l154"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l155"></a>
<a name="l156"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_U16</span><span class=cF0>:
<a name="l157"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_I16</span><span class=cF0>:
<a name="l158"></a> </span><span class=cFD>ICOpSizeRex</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>1</span><span class=cF0>]);
<a name="l159"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] << </span><span class=cFE>8</span><span class=cF0> + </span><span class=cFE>0x85</span><span class=cF0>);
<a name="l160"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l161"></a>
<a name="l162"></a> </span><span class=cF1>default</span><span class=cF0>:
<a name="l163"></a> </span><span class=cFD>ICRex</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>1</span><span class=cF0>]);
<a name="l164"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] << </span><span class=cFE>8</span><span class=cF0> + </span><span class=cFE>0x85</span><span class=cF0>);
<a name="l165"></a> }
<a name="l166"></a> </span><span class=cFD>ICModr2</span><span class=cF0>(tmpi, i,, d1, rip2);
<a name="l167"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l168"></a>
<a name="l169"></a> rip += tmpi->ic_count;
<a name="l170"></a> lb = </span><span class=cFD>OptLabelFwd</span><span class=cF0>(tmpi->ic_data);
<a name="l171"></a> short_jmp = </span><span class=cF5>ToBool</span><span class=cF0>(tmpi->ic_flags & </span><span class=cF3>ICF_SHORT_JMP</span><span class=cF0>);
<a name="l172"></a> </span><span class=cF1>if</span><span class=cF0> (!buf && lb->addr != </span><span class=cF3>INVALID_PTR</span><span class=cF0>)
<a name="l173"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l174"></a> i = lb->addr - (rip + </span><span class=cFE>2</span><span class=cF0>);
<a name="l175"></a> </span><span class=cF1>if</span><span class=cF0> (lb->flags & </span><span class=cF3>CMF_POP_CMP</span><span class=cF0>)
<a name="l176"></a> i += </span><span class=cFE>8</span><span class=cF0>;
<a name="l177"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0> <= i <= </span><span class=cF3>I8_MAX</span><span class=cF0>)
<a name="l178"></a> short_jmp = </span><span class=cF3>TRUE</span><span class=cF0>;
<a name="l179"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l180"></a>
<a name="l181"></a> </span><span class=cF1>if</span><span class=cF0> (short_jmp)
<a name="l182"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l183"></a> tmpi->ic_flags |= </span><span class=cF3>ICF_SHORT_JMP</span><span class=cF0>;
<a name="l184"></a> i = lb->addr - (rip + </span><span class=cFE>2</span><span class=cF0>);
<a name="l185"></a> </span><span class=cF1>if</span><span class=cF0> (lb->flags & </span><span class=cF3>CMF_POP_CMP</span><span class=cF0>)
<a name="l186"></a> i += </span><span class=cFE>8</span><span class=cF0>;
<a name="l187"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, i << </span><span class=cFE>8</span><span class=cF0> + is.u8[</span><span class=cFE>2</span><span class=cF0>]);
<a name="l188"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l189"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l190"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l191"></a> tmpi->ic_flags &= ~</span><span class=cF3>ICF_SHORT_JMP</span><span class=cF0>;
<a name="l192"></a> i = lb->addr - (rip + </span><span class=cFE>6</span><span class=cF0>);
<a name="l193"></a> </span><span class=cF1>if</span><span class=cF0> (lb->flags & </span><span class=cF3>CMF_POP_CMP</span><span class=cF0>)
<a name="l194"></a> i += </span><span class=cFE>8</span><span class=cF0>;
<a name="l195"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, is.u16[</span><span class=cFE>0</span><span class=cF0>]);
<a name="l196"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, i);
<a name="l197"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l198"></a>}
<a name="l199"></a>
<a name="l200"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICAssign</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l201"></a>{
<a name="l202"></a> </span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi1;
<a name="l203"></a>
<a name="l204"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_BY_VAL</span><span class=cF0>)
<a name="l205"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l206"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi->arg1.type & </span><span class=cF3>MDG_MASK</span><span class=cF0> + tmpi->arg1_type_pointed_to, tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp,
<a name="l207"></a> tmpi->arg2.type, tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg2.disp, rip);
<a name="l208"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->res.type.mode)
<a name="l209"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi->res.type & </span><span class=cF3>MDG_MASK</span><span class=cF0> + tmpi->arg1_type_pointed_to, tmpi->res.</span><span class=cF1>reg</span><span class=cF0>, tmpi->res.disp,
<a name="l210"></a> tmpi->arg1.type & </span><span class=cF3>MDG_MASK</span><span class=cF0> + tmpi->arg1_type_pointed_to, tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, rip);
<a name="l211"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l212"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l213"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l214"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg1.type & </span><span class=cF3>MDF_REG</span><span class=cF0>)
<a name="l215"></a> {
<a name="l216"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>tmpi1 = </span><span class=cFD>OptLag1</span><span class=cF0>(tmpi)</span><span class=cF7>)</span><span class=cF0> || tmpi1->ic_code != </span><span class=cF3>IC_ADD_CONST</span><span class=cF0> ||
<a name="l217"></a> tmpi1->res.type != </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0> || tmpi1->res.</span><span class=cF1>reg</span><span class=cF0> != tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0> ||
<a name="l218"></a> tmpi1->arg1.type != </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0> ||
<a name="l219"></a> tmpi1->arg1.</span><span class=cF1>reg</span><span class=cF0> != tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0> ||
<a name="l220"></a> </span><span class=cF7>(</span><span class=cF0>tmpi->arg2.type & </span><span class=cF3>MDF_REG</span><span class=cF0> || tmpi->arg2.type & </span><span class=cF3>MDF_DISP</span><span class=cF7>)</span><span class=cF0> &&
<a name="l221"></a> tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0> == tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0> ||
<a name="l222"></a> tmpi->res.type.mode || tmpi1->ic_flags & ~</span><span class=cF3>ICG_NO_CONVERT_MASK</span><span class=cF0>)
<a name="l223"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l224"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + tmpi->arg1_type_pointed_to, tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp,
<a name="l225"></a> tmpi->arg2.type, tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg2.disp, rip);
<a name="l226"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->res.type.mode)
<a name="l227"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi->res.type, tmpi->res.</span><span class=cF1>reg</span><span class=cF0>, tmpi->res.disp,
<a name="l228"></a> tmpi->arg2.type, tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg2.disp, rip);
<a name="l229"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l230"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l231"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l232"></a> tmpi->ic_flags = (tmpi->ic_flags | tmpi1->ic_flags) & ~</span><span class=cF3>ICF_CODE_FINAL</span><span class=cF0> | </span><span class=cF3>ICF_DONT_RESTORE</span><span class=cF0>;
<a name="l233"></a> tmpi->arg1.disp = tmpi1->ic_data;
<a name="l234"></a> </span><span class=cFD>OptSetNOP1</span><span class=cF0>(tmpi1); </span><span class=cF2>//This better not be last pass!</span><span class=cF0>
<a name="l235"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + tmpi->arg1_type_pointed_to, tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp,
<a name="l236"></a> tmpi->arg2.type, tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg2.disp, rip);
<a name="l237"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l238"></a> }
<a name="l239"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l240"></a> {
<a name="l241"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg1.type, tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, rip);
<a name="l242"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + tmpi->arg1_type_pointed_to, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>,
<a name="l243"></a> tmpi->arg2.type, tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg2.disp, rip);
<a name="l244"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->res.type.mode)
<a name="l245"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi->res.type, tmpi->res.</span><span class=cF1>reg</span><span class=cF0>, tmpi->res.disp,
<a name="l246"></a> tmpi->arg2.type, tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg2.disp, rip);
<a name="l247"></a> }
<a name="l248"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l249"></a>}
<a name="l250"></a>
<a name="l251"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICBrBitOps</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip, </span><span class=cF9>I64</span><span class=cF0> op, </span><span class=cF9>I64</span><span class=cF0> op_imm, </span><span class=cF9>I64</span><span class=cF0> is, </span><span class=cF1>U8</span><span class=cF0> *buf, </span><span class=cF9>I64</span><span class=cF0> rip2)
<a name="l252"></a>{
<a name="l253"></a> </span><span class=cF9>I64</span><span class=cF0> i, t, r1, r2, d1, d2, t1, t2;
<a name="l254"></a> </span><span class=cF9>CICArg</span><span class=cF0> *arg1 = &tmpi->arg1, *arg2 = &tmpi->arg2;
<a name="l255"></a> </span><span class=cF1>Bool</span><span class=cF0> short_jmp;
<a name="l256"></a> </span><span class=cF9>CCodeMisc</span><span class=cF0> *lb;
<a name="l257"></a>
<a name="l258"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_BY_VAL</span><span class=cF0>)
<a name="l259"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l260"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_SWAP</span><span class=cF0> && !</span><span class=cF7>(</span><span class=cF0>arg2->type & </span><span class=cF3>MDF_REG</span><span class=cF7>)</span><span class=cF0> &&
<a name="l261"></a> </span><span class=cF7>(</span><span class=cF0>!(arg2->type & </span><span class=cF3>MDF_IMM</span><span class=cF0>) || arg2->disp > </span><span class=cFE>63</span><span class=cF7>)</span><span class=cF0> ||
<a name="l262"></a> !</span><span class=cF7>(</span><span class=cF0>tmpi->ic_flags & </span><span class=cF3>ICF_SWAP</span><span class=cF7>)</span><span class=cF0> && arg2->type & </span><span class=cF3>MDF_IMM</span><span class=cF0> &&
<a name="l263"></a> arg2->disp < </span><span class=cFE>64</span><span class=cF0> || arg2->type & </span><span class=cF3>MDF_STACK</span><span class=cF0>)
<a name="l264"></a> {
<a name="l265"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, arg2->type, arg2-></span><span class=cF1>reg</span><span class=cF0>, arg2->disp, rip2);
<a name="l266"></a> t2 = </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l267"></a> r2 = </span><span class=cF3>REG_RCX</span><span class=cF0>;
<a name="l268"></a> d2 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l269"></a> }
<a name="l270"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l271"></a> {
<a name="l272"></a> t2 = arg2->type;
<a name="l273"></a> </span><span class=cF1>if</span><span class=cF0> (t2 & </span><span class=cF3>MDF_IMM</span><span class=cF0> && arg2->disp < </span><span class=cFE>64</span><span class=cF0>)
<a name="l274"></a> r2 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l275"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l276"></a> r2 = arg2-></span><span class=cF1>reg</span><span class=cF0>;
<a name="l277"></a> d2 = arg2->disp;
<a name="l278"></a> }
<a name="l279"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>tmpi->ic_flags & </span><span class=cF3>ICF_SWAP</span><span class=cF7>)</span><span class=cF0> && !</span><span class=cF7>(</span><span class=cF0>arg1->type & </span><span class=cF3>MDF_REG</span><span class=cF7>)</span><span class=cF0> &&
<a name="l280"></a> </span><span class=cF7>(</span><span class=cF0>!(arg1->type & </span><span class=cF3>MDF_IMM</span><span class=cF0>) || arg1->disp > </span><span class=cFE>63</span><span class=cF7>)</span><span class=cF0> ||
<a name="l281"></a> tmpi->ic_flags & </span><span class=cF3>ICF_SWAP</span><span class=cF0> && arg1->type & </span><span class=cF3>MDF_IMM</span><span class=cF0> &&
<a name="l282"></a> arg1->disp < </span><span class=cFE>64</span><span class=cF0> || arg1->type & </span><span class=cF3>MDF_STACK</span><span class=cF0>)
<a name="l283"></a> {
<a name="l284"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, arg1->type, arg1-></span><span class=cF1>reg</span><span class=cF0>, arg1->disp, rip2);
<a name="l285"></a> t1 = </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l286"></a> r1 = </span><span class=cF3>REG_RDX</span><span class=cF0>;
<a name="l287"></a> d1 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l288"></a> }
<a name="l289"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l290"></a> {
<a name="l291"></a> t1 = arg1->type;
<a name="l292"></a> </span><span class=cF1>if</span><span class=cF0> (t1 & </span><span class=cF3>MDF_IMM</span><span class=cF0> && arg1->disp < </span><span class=cFE>64</span><span class=cF0>)
<a name="l293"></a> r1 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l294"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l295"></a> r1 = arg1-></span><span class=cF1>reg</span><span class=cF0>;
<a name="l296"></a> d1 = arg1->disp;
<a name="l297"></a> }
<a name="l298"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l299"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l300"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l301"></a> t1 = </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l302"></a> t2 = </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l303"></a> d1 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l304"></a> d2 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l305"></a> </span><span class=cF1>if</span><span class=cF0> (arg2->type & </span><span class=cF3>MDF_REG</span><span class=cF0>)
<a name="l306"></a> r2 = arg2-></span><span class=cF1>reg</span><span class=cF0>;
<a name="l307"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>tmpi->ic_flags & </span><span class=cF3>ICF_SWAP</span><span class=cF7>)</span><span class=cF0> || !</span><span class=cF7>(</span><span class=cF0>arg2->type & </span><span class=cF3>MDF_IMM</span><span class=cF7>)</span><span class=cF0> || arg2->disp > </span><span class=cFE>63</span><span class=cF0>)
<a name="l308"></a> {
<a name="l309"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, arg2->type, arg2-></span><span class=cF1>reg</span><span class=cF0>, arg2->disp, rip2);
<a name="l310"></a> r2 = </span><span class=cF3>REG_RCX</span><span class=cF0>;
<a name="l311"></a> }
<a name="l312"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l313"></a> r2 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l314"></a> </span><span class=cF1>if</span><span class=cF0> (arg1->type & </span><span class=cF3>MDF_REG</span><span class=cF0>)
<a name="l315"></a> r1 = arg1-></span><span class=cF1>reg</span><span class=cF0>;
<a name="l316"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_SWAP</span><span class=cF0> || !</span><span class=cF7>(</span><span class=cF0>arg1->type & </span><span class=cF3>MDF_IMM</span><span class=cF7>)</span><span class=cF0> || arg1->disp > </span><span class=cFE>63</span><span class=cF0>)
<a name="l317"></a> {
<a name="l318"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, arg1->type, arg1-></span><span class=cF1>reg</span><span class=cF0>, arg1->disp, rip2);
<a name="l319"></a> r1 = </span><span class=cF3>REG_RDX</span><span class=cF0>;
<a name="l320"></a> }
<a name="l321"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l322"></a> r1 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l323"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l324"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_LOCK</span><span class=cF0> && op != </span><span class=cFE>0xA30F</span><span class=cF0>)
<a name="l325"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cF3>OC_LOCK_PREFIX</span><span class=cF0>);
<a name="l326"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_SWAP</span><span class=cF0>)
<a name="l327"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l328"></a> </span><span class=cF1>if</span><span class=cF0> (arg2->type & </span><span class=cF3>MDF_IMM</span><span class=cF0> && arg2->disp < </span><span class=cFE>32</span><span class=cF0>)
<a name="l329"></a> {
<a name="l330"></a> </span><span class=cF1>if</span><span class=cF0> (op == </span><span class=cFE>0xA30F</span><span class=cF0> && arg2->disp < </span><span class=cFE>8</span><span class=cF0>)
<a name="l331"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l332"></a> t = t1 & </span><span class=cF3>MDG_MASK</span><span class=cF0>+</span><span class=cF3>RT_U8</span><span class=cF0>;
<a name="l333"></a> op_imm = </span><span class=cFE>0xF6</span><span class=cF0>; </span><span class=cF2>//TEST</span><span class=cF0>
<a name="l334"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l335"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l336"></a> t = t1 & </span><span class=cF3>MDG_MASK</span><span class=cF0> + </span><span class=cF3>RT_U32</span><span class=cF0>;
<a name="l337"></a> }
<a name="l338"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l339"></a> t = t1;
<a name="l340"></a> i = </span><span class=cFD>ICModr1</span><span class=cF0>(r2, t, r1, d1);
<a name="l341"></a> </span><span class=cF5>SwapI64</span><span class=cF0>(&arg1, &arg2);
<a name="l342"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l343"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l344"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l345"></a> </span><span class=cF1>if</span><span class=cF0> (arg1->type & </span><span class=cF3>MDF_IMM</span><span class=cF0> && arg1->disp < </span><span class=cFE>32</span><span class=cF0>)
<a name="l346"></a> {
<a name="l347"></a> </span><span class=cF1>if</span><span class=cF0> (op == </span><span class=cFE>0xA30F</span><span class=cF0> && arg1->disp < </span><span class=cFE>8</span><span class=cF0>)
<a name="l348"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l349"></a> t = t2 & </span><span class=cF3>MDG_MASK</span><span class=cF0> + </span><span class=cF3>RT_U8</span><span class=cF0>;
<a name="l350"></a> op_imm = </span><span class=cFE>0xF6</span><span class=cF0>; </span><span class=cF2>//TEST</span><span class=cF0>
<a name="l351"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l352"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l353"></a> t = t2 & </span><span class=cF3>MDG_MASK</span><span class=cF0> + </span><span class=cF3>RT_U32</span><span class=cF0>;
<a name="l354"></a> }
<a name="l355"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l356"></a> t = t2;
<a name="l357"></a> i = </span><span class=cFD>ICModr1</span><span class=cF0>(r1, t, r2, d2);
<a name="l358"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l359"></a> </span><span class=cFD>ICRex</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>1</span><span class=cF0>]);
<a name="l360"></a> </span><span class=cF1>if</span><span class=cF0> (op_imm == </span><span class=cFE>0xF6</span><span class=cF0>)
<a name="l361"></a> </span><span class=cF7>{</span><span class=cF2>//TEST</span><span class=cF0>
<a name="l362"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] << </span><span class=cFE>8</span><span class=cF0> + op_imm);
<a name="l363"></a> </span><span class=cFD>ICModr2</span><span class=cF0>(tmpi, i,, arg2->disp, rip2 + </span><span class=cFE>1</span><span class=cF0>);
<a name="l364"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>1</span><span class=cF0> << arg1->disp);
<a name="l365"></a> </span><span class=cF1>if</span><span class=cF0> (is == </span><span class=cFE>0x72820F</span><span class=cF0>)
<a name="l366"></a> is = </span><span class=cFE>0x75850F</span><span class=cF0>;
<a name="l367"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l368"></a> is = </span><span class=cFE>0x74840F</span><span class=cF0>;
<a name="l369"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l370"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (arg1->type & </span><span class=cF3>MDF_IMM</span><span class=cF0> && arg1->disp < </span><span class=cFE>64</span><span class=cF0>)
<a name="l371"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l372"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] << </span><span class=cFE>16</span><span class=cF0> + op_imm);
<a name="l373"></a> </span><span class=cFD>ICModr2</span><span class=cF0>(tmpi, i,, arg2->disp, rip2 + </span><span class=cFE>1</span><span class=cF0>);
<a name="l374"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, arg1->disp);
<a name="l375"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l376"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l377"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l378"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] << </span><span class=cFE>16</span><span class=cF0> + op);
<a name="l379"></a> </span><span class=cFD>ICModr2</span><span class=cF0>(tmpi, i,, arg2->disp, rip2);
<a name="l380"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l381"></a>
<a name="l382"></a> rip += tmpi->ic_count;
<a name="l383"></a> lb = </span><span class=cFD>OptLabelFwd</span><span class=cF0>(tmpi->ic_data);
<a name="l384"></a> short_jmp = </span><span class=cF5>ToBool</span><span class=cF0>(tmpi->ic_flags & </span><span class=cF3>ICF_SHORT_JMP</span><span class=cF0>);
<a name="l385"></a> </span><span class=cF1>if</span><span class=cF0> (!buf && lb->addr != </span><span class=cF3>INVALID_PTR</span><span class=cF0>)
<a name="l386"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l387"></a> i = lb->addr - (rip + </span><span class=cFE>2</span><span class=cF0>);
<a name="l388"></a> </span><span class=cF1>if</span><span class=cF0> (lb->flags & </span><span class=cF3>CMF_POP_CMP</span><span class=cF0>)
<a name="l389"></a> i += </span><span class=cFE>8</span><span class=cF0>;
<a name="l390"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0> <= i <= </span><span class=cF3>I8_MAX</span><span class=cF0>)
<a name="l391"></a> short_jmp = </span><span class=cF3>TRUE</span><span class=cF0>;
<a name="l392"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l393"></a>
<a name="l394"></a> </span><span class=cF1>if</span><span class=cF0> (short_jmp)
<a name="l395"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l396"></a> tmpi->ic_flags |= </span><span class=cF3>ICF_SHORT_JMP</span><span class=cF0>;
<a name="l397"></a> i = lb->addr - (rip + </span><span class=cFE>2</span><span class=cF0>);
<a name="l398"></a> </span><span class=cF1>if</span><span class=cF0> (lb->flags & </span><span class=cF3>CMF_POP_CMP</span><span class=cF0>)
<a name="l399"></a> i += </span><span class=cFE>8</span><span class=cF0>;
<a name="l400"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, i << </span><span class=cFE>8</span><span class=cF0> + is.u8[</span><span class=cFE>2</span><span class=cF0>]);
<a name="l401"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l402"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l403"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l404"></a> tmpi->ic_flags &= ~</span><span class=cF3>ICF_SHORT_JMP</span><span class=cF0>;
<a name="l405"></a> i = lb->addr - (rip + </span><span class=cFE>6</span><span class=cF0>);
<a name="l406"></a> </span><span class=cF1>if</span><span class=cF0> (lb->flags & </span><span class=cF3>CMF_POP_CMP</span><span class=cF0>)
<a name="l407"></a> i += </span><span class=cFE>8</span><span class=cF0>;
<a name="l408"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, is.u16[</span><span class=cFE>0</span><span class=cF0>]);
<a name="l409"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, i);
<a name="l410"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l411"></a>}
<a name="l412"></a>
<a name="l413"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICQueueInit</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip2)
<a name="l414"></a>{
<a name="l415"></a> </span><span class=cF9>I64</span><span class=cF0> r1;
<a name="l416"></a>
<a name="l417"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg1.type == </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>)
<a name="l418"></a> r1 = tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>;
<a name="l419"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l420"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l421"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg1.type, tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, rip2);
<a name="l422"></a> r1 = </span><span class=cF3>REG_RAX</span><span class=cF0>;
<a name="l423"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l424"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r1, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r1, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l425"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r1, </span><span class=cF1>sizeof</span><span class=cF7>(</span><span class=cF1>U8</span><span class=cF0> *</span><span class=cF7>)</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r1, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l426"></a>}
<a name="l427"></a>
<a name="l428"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICQueueInsert</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip2)
<a name="l429"></a>{
<a name="l430"></a> </span><span class=cF9>I64</span><span class=cF0> r1, r2;
<a name="l431"></a>
<a name="l432"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg2.type == </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0> && tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0> != </span><span class=cF3>REG_RDX</span><span class=cF0>)
<a name="l433"></a> r2 = tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>;
<a name="l434"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l435"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l436"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg2.type, tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg2.disp, rip2);
<a name="l437"></a> r2 = </span><span class=cF3>REG_RAX</span><span class=cF0>;
<a name="l438"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l439"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg1.type == </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>)
<a name="l440"></a> r1 = tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>;
<a name="l441"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l442"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l443"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg1.type, tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, rip2);
<a name="l444"></a> r1 = </span><span class=cF3>REG_RDX</span><span class=cF0>;
<a name="l445"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l446"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RBX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r1, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l447"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r1, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r2, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l448"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r2, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RBX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l449"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r2, </span><span class=cF1>sizeof</span><span class=cF7>(</span><span class=cF1>U8</span><span class=cF0> *</span><span class=cF7>)</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r1, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l450"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RBX</span><span class=cF0>, </span><span class=cF1>sizeof</span><span class=cF7>(</span><span class=cF1>U8</span><span class=cF0> *</span><span class=cF7>)</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r2, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l451"></a>}
<a name="l452"></a>
<a name="l453"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICQueueInsertRev</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip2)
<a name="l454"></a>{
<a name="l455"></a> </span><span class=cF9>I64</span><span class=cF0> r1, r2;
<a name="l456"></a>
<a name="l457"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg2.type == </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0> && tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0> != </span><span class=cF3>REG_RDX</span><span class=cF0>)
<a name="l458"></a> r2 = tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>;
<a name="l459"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l460"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l461"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg2.type, tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg2.disp, rip2);
<a name="l462"></a> r2 = </span><span class=cF3>REG_RAX</span><span class=cF0>;
<a name="l463"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l464"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg1.type == </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>)
<a name="l465"></a> r1 = tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>;
<a name="l466"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l467"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l468"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg1.type, tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, rip2);
<a name="l469"></a> r1 = </span><span class=cF3>REG_RDX</span><span class=cF0>;
<a name="l470"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l471"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RBX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r1, </span><span class=cF1>sizeof</span><span class=cF7>(</span><span class=cF1>U8</span><span class=cF0> *</span><span class=cF7>)</span><span class=cF0>, rip2);
<a name="l472"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RBX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r2, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l473"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r2, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r1, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l474"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r2, </span><span class=cF1>sizeof</span><span class=cF7>(</span><span class=cF1>U8</span><span class=cF0> *</span><span class=cF7>)</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RBX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l475"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r1, </span><span class=cF1>sizeof</span><span class=cF7>(</span><span class=cF1>U8</span><span class=cF0> *</span><span class=cF7>)</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r2, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l476"></a>}
<a name="l477"></a>
<a name="l478"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICQueueRemove</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip2)
<a name="l479"></a>{
<a name="l480"></a> </span><span class=cF9>I64</span><span class=cF0> r1;
<a name="l481"></a>
<a name="l482"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg1.type == </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>)
<a name="l483"></a> r1 = tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>;
<a name="l484"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l485"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l486"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg1.type, tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, rip2);
<a name="l487"></a> r1 = </span><span class=cF3>REG_RAX</span><span class=cF0>;
<a name="l488"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l489"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RBX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r1, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l490"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r1, </span><span class=cF1>sizeof</span><span class=cF7>(</span><span class=cF1>U8</span><span class=cF0> *</span><span class=cF7>)</span><span class=cF0>, rip2);
<a name="l491"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0x1A8948</span><span class=cF0>);
<a name="l492"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, </span><span class=cF1>sizeof</span><span class=cF7>(</span><span class=cF1>U8</span><span class=cF0> *</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>24</span><span class=cF0> + </span><span class=cFE>0x538948</span><span class=cF0>);
<a name="l493"></a>}
<a name="l494"></a>
<a name="l495"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICMinMax</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> op, </span><span class=cF9>I64</span><span class=cF0> rip2)
<a name="l496"></a>{
<a name="l497"></a> </span><span class=cF9>I64</span><span class=cF0> r1, i1 = </span><span class=cFE>0x48</span><span class=cF0>;
<a name="l498"></a>
<a name="l499"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg2.type == </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0> && tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0> != </span><span class=cF3>REG_RAX</span><span class=cF0>)
<a name="l500"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l501"></a> r1 = tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>;
<a name="l502"></a> </span><span class=cF1>if</span><span class=cF0> (r1 > </span><span class=cFE>7</span><span class=cF0>)
<a name="l503"></a> {
<a name="l504"></a> i1++;
<a name="l505"></a> r1 &= </span><span class=cFE>7</span><span class=cF0>;
<a name="l506"></a> }
<a name="l507"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg1.type, tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, rip2);
<a name="l508"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l509"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l510"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l511"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0> == </span><span class=cF3>REG_RAX</span><span class=cF0> && tmpi->arg1.type & </span><span class=cF3>MDG_REG_DISP_SIB</span><span class=cF0>)
<a name="l512"></a> {
<a name="l513"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg2.type, tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg2.disp, rip2);
<a name="l514"></a> r1 = </span><span class=cF3>REG_RDX</span><span class=cF0>;
<a name="l515"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg1.type, tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, rip2);
<a name="l516"></a> }
<a name="l517"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l518"></a> {
<a name="l519"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg2.type, tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg2.disp, rip2);
<a name="l520"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg1.type == </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>)
<a name="l521"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l522"></a> r1 = tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>;
<a name="l523"></a> </span><span class=cF1>if</span><span class=cF0> (r1 > </span><span class=cFE>7</span><span class=cF0>)
<a name="l524"></a> {
<a name="l525"></a> i1++;
<a name="l526"></a> r1 &= </span><span class=cFE>7</span><span class=cF0>;
<a name="l527"></a> }
<a name="l528"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l529"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l530"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l531"></a> r1 = </span><span class=cF3>REG_RDX</span><span class=cF0>;
<a name="l532"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg1.type, tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, rip2);
<a name="l533"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l534"></a> }
<a name="l535"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l536"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xC03B00</span><span class=cF0> + r1 << </span><span class=cFE>16</span><span class=cF0> + i1);
<a name="l537"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, </span><span class=cFE>0xC0000F00</span><span class=cF0> + op << </span><span class=cFE>16</span><span class=cF0> + r1 << </span><span class=cFE>24</span><span class=cF0> + i1);
<a name="l538"></a>}
<a name="l539"></a>
<a name="l540"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICSqr</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> op, </span><span class=cF9>I64</span><span class=cF0> rip2)
<a name="l541"></a>{
<a name="l542"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg1.type, tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, rip2);
<a name="l543"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, op, rip2);
<a name="l544"></a>}
<a name="l545"></a>
<a name="l546"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICModU64</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip2)
<a name="l547"></a>{
<a name="l548"></a> </span><span class=cF9>CICType</span><span class=cF0> t1;
<a name="l549"></a> </span><span class=cF9>I64</span><span class=cF0> r1, d1;
<a name="l550"></a>
<a name="l551"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg2.type, tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg2.disp, rip2);
<a name="l552"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0> != </span><span class=cF3>REG_RAX</span><span class=cF0> && tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0> != </span><span class=cF3>REG_RDX</span><span class=cF0> &&
<a name="l553"></a> tmpi->arg1.type & </span><span class=cF3>MDG_REG_DISP_SIB</span><span class=cF0> &&
<a name="l554"></a> tmpi->arg1.type.raw_type >= </span><span class=cF3>RT_I64</span><span class=cF0>)
<a name="l555"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l556"></a> t1 = tmpi->arg1.type;
<a name="l557"></a> r1 = tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>;
<a name="l558"></a> d1 = tmpi->arg1.disp;
<a name="l559"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l560"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l561"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l562"></a> t1 = </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l563"></a> r1 = </span><span class=cF3>REG_RBX</span><span class=cF0>;
<a name="l564"></a> d1 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l565"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RBX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg1.type, tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, rip2);
<a name="l566"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l567"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l568"></a> </span><span class=cFD>ICZero</span><span class=cF0>(tmpi, </span><span class=cF3>REG_RDX</span><span class=cF0>);
<a name="l569"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, t1, r1, d1, SLASH_OP_DIV, rip2);
<a name="l570"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l571"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l572"></a>}
<a name="l573"></a>
<a name="l574"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICSwap</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip2)
<a name="l575"></a>{
<a name="l576"></a> </span><span class=cF9>I64</span><span class=cF0> r1, r2;
<a name="l577"></a>
<a name="l578"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg1.type & </span><span class=cF3>MDF_REG</span><span class=cF0>)
<a name="l579"></a> r1 = tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>;
<a name="l580"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l581"></a> r1 = </span><span class=cF3>REG_RAX</span><span class=cF0>;
<a name="l582"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg2.type & </span><span class=cF3>MDF_REG</span><span class=cF0>)
<a name="l583"></a> r2 = tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>;
<a name="l584"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l585"></a> r2 = </span><span class=cF3>REG_RAX</span><span class=cF0>;
<a name="l586"></a> </span><span class=cF1>if</span><span class=cF0> (r1 == r2)
<a name="l587"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l588"></a> </span><span class=cF1>if</span><span class=cF0> (r1 == </span><span class=cF3>REG_RAX</span><span class=cF0>)
<a name="l589"></a> r1 = </span><span class=cF3>REG_RBX</span><span class=cF0>;
<a name="l590"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l591"></a> r2 = </span><span class=cF3>REG_RAX</span><span class=cF0>;
<a name="l592"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l593"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r2, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg2.type, tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg2.disp, rip2);
<a name="l594"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r1, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg1.type, tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, rip2);
<a name="l595"></a> </span><span class=cF1>switch</span><span class=cF0> (tmpi->ic_code)
<a name="l596"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l597"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>IC_SWAP_U8</span><span class=cF0>:
<a name="l598"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_U8</span><span class=cF0>, r1, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l599"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_U8</span><span class=cF0>, r2, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l600"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_U8</span><span class=cF0>, r2, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l601"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_U8</span><span class=cF0>, r1, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l602"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l603"></a>
<a name="l604"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>IC_SWAP_U16</span><span class=cF0>:
<a name="l605"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_U16</span><span class=cF0>, r1, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l606"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_U16</span><span class=cF0>, r2, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l607"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_U16</span><span class=cF0>, r2, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l608"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_U16</span><span class=cF0>, r1, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l609"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l610"></a>
<a name="l611"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>IC_SWAP_U32</span><span class=cF0>:
<a name="l612"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_U32</span><span class=cF0>, r1, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l613"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_U32</span><span class=cF0>, r2, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l614"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_U32</span><span class=cF0>, r2, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l615"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_U32</span><span class=cF0>, r1, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l616"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l617"></a>
<a name="l618"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>IC_SWAP_I64</span><span class=cF0>:
<a name="l619"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_U64</span><span class=cF0>, r1, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l620"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_U64</span><span class=cF0>, r2, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l621"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_U64</span><span class=cF0>, r2, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l622"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_U64</span><span class=cF0>, r1, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip2);
<a name="l623"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l624"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l625"></a>}
<a name="l626"></a>
<a name="l627"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICAndEqu</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip2)
<a name="l628"></a>{
<a name="l629"></a> </span><span class=cF9>I64</span><span class=cF0> i, bit;
<a name="l630"></a>
<a name="l631"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg2.type & </span><span class=cF3>MDF_IMM</span><span class=cF0> && !</span><span class=cF7>(</span><span class=cF0>tmpi->arg1.type & </span><span class=cF3>MDF_STACK</span><span class=cF7>)</span><span class=cF0> && tmpi->ic_flags & </span><span class=cF3>ICF_RES_NOT_USED</span><span class=cF0>)
<a name="l632"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l633"></a> i = ~tmpi->arg2.disp;
<a name="l634"></a> bit = </span><span class=cF5>Bsf</span><span class=cF0>(i);
<a name="l635"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cFE>0</span><span class=cF0> <= bit == </span><span class=cF5>Bsr</span><span class=cF7>(</span><span class=cF0>i</span><span class=cF7>)</span><span class=cF0>)
<a name="l636"></a> {
<a name="l637"></a> tmpi->arg2.disp = bit;
<a name="l638"></a> tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0> = </span><span class=cFE>0</span><span class=cF0>;
<a name="l639"></a> tmpi->arg1.type = tmpi->arg1.type & </span><span class=cF3>MDG_MASK</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l640"></a> </span><span class=cFD>ICBitOps</span><span class=cF0>(tmpi, &tmpi->arg2, &tmpi->arg1, tmpi, </span><span class=cFE>0xB30F</span><span class=cF0>, </span><span class=cFE>0x30BA0F</span><span class=cF0>, rip2);
<a name="l641"></a> </span><span class=cF1>return</span><span class=cF0>;
<a name="l642"></a> }
<a name="l643"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l644"></a> </span><span class=cFD>ICAddSubEctEqu</span><span class=cF0>(tmpi, tmpi->arg1_type_pointed_to, tmpi->res.type,tmpi->res.</span><span class=cF1>reg</span><span class=cF0>, tmpi->res.disp,
<a name="l645"></a> tmpi->arg1.type, tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp,
<a name="l646"></a> tmpi->arg2.type, tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg2.disp,
<a name="l647"></a> </span><span class=cFE>0x210425240423</span><span class=cF0>, rip2);
<a name="l648"></a>}
<a name="l649"></a>
<a name="l650"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICOrEqu</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip2)
<a name="l651"></a>{
<a name="l652"></a> </span><span class=cF9>I64</span><span class=cF0> i, bit;
<a name="l653"></a>
<a name="l654"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg2.type & </span><span class=cF3>MDF_IMM</span><span class=cF0> && !</span><span class=cF7>(</span><span class=cF0>tmpi->arg1.type & </span><span class=cF3>MDF_STACK</span><span class=cF7>)</span><span class=cF0> && tmpi->ic_flags & </span><span class=cF3>ICF_RES_NOT_USED</span><span class=cF0>)
<a name="l655"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l656"></a> i = tmpi->arg2.disp;
<a name="l657"></a> bit = </span><span class=cF5>Bsf</span><span class=cF0>(i);
<a name="l658"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cFE>0</span><span class=cF0> <= bit == </span><span class=cF5>Bsr</span><span class=cF7>(</span><span class=cF0>i</span><span class=cF7>)</span><span class=cF0> && i > </span><span class=cF3>I8_MAX</span><span class=cF0>)
<a name="l659"></a> {
<a name="l660"></a> tmpi->arg2.disp = bit;
<a name="l661"></a> tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0> = </span><span class=cFE>0</span><span class=cF0>;
<a name="l662"></a> tmpi->arg1.type = tmpi->arg1.type & </span><span class=cF3>MDG_MASK</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l663"></a> </span><span class=cFD>ICBitOps</span><span class=cF0>(tmpi, &tmpi->arg2, &tmpi->arg1, tmpi, </span><span class=cFE>0xAB0F</span><span class=cF0>, </span><span class=cFE>0x28BA0F</span><span class=cF0>, rip2);
<a name="l664"></a> </span><span class=cF1>return</span><span class=cF0>;
<a name="l665"></a> }
<a name="l666"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l667"></a> </span><span class=cFD>ICAddSubEctEqu</span><span class=cF0>(tmpi, tmpi->arg1_type_pointed_to, tmpi->res.type, tmpi->res.</span><span class=cF1>reg</span><span class=cF0>, tmpi->res.disp,
<a name="l668"></a> tmpi->arg1.type, tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp,
<a name="l669"></a> tmpi->arg2.type, tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg2.disp,
<a name="l670"></a> </span><span class=cFE>0x09010D0C010B</span><span class=cF0>, rip2);
<a name="l671"></a>}
<a name="l672"></a>
<a name="l673"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICXorEqu</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip2)
<a name="l674"></a>{
<a name="l675"></a> </span><span class=cF9>I64</span><span class=cF0> i, bit;
<a name="l676"></a>
<a name="l677"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg2.type & </span><span class=cF3>MDF_IMM</span><span class=cF0> && !</span><span class=cF7>(</span><span class=cF0>tmpi->arg1.type & </span><span class=cF3>MDF_STACK</span><span class=cF7>)</span><span class=cF0> && tmpi->ic_flags & </span><span class=cF3>ICF_RES_NOT_USED</span><span class=cF0>)
<a name="l678"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l679"></a> i = tmpi->arg2.disp;
<a name="l680"></a> bit = </span><span class=cF5>Bsf</span><span class=cF0>(i);
<a name="l681"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cFE>0</span><span class=cF0> <= bit == </span><span class=cF5>Bsr</span><span class=cF7>(</span><span class=cF0>i</span><span class=cF7>)</span><span class=cF0>)
<a name="l682"></a> {
<a name="l683"></a> tmpi->arg2.disp = bit;
<a name="l684"></a> tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0> = </span><span class=cFE>0</span><span class=cF0>;
<a name="l685"></a> tmpi->arg1.type = tmpi->arg1.type & </span><span class=cF3>MDG_MASK</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l686"></a> </span><span class=cFD>ICBitOps</span><span class=cF0>(tmpi, &tmpi->arg2, &tmpi->arg1, tmpi, </span><span class=cFE>0xBB0F</span><span class=cF0>, </span><span class=cFE>0x38BA0F</span><span class=cF0>, rip2);
<a name="l687"></a> </span><span class=cF1>return</span><span class=cF0>;
<a name="l688"></a> }
<a name="l689"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l690"></a> </span><span class=cFD>ICAddSubEctEqu</span><span class=cF0>(tmpi, tmpi->arg1_type_pointed_to, tmpi->res.type, tmpi->res.</span><span class=cF1>reg</span><span class=cF0>,tmpi->res.disp,
<a name="l691"></a> tmpi->arg1.type, tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp,
<a name="l692"></a> tmpi->arg2.type, tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg2.disp,
<a name="l693"></a> </span><span class=cFE>0x310635340633</span><span class=cF0>, rip2);
<a name="l694"></a>}
<a name="l695"></a>
<a name="l696"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICSwitch</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip, </span><span class=cF1>Bool</span><span class=cF0> nobound, </span><span class=cF9>CCompCtrl</span><span class=cF0> *cc, </span><span class=cF1>U8</span><span class=cF0> *buf, </span><span class=cF9>I64</span><span class=cF0> rip2)
<a name="l697"></a>{
<a name="l698"></a> </span><span class=cF9>I64</span><span class=cF0> i, j, count, min, max, begin, r;
<a name="l699"></a> </span><span class=cF9>CCodeMisc</span><span class=cF0> *lb;
<a name="l700"></a> </span><span class=cF1>Bool</span><span class=cF0> short_jmp;
<a name="l701"></a> </span><span class=cF9>CAOTAbsAddr</span><span class=cF0> *tmpa;
<a name="l702"></a>
<a name="l703"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>tmpi->arg1.type & </span><span class=cF3>MDF_REG</span><span class=cF7>)</span><span class=cF0> || tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0> & </span><span class=cFE>7</span><span class=cF0> == </span><span class=cF3>REG_RSP</span><span class=cF0>)
<a name="l704"></a> r = </span><span class=cF3>REG_RDX</span><span class=cF0>;
<a name="l705"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l706"></a> r = tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>;
<a name="l707"></a> </span><span class=cF1>if</span><span class=cF0> (nobound)
<a name="l708"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg1.type, tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, rip2);
<a name="l709"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l710"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l711"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg2.type & </span><span class=cF3>MDF_IMM</span><span class=cF0>)
<a name="l712"></a> {
<a name="l713"></a> j = tmpi->arg2.disp;
<a name="l714"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg1.type, tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, rip2);
<a name="l715"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0> <= j <= </span><span class=cF3>I8_MAX</span><span class=cF0>)
<a name="l716"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l717"></a> i = </span><span class=cFE>0xF88348</span><span class=cF0> + (r & </span><span class=cFE>7</span><span class=cF0>) << </span><span class=cFE>16</span><span class=cF0>;
<a name="l718"></a> </span><span class=cF1>if</span><span class=cF0> (r > </span><span class=cFE>7</span><span class=cF0>)
<a name="l719"></a> i++;
<a name="l720"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, i);
<a name="l721"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, j);
<a name="l722"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l723"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I32_MIN</span><span class=cF0> <= j <= </span><span class=cF3>I32_MAX</span><span class=cF0>)
<a name="l724"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l725"></a> i = </span><span class=cFE>0xF88148</span><span class=cF0> + (r & </span><span class=cFE>7</span><span class=cF0>) << </span><span class=cFE>16</span><span class=cF0>;
<a name="l726"></a> </span><span class=cF1>if</span><span class=cF0> (r > </span><span class=cFE>7</span><span class=cF0>)
<a name="l727"></a> i++;
<a name="l728"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, i);
<a name="l729"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, j);
<a name="l730"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l731"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l732"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l733"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg2.type, tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg2.disp, rip2);
<a name="l734"></a> i = </span><span class=cFE>0xC13B48</span><span class=cF0> + (r & </span><span class=cFE>7</span><span class=cF0>) << </span><span class=cFE>19</span><span class=cF0>;
<a name="l735"></a> </span><span class=cF1>if</span><span class=cF0> (r > </span><span class=cFE>7</span><span class=cF0>)
<a name="l736"></a> i += </span><span class=cFE>4</span><span class=cF0>;
<a name="l737"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, i);
<a name="l738"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l739"></a> }
<a name="l740"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l741"></a> {
<a name="l742"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg2.type, tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg2.disp, rip2);
<a name="l743"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r, </span><span class=cFE>0</span><span class=cF0>, tmpi->arg1.type, tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi->arg1.disp, rip2);
<a name="l744"></a> i = </span><span class=cFE>0xC13B48</span><span class=cF0> + (r & </span><span class=cFE>7</span><span class=cF0>) << </span><span class=cFE>19</span><span class=cF0>;
<a name="l745"></a> </span><span class=cF1>if</span><span class=cF0> (r > </span><span class=cFE>7</span><span class=cF0>)
<a name="l746"></a> i += </span><span class=cFE>4</span><span class=cF0>;
<a name="l747"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, i);
<a name="l748"></a> }
<a name="l749"></a>
<a name="l750"></a> rip += tmpi->ic_count;
<a name="l751"></a> lb = tmpi->ic_data(</span><span class=cF9>CCodeMisc</span><span class=cF0> *)-></span><span class=cF1>default</span><span class=cF0>;
<a name="l752"></a> short_jmp = </span><span class=cF5>ToBool</span><span class=cF0>(tmpi->ic_flags & </span><span class=cF3>ICF_SHORT_JMP</span><span class=cF0>);
<a name="l753"></a> </span><span class=cF1>if</span><span class=cF0> (!buf && lb->addr != </span><span class=cF3>INVALID_PTR</span><span class=cF0>)
<a name="l754"></a> {
<a name="l755"></a> i = lb->addr - (rip + </span><span class=cFE>2</span><span class=cF0>);
<a name="l756"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0> <= i <= </span><span class=cF3>I8_MAX</span><span class=cF0>)
<a name="l757"></a> short_jmp = </span><span class=cF3>TRUE</span><span class=cF0>;
<a name="l758"></a> }
<a name="l759"></a> </span><span class=cF1>if</span><span class=cF0> (short_jmp)
<a name="l760"></a> {
<a name="l761"></a> tmpi->ic_flags |= </span><span class=cF3>ICF_SHORT_JMP</span><span class=cF0>;
<a name="l762"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cF7>(</span><span class=cF0>lb->addr - (rip + </span><span class=cFE>2</span><span class=cF0>)</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>8</span><span class=cF0> + </span><span class=cFE>0x73</span><span class=cF0>);
<a name="l763"></a> }
<a name="l764"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l765"></a> {
<a name="l766"></a> tmpi->ic_flags &= ~</span><span class=cF3>ICF_SHORT_JMP</span><span class=cF0>;
<a name="l767"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0x830F</span><span class=cF0>);
<a name="l768"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, lb->addr - </span><span class=cF7>(</span><span class=cF0>rip + </span><span class=cFE>6</span><span class=cF7>)</span><span class=cF0>);
<a name="l769"></a> }
<a name="l770"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l771"></a>
<a name="l772"></a> lb = tmpi->ic_data;
<a name="l773"></a> begin = lb->begin->addr;
<a name="l774"></a> </span><span class=cF1>if</span><span class=cF0> (!buf && begin != </span><span class=cF3>INVALID_PTR</span><span class=cF0>)
<a name="l775"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l776"></a> min = </span><span class=cF3>I64_MAX</span><span class=cF0>;
<a name="l777"></a> max = </span><span class=cF3>I64_MIN</span><span class=cF0>;
<a name="l778"></a> </span><span class=cF1>for</span><span class=cF0> (i = </span><span class=cFE>0</span><span class=cF0>; i < lb->range; i++)
<a name="l779"></a> {
<a name="l780"></a> </span><span class=cF1>if</span><span class=cF0> (lb->jmp_table[i]->addr == </span><span class=cF3>INVALID_PTR</span><span class=cF0>)
<a name="l781"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l782"></a> min = </span><span class=cF3>I64_MIN</span><span class=cF0>;
<a name="l783"></a> max = </span><span class=cF3>I64_MAX</span><span class=cF0>;
<a name="l784"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l785"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l786"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l787"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l788"></a> j = lb->jmp_table[i]->addr-begin;
<a name="l789"></a> min = </span><span class=cF5>MinI64</span><span class=cF0>(min, j);
<a name="l790"></a> max = </span><span class=cF5>MaxI64</span><span class=cF0>(max, j);
<a name="l791"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l792"></a> }
<a name="l793"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0> <= min <= max <= </span><span class=cF3>I8_MAX</span><span class=cF0>)
<a name="l794"></a> lb->flags |= </span><span class=cF3>CMF_I8_JMP_TABLE</span><span class=cF0>;
<a name="l795"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>U8_MIN</span><span class=cF0> <= min <= max <= </span><span class=cF3>U8_MAX</span><span class=cF0>)
<a name="l796"></a> lb->flags |= </span><span class=cF3>CMF_U8_JMP_TABLE</span><span class=cF0>;
<a name="l797"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I16_MIN</span><span class=cF0> <= min <= max <= </span><span class=cF3>I16_MAX</span><span class=cF0>)
<a name="l798"></a> lb->flags |= </span><span class=cF3>CMF_I16_JMP_TABLE</span><span class=cF0>;
<a name="l799"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>U16_MIN</span><span class=cF0> <= min <= max <= </span><span class=cF3>U16_MAX</span><span class=cF0>)
<a name="l800"></a> lb->flags |= </span><span class=cF3>CMF_U16_JMP_TABLE</span><span class=cF0>;
<a name="l801"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l802"></a>
<a name="l803"></a> </span><span class=cF1>if</span><span class=cF0> (lb->flags & </span><span class=cF3>CMF_I8_JMP_TABLE</span><span class=cF0>)
<a name="l804"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l805"></a> </span><span class=cF1>if</span><span class=cF0> (r < </span><span class=cFE>8</span><span class=cF0>)
<a name="l806"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0x48</span><span class=cF0>);
<a name="l807"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l808"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0x49</span><span class=cF0>);
<a name="l809"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0x98BE0F</span><span class=cF0> + </span><span class=cF7>(</span><span class=cF0>r & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>16</span><span class=cF0>);
<a name="l810"></a> count = </span><span class=cFE>1</span><span class=cF0>;
<a name="l811"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l812"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (lb->flags & </span><span class=cF3>CMF_U8_JMP_TABLE</span><span class=cF0>)
<a name="l813"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l814"></a> </span><span class=cF1>if</span><span class=cF0> (r < </span><span class=cFE>8</span><span class=cF0>)
<a name="l815"></a> count = </span><span class=cFE>2</span><span class=cF0>;
<a name="l816"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l817"></a> {
<a name="l818"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0x49</span><span class=cF0>);
<a name="l819"></a> count = </span><span class=cFE>1</span><span class=cF0>;
<a name="l820"></a> }
<a name="l821"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0x98B60F</span><span class=cF0> + </span><span class=cF7>(</span><span class=cF0>r & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>16</span><span class=cF0>);
<a name="l822"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l823"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (lb->flags & </span><span class=cF3>CMF_I16_JMP_TABLE</span><span class=cF0>)
<a name="l824"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l825"></a> </span><span class=cF1>if</span><span class=cF0> (r < </span><span class=cFE>8</span><span class=cF0>)
<a name="l826"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0x48</span><span class=cF0>);
<a name="l827"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l828"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0x4A</span><span class=cF0>);
<a name="l829"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, </span><span class=cFE>0x451CBF0F</span><span class=cF0> + </span><span class=cF7>(</span><span class=cF0>r & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>27</span><span class=cF0>);
<a name="l830"></a> count = </span><span class=cFE>0</span><span class=cF0>;
<a name="l831"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l832"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (lb->flags & </span><span class=cF3>CMF_U16_JMP_TABLE</span><span class=cF0>)
<a name="l833"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l834"></a> </span><span class=cF1>if</span><span class=cF0> (r < </span><span class=cFE>8</span><span class=cF0>)
<a name="l835"></a> count = </span><span class=cFE>1</span><span class=cF0>;
<a name="l836"></a> </span><span class=cF1>else</span><span class=cF0> {
<a name="l837"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0x4A</span><span class=cF0>);
<a name="l838"></a> count = </span><span class=cFE>0</span><span class=cF0>;
<a name="l839"></a> }
<a name="l840"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, </span><span class=cFE>0x451CB70F</span><span class=cF0> + </span><span class=cF7>(</span><span class=cF0>r & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>27</span><span class=cF0>);
<a name="l841"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l842"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l843"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l844"></a> </span><span class=cF1>if</span><span class=cF0> (r < </span><span class=cFE>8</span><span class=cF0>)
<a name="l845"></a> count = </span><span class=cFE>2</span><span class=cF0>;
<a name="l846"></a> </span><span class=cF1>else</span><span class=cF0> {
<a name="l847"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0x42</span><span class=cF0>);
<a name="l848"></a> count = </span><span class=cFE>1</span><span class=cF0>;
<a name="l849"></a> }
<a name="l850"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0x851C8B</span><span class=cF0> + </span><span class=cF7>(</span><span class=cF0>r & </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> << </span><span class=cFE>19</span><span class=cF0>);
<a name="l851"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l852"></a> </span><span class=cF1>if</span><span class=cF0> (buf && cc->flags & </span><span class=cF3>CCF_AOT_COMPILE</span><span class=cF0>)
<a name="l853"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l854"></a> tmpa = </span><span class=cF5>CAlloc</span><span class=cF0>(</span><span class=cF1>sizeof</span><span class=cF7>(</span><span class=cF9>CAOTAbsAddr</span><span class=cF7>)</span><span class=cF0>);
<a name="l855"></a> tmpa->next = cc->aotc->abss;
<a name="l856"></a> tmpa->type = </span><span class=cF3>AAT_ADD_U32</span><span class=cF0>;
<a name="l857"></a> cc->aotc->abss = tmpa;
<a name="l858"></a> tmpa->rip = rip2 + tmpi->ic_count;
<a name="l859"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, lb->addr + cc->aotc->rip);
<a name="l860"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l861"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l862"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, lb->addr+buf);
<a name="l863"></a>
<a name="l864"></a> </span><span class=cF1>if</span><span class=cF0> (lb->flags & </span><span class=cF7>(</span><span class=cF3>CMF_I8_JMP_TABLE</span><span class=cF0> | </span><span class=cF3>CMF_U8_JMP_TABLE</span><span class=cF0> | </span><span class=cF3>CMF_I16_JMP_TABLE</span><span class=cF0> | </span><span class=cF3>CMF_U16_JMP_TABLE</span><span class=cF7>)</span><span class=cF0>)
<a name="l865"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l866"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0xC381</span><span class=cF0>); </span><span class=cF2>// ADD EBX, 0x########</span><span class=cF0>
<a name="l867"></a> </span><span class=cF1>if</span><span class=cF0> (buf && cc->flags & </span><span class=cF3>CCF_AOT_COMPILE</span><span class=cF0>)
<a name="l868"></a> {
<a name="l869"></a> tmpa = </span><span class=cF5>CAlloc</span><span class=cF0>(</span><span class=cF1>sizeof</span><span class=cF7>(</span><span class=cF9>CAOTAbsAddr</span><span class=cF7>)</span><span class=cF0>);
<a name="l870"></a> tmpa->next = cc->aotc->abss;
<a name="l871"></a> tmpa->type = </span><span class=cF3>AAT_ADD_U32</span><span class=cF0>;
<a name="l872"></a> cc->aotc->abss = tmpa;
<a name="l873"></a> tmpa->rip = rip2 + tmpi->ic_count;
<a name="l874"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, begin + cc->aotc->rip);
<a name="l875"></a> }
<a name="l876"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l877"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, begin + buf);
<a name="l878"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l879"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l880"></a> count += </span><span class=cFE>6</span><span class=cF0>;
<a name="l881"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0xE3FF</span><span class=cF0>); </span><span class=cF2>//JMP EBX</span><span class=cF0>
<a name="l882"></a> </span><span class=cF1>for</span><span class=cF0> (i = </span><span class=cFE>0</span><span class=cF0>; i < count; i++) </span><span class=cF2>//Code must always shrink, not expand</span><span class=cF0>
<a name="l883"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cF3>OC_NOP</span><span class=cF0>);
<a name="l884"></a> tmpi->ic_flags &= ~</span><span class=cF3>ICF_CODE_FINAL</span><span class=cF0>;
<a name="l885"></a>}
<a name="l886"></a>
<a name="l887"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICLocalVarInit</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi)
<a name="l888"></a>{
<a name="l889"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xC48B48</span><span class=cF0>); </span><span class=cF2>// MOV</span><span class=cF0> </span><span class=cF2>U64 RAX, U64 RSP</span><span class=cF0>
<a name="l890"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0x5748</span><span class=cF0>); </span><span class=cF2>// PUSH</span><span class=cF0> </span><span class=cF2>U64 RDI</span><span class=cF0>
<a name="l891"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xF88B48</span><span class=cF0>); </span><span class=cF2>// MOV</span><span class=cF0> </span><span class=cF2>U64 RDI, U64 RAX</span><span class=cF0>
<a name="l892"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xC1C748</span><span class=cF0>); </span><span class=cF2>// MOV</span><span class=cF0> </span><span class=cF2>U64 RCX, I32 0x########</span><span class=cF0>
<a name="l893"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, tmpi->ic_data);
<a name="l894"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFB>sys_var_init_val</span><span class=cF0> << </span><span class=cFE>8</span><span class=cF0> + </span><span class=cFE>0xB0</span><span class=cF0>); </span><span class=cF2>// MOV AL, sys_var_init_val</span><span class=cF0>
<a name="l895"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xAA48F3</span><span class=cF0>); </span><span class=cF2>// REP_STOSB</span><span class=cF0>
<a name="l896"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0x5F48</span><span class=cF0>); </span><span class=cF2>// POP</span><span class=cF0> </span><span class=cF2>U64 RDI</span><span class=cF0>
<a name="l897"></a>}
</span></pre></body>
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