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https://github.com/Zeal-Operating-System/ZealOS.git
synced 2025-01-13 16:16:31 +00:00
Begin removing debug lines from AHCI code, document bugs identified and current workarounds.
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8f93766df7
commit
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1 changed files with 11 additions and 72 deletions
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@ -1,11 +1,16 @@
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/*
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- Perhaps make more references to spec in comments
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- Make more references to spec in comments
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- ATAPI RW
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- ATAPI RW needs cleaning up / improving
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- Remove Buffer alignment check and just do it on every call
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- AHCIATAPISetMaxSpeed?
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- AHCIATAPISetMaxSpeed needs to be implemented
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- TODO FIXME: certain Bt() and Bts() on AHCI memory areas, and variable casting,
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caused strange crashes on a Ryzen with Gigabyte brand motherboard. Bit test
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function implementation and compiler casting internal functionality need
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to be researched to fix those bugs.
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*/
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I64 AHCI_DEBUG = FALSE;
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@ -222,10 +227,6 @@ U0 AHCIPortCmdWait(I64 port_num, I64 cmd_slot)
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CAHCIPort *port = &blkdev.ahci_hba->ports[port_num];
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U8 str[STR_LEN];
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U64 debug_timeout = 0, debug_retries = 16;
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if (sys_boot_src.u16[0] == BOOT_SRC_DVD)
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"DEBUG: AHCI: AHCIPortCmdWait";
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while (TRUE)
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{
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// if (!Bt(&port->cmd_issue, cmd_slot)) //When command has been processed
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@ -235,13 +236,6 @@ U0 AHCIPortCmdWait(I64 port_num, I64 cmd_slot)
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if (Bt(&port->interrupt_status, AHCI_PxIf_TFE)) //Task File Error ($LK,"ATAS_ERR",A="MN:ATAS_ERR"$)
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{
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error:
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if (sys_boot_src.u16[0] == BOOT_SRC_DVD)
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{
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"\nDEBUG: AHCI: AHCIPortCmdWait Task File Error!\n";
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AHCIDebug(port_num);
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"\nPausing for 10 seconds...\n";
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Busy(10 * 1000 * 1000);
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}
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if (AHCI_DEBUG)
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{
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StrPrint(str, "Run AHCIDebug(%d);", port_num);
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@ -252,23 +246,8 @@ error:
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throw('AHCI');
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}
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if (++debug_timeout > U16_MAX * 6)
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{
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debug_timeout = 0;
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".";
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if (!--debug_retries)
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{
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"\nDEBUG: AHCI: AHCIPortCmdWait stuck !\n";
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AHCIDebug(port_num);
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"\nDEBUG: AHCI: Halting.\n";
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while (TRUE) {asm{HLT};};
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}
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}
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Yield; // don't hang OS
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}
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if (sys_boot_src.u16[0] == BOOT_SRC_DVD)
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"\n";
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if (Bt(&port->interrupt_status, AHCI_PxIf_TFE)) //Second safety check
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goto error;
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@ -576,7 +555,6 @@ U0 AHCIPortIdentify(CBlkDev *bd)
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I64 cmd_slot = AHCIPortCmdSlotGet(bd->port_num);
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CPortCmdHeader *cmd_header = AHCIPortActiveHeaderGet(bd->port_num, cmd_slot);
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U16 *dev_id_record;
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U64 debug_val1 = 0, debug_val2 = 0;;
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Bts(&debug_val1, cmd_slot);
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if (sys_boot_src.u16[0] == BOOT_SRC_DVD)
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@ -587,27 +565,10 @@ U0 AHCIPortIdentify(CBlkDev *bd)
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"port->cmd_issue: 0x%016X\n", port->cmd_issue;
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"port->device_sleep: 0x%016X\n", port->device_sleep;
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"port->fis_switch_ctrl: 0x%016X\n", port->fis_switch_ctrl;
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"debug_val1: 0x%016X\n", debug_val1;
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}
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port->device_sleep = 0; // clear device sleep bits for debug sake
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debug_val1 = 0;
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debug_val1 |= 1 << cmd_slot;
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debug_val2 = Bt(&debug_val1, cmd_slot);
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if (sys_boot_src.u16[0] == BOOT_SRC_DVD)
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{
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"AHCI: DEBUG: AHCIPortIdentify variable check 1\n";
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"port->device_sleep: 0x%016X\n", port->device_sleep;
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"debug_val1: 0x%016X\n", debug_val1;
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"debug_val2: 0x%016X\n", debug_val2;
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}
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debug_val1 = 0;
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debug_val2 = 0;
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port->interrupt_status = port->interrupt_status; //TODO: Why?
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port->command |= 1 << 28; // set ICC to 1 (try cause HBA to transition Port to Active state)
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//Using the code heap for this alloc to stay under 32-bit address space.
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dev_id_record = CAlloc(512, sys_task->code_heap);
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@ -620,21 +581,11 @@ U0 AHCIPortIdentify(CBlkDev *bd)
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cmd_table->prdt[0].data_byte_count = 512 - 1; //Zero-based value
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cmd_header->prdt_len = 1; //1 PRD, as described above, which contains the address to put the ID record.
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cmd_header->desc &= ~0b11111; // clear CFL bits
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cmd_header->desc |= sizeof(CFisH2D) / sizeof(U32); // set CFL to size of FIS (represented as U32)
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//Setup command FIS
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cmd_fis = cmd_table->cmd_fis;
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cmd_fis->type = FISt_H2D;
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// Bts(&cmd_fis->desc, AHCI_CF_DESCf_C); //Set Command bit in H2D FIS.
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cmd_fis->desc |= AHCI_CF_DESCF_C; //set command bit in h2d fis with |= for debug
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if (sys_boot_src.u16[0] == BOOT_SRC_DVD)
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{
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"AHCI: DEBUG: AHCIPortIdentify variable check 2\n";
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"port->command: 0x%016X\n", port->command;
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"cmd_fis->desc: 0x%016X\n", cmd_fis->desc;
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}
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Bts(&cmd_fis->desc, AHCI_CF_DESCf_C); //Set Command bit in H2D FIS.
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if (port->signature == AHCI_PxSIG_ATAPI)
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cmd_fis->command = ATA_IDENTIFY_PACKET;
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@ -649,18 +600,6 @@ U0 AHCIPortIdentify(CBlkDev *bd)
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// Bts(&port->cmd_issue, cmd_slot); //Issue the command.
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port->cmd_issue |= 1 << cmd_slot; //issue the command with |= for debug sake
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if (sys_boot_src.u16[0] == BOOT_SRC_DVD)
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{
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"AHCI: DEBUG: AHCIPortIdentify variable check 3\n";
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"port->command: 0x%016X\n", port->command;
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"cmd_header->desc: 0x%016X\n", cmd_header->desc;
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"cmd_fis->command: 0x%016X\n", cmd_fis->command;
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"port->cmd_issue: 0x%016X\n", port->cmd_issue;
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"port->device_sleep: 0x%016X\n", port->device_sleep;
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"port->fis_switch_ctrl: 0x%016X\n", port->fis_switch_ctrl;
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if (port->cmd_issue > 0xFF)
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"Why is port->cmd_issue invalid ? >:( \n";
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}
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AHCIPortCmdWait(bd->port_num, cmd_slot);
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Free(bd->dev_id_record);
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@ -1081,6 +1020,7 @@ U0 AHCIPortInit(CBlkDev *bd, CAHCIPort *port, I64 port_num)
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cmd_header_base = port->cmd_list_base;
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for (i = 0; i < blkdev.cmd_slot_count; i++)
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{
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// cmd_header = &port->cmd_list_base(CPortCmdHeader *)[i];
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cmd_header = &cmd_header_base[i];
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//Write Command FIS Length (CFL, a fixed size) in bits 4:0 of the desc. Takes size in U32s.
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cmd_header->desc = sizeof(CFisH2D) / sizeof(U32);
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@ -1111,6 +1051,7 @@ Bool AHCIAtaInit(CBlkDev *bd)
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for (i = 0; i < blkdev.cmd_slot_count; i++)
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{
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cmd_header_base = bd->ahci_port->cmd_list_base;
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// cmd_header = &bd->ahci_port->cmd_list_base(CPortCmdHeader *)[i];
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cmd_header = &cmd_header_base[i];
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Free(cmd_header->cmd_table_base);
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}
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@ -1171,8 +1112,6 @@ U0 AHCIInit()
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Bts(&blkdev.ahci_hba->ghc, AHCI_GHCf_AHCI_ENABLE);
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"AHCI: GHC.AE set\n";
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"AHCI: GHC.AE value confirm with &: %d\n", blkdev.ahci_hba->ghc & (1 << AHCI_GHCf_AHCI_ENABLE);
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"AHCI: GHC.AE value confirm with Bt(): %d\n", Bt(&blkdev.ahci_hba->ghc, AHCI_GHCf_AHCI_ENABLE);
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//Transferring ownership from BIOS if supported.
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if (Bt(&hba->caps_ext, AHCI_CAPSEXTf_BOH))
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