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Move SMBIOS code into Kernel, refactor WallPaper BootCode logic

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GutPuncher 2023-10-13 04:45:08 -04:00
parent 01778d3ac7
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6 changed files with 736 additions and 747 deletions
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654
src/Kernel/KDefine.ZC
View file

@ -324,6 +324,660 @@ U0 SysDefinesLoad()
"MP Crash\0" "MP Crash\0"
"Wake\0" "Wake\0"
"Debug\0"); "Debug\0");
//SMBIOS parsing. See $LK+PU,"SMBIOS.ZC",A="FI:::/Kernel/SMBIOS.ZC"$.
//Based on SMBIOS specification 3.3.0 (document "DSP0134")
//Section 7.1.1 line 925 (BIOS characteristics)
DefineListLoad("ST_SMBIOS_BIOS_FLAGS",
" \0"
" \0"
" \0"
" \0"
"ISA\0"
"MCA\0"
"EISA\0"
"PCI\0"
"PC Card\0"
"Plug and Play\0"
"APM\0"
"Flashable BIOS\0"
"BIOS shadowing\0"
"VESA Local Bus\0"
"ESCD\0"
"CD Boot\0"
"Selectable boot\0"
"BIOS ROM socketed\0"
"PC Card Boot\0"
"Enhanced Disk Drive Services\0"
" \0"
" \0"
"INT 0x13 5.25\"/360 KB Floppy Support\0"
"INT 0x13 5.25\"/1.2 MB Floppy Support\0"
"INT 0x13 3.5\"/720 KB Floppy Support\0"
"INT 0x13 3.5\"/2.88 MB Floppy Support\0"
"INT 0x05 Screen Printing\0"
"INT 0x09 8042 Keyboard\0"
"INT 0x14 Serial\0"
"INT 0x17 Printer\0"
"INT 0x10 CGA/Mono Video");
//Section 7.1.2.1 line 931 (BIOS characteristics extension byte 1)
DefineListLoad("ST_SMBIOS_BIOS_FLAGSEXT1",
"ACPI\0"
"USB Legacy\0"
" \0"
" \0"
" \0"
" \0"
"Serial Boot\0"
"Smart Battery");
//Section 7.1.2.2 line 935 (BIOS characteristics extension byte 2)
DefineListLoad("ST_SMBIOS_BIOS_FLAGSEXT2",
"BIOS Boot\0"
"Network Boot\0"
"Targeted Content Distribution\0"
"UEFI\0"
"Virtual Machine");
//Section 7.2.2 line 959 (system wakeup types)
DefineListLoad("ST_SMBIOS_WAKEUP_TYPES",
" \0"
"Other\0"
"Unknown\0"
"APM Timer\0"
"Modem Ring\0"
"LAN Remote\0"
"Power Switch\0"
"PCI PME#\0"
"AC Power Restored");
//Section 7.3.1 line 972 (baseboard feature flags)
DefineListLoad("ST_SMBIOS_BASEBOARD_FLAGS",
"Hosting Board (Motherboard)\0"
"Requires Auxilary Board\0"
"Removable\0"
"Replaceable\0"
"Hot Swappable");
//Section 7.3.2 line 977 (baseboard board types)
DefineListLoad("ST_SMBIOS_BASEBOARD_TYPES",
" \0"
"Unknown\0"
"Other\0"
"Server Blade\0"
"Connectivity Switch\0"
"System Management Module\0"
"Processor Module\0"
"I/O Module\0"
"Daughterboard\0"
"Motherboard\0"
"Processor/Memory Module\0"
"Processor/IO Module\0"
"Interconnect Board\0");
//Section 7.4.1 line 988 (system enclosure types)
DefineListLoad("ST_SMBIOS_ENCLOSURE_TYPES",
" \0"
"Other\0"
"Unknown\0"
"Desktop\0"
"Low Profile Desktop\0"
"Pizza Box\0"
"Mini Tower\0"
"Tower\0"
"Portable\0"
"Laptop\0"
"Notebook\0"
"Hand Held\0"
"Docking Station\0"
"All-in-One\0"
"Sub Notebook\0"
"Space-saving\0"
"Lunch box\0"
"Main Server Chassis\0"
"Expansion Chassis\0"
"SubChassis\0"
"Bus Expansion Chassis\0"
"Peripheral Chassis\0"
"RAID Chassis\0"
"Rack Mount Chassis\0"
"Sealed-case PC\0"
"Multi-system Chassis\0"
"Compact PCI\0"
"Advanced TCA\0"
"Blade\0"
"Blade Enclosure\0"
"Tablet\0"
"Convertible\0"
"Detachable\0"
"IoT Gateway\0"
"Embedded PC\0"
"Mini PC\0"
"Stick PC");
//Section 7.4.2 line 991 (enclosure states)
DefineListLoad("ST_SMBIOS_ENCLOSURE_STATES",
" \0"
"Other\0"
"Unknown\0"
"Safe\0"
"Warning\0"
"Critical\0"
"Non-Recoverable");
//Section 7.4.3 line 994 (enclosure security status field)
DefineListLoad("ST_SMBIOS_ENCLOSURE_SECURITY_STATUSES",
" \0"
"Other\0"
"Unknown\0"
"None\0"
"External Interface Locked Out\0"
"External Interface Enabled");
//Section 7.5.1 line 1014 (processor type field)
DefineListLoad("ST_SMBIOS_PROCESSOR_TYPES",
" \0"
"Other\0"
"Unknown\0"
"Central Processor\0"
"Math Processor\0"
"DSP Processor\0"
"Video Processor");
//Section 7.5.4 line 1050 (processor voltage field)
DefineListLoad("ST_SMBIOS_PROCESSOR_VOLTAGE_LEVELS",
"5V\0"
"3.3V\0"
"2.9V");
DefineListLoad("ST_CPUID_1_EDX_FLAGS",
"x87 FPU\0"
"Virtual 8086 Mode Enhancements\0"
"Debugging Extensions\0"
"Page Size Extensions\0"
"Time Stamp Counter\0"
"MSRs\0"
"Page Address Extension\0"
"Machine Check Exceptions\0"
"CMPXCHG8B\0"
"APIC\0"
" \0"
"SYSENTER/SYSEXIT\0"
"Memory Type Range Registers\0"
"Page Global Bit\0"
"Machine Check Architecture\0"
"CMOV Instructions\0"
"Page Attribute Table\0"
"36 Bit Page Size Extension\0"
"Processor Serial Number\0"
"CLFLUSH\0"
" \0"
"Debug Store\0"
"ACPI\0"
"MMX\0"
"FXSAVE/FXRSTOR\0"
"SSE\0"
"SSE2\0"
"Self Snoop\0"
"HTT\0"
"Thermal Monitor\0"
" \0"
"Pending Break Enable\0");
DefineListLoad("ST_CPUID_1_ECX_FLAGS",
"SSE3\0"
"PCLMULQDQ\0"
"64 bit DS AREA\0"
"MONITOR/MWAIT\0"
"CPL Qualified Debug Store\0"
"Virtual Machine Extensions\0"
"Safer Mode Extensions\0"
" \0"
"Thermal Monitor 2\0"
"SSSE3\0"
"L1 Context ID\0"
"IA32_DEBUG_INTERFACE\0"
"FMA Extensions\0"
"CMPXCHG16B\0"
"xTPR Update Control\0"
"Perfmon and Debug Capability\0"
" \0"
"Process Context Identifiers\0"
"MMIO Prefetch\0"
"SSE4.1\0"
"SSE4.2\0"
"x2APIC\0"
"MOVBE\0"
"POPCNT\0"
"TSC Deadline\0"
"AESNI\0"
"XSAVE\0"
"OSXSAVE\0"
"AVX\0"
"F16C\0"
"RDRAND");
//Section 7.5.5 line 1058 (upgrade field)
DefineListLoad("ST_SMBIOS_PROCESSOR_UPGRADES",
" \0"
"Other\0"
"Unknown\0"
"Daughterboard\0"
"ZIF Socket\0"
"Replacable Piggy Back\0"
"None\0"
"LIF Socket\0"
"Slot 1\0"
"Slot2\0"
"370-pin Socket\0"
"Slot A\0"
"Slot M\0"
"Socket 423\0"
"Socket A (Socket 462)\0"
"Socket 478\0"
"754\0"
"940\0"
"939\0"
"mPGA604\0"
"LGA771\0"
"LGA775\0"
"S1\0"
"AM2\0"
"F (1207)\0"
"LGA1366\0"
"G34\0"
"AM3\0"
"C32\0"
"LGA1156\0"
"LGA1567\0"
"PGA988A\0"
"BGA1288\0"
"rPGA988B\0"
"BGA1023\0"
"BGA1224\0"
"LGA1155\0"
"LGA1356\0"
"LGA2011\0"
"FS1\0"
"FS2\0"
"FM1\FM2\0"
"LGA2011-3\0"
"LGA1356-3\0"
"LGA1150\0"
"BGA1168\0"
"BGA1234\BGA1364\0"
"AM4\0"
"LGA1151\0"
"BGA1440\0"
"BGA1515\0"
"LGA3647-1\0"
"SP3\0"
"SP3r2\0"
"LGA2066\0"
"BGA1932\0"
"BGA1510\0"
"BGA1528");
//Section 7.5.9 line 1110 (processor characteristics)
DefineListLoad("ST_SMBIOS_PROCESSOR_FLAGS",
" \0"
" \0"
"64 Bit\0"
"Multicore\0"
"HyperThreading\0"
"NX/XD Protection\0"
"Enhanced Virtualization\0"
"Power/Performance Control\0"
"128 Bit Capable");
//Section 7.8.2 line 1178 (cache information SRAM type field)
DefineListLoad("ST_SMBIOS_CACHE_SRAM_TYPES",
"Other\0"
"Unknown\0"
"Non-Burst\0"
"Burst\0"
"Pipeline Burst\0"
"Synchronous\0"
"Asynchronous");
//Section 7.8.6 line 1193 (cache information associativity field)
DefineListLoad("ST_SMBIOS_CACHE_ASSOCIATIVITY",
" \0"
"Other\0"
"Unknown\0"
"Direct Mapped\0"
"2-way Set-Associative\0"
"4-way Set-Associative\0"
"Fully Associative\0"
"8-way Set-Associative\0"
"16-way Set-Associative\0"
"12-way Set-Associative\0"
"24-way Set-Associative\0"
"32-way Set-Associative\0"
"48-way Set-Associative\0"
"64-way Set-Associative\0"
"20-way Set-Associative");
//Section 7.9.2 line 1219 (connector type field)
DefineListLoad("ST_SMBIOS_CONNECTOR_TYPES",
"None\0"
"Centronics\0"
"Mini Centronics\0"
"Proprietary\0"
"DB-25 Pin Male\0"
"DB-25 Pin Female\0"
"DB-15 Pin Male\0"
"DB-15 Pin Female\0"
"DB-9 Pin Male\0"
"DB-9 Pin Female\0"
"RJ-11\0"
"RJ-45\0"
"50-Pin MiniSCSI\0"
"Mini-DIN\0"
"Micro-DIN\0"
"PS/2\0"
"Infrared\0"
"HP-HIL\0"
"Access Bus (USB)\0"
"SSA SCSI\0"
"Circular DIN-8 Male\0"
"Circular DIN-8 Female\0"
"Onboard IDE\0"
"Onboard Floppy\0"
"9-Pin Dual Inline (Pin 10 Cut)\0"
"25-Pin Dual Inline (Pin 26 Cut)\0"
"50-Pin Dual Inline\0"
"68-Pin Dual Inline\0"
"Onboard CD-ROM Sound Input\0"
"Mini-Centronics Type-14\0"
"Mini-Centronics Type-26\0"
"Mini-Jack (Headphones)\0"
"BNC\0"
"1394\0"
"SAS\SATA Plug\0"
"USB Type-C");
//Section 7.9.3 line 1222 (port type field)
DefineListLoad("ST_SMBIOS_PORT_TYPES",
"None\0"
"Parallel Port XT/AT Compatible\0"
"Parallel Port PS/2\0"
"Parallel Port ECP\0"
"Parallel Port EPP\0"
"Parallel Port ECP/EPP\0"
"Serial Port XT/AT Compatible\0"
"Serial Port 16450 Compatible\0"
"Serial Port 16550 Compatible\0"
"Serial Port 16550A Compatible\0"
"SCSI Port\0"
"MIDI Port\0"
"Joystick Port\0"
"Keyboard Port\0"
"Mouse Port\0"
"SSA SCSI\0"
"USB\0"
"FireWire (IEEE 1394)\0"
"PCMCIA Type I\0"
"PCMCIA Type II\0"
"PCMCIA Type III\0"
"Cardbus\0"
"Access Bus Port\0"
"SCSI II\0"
"SCSI Wide\0"
" \0"
" \0"
" \0"
"Video Port\0"
"Audio Port\0"
"Modem Port\0"
"Network Port\0"
"SATA\0"
"SAS\0"
"MFDP (Multi-Function Display Port\0"
"Thunderbolt\0"
"8251 Compatible\0"
"8251 FIFO Compatible");
//Section 7.10.1 line 1229 (slot type)
DefineListLoad("ST_SMBIOS_SLOT_TYPES1",
" \0"
"Other\0"
"Unknown\0"
"ISA\0"
"MCA\0"
"EISA\0"
"PCI\0"
"PC Card (PCMCIA)\0"
"VESA Local Bus\0"
"Proprietary\0"
"Proprietary Card Slot\0"
"Proprietary Memory Card Slot\0"
"I/O Riser Card Slot\0"
"NuBus\0"
"PCI - 66 MHz Capable\0"
"AGP\0"
"AGP 2X\0"
"AGP 4X\0"
"PCI-X\0"
"AGP 8X\0"
"M.2 Socket 1-DP (Mechanical Key A)\0"
"M.2 Socket 1-SD (Mechanical Key E)\0"
"M.2 Socket 2 (Mechanical Key B)\0"
"M.2 Socket 3 (Mechanical Key M)\0"
"MXM Type I\0"
"MXM Type II\0"
"MXM Type III (Standard Connector)\0"
"MXM Type III (HE Connector)\0"
"MXM Type IV\0"
"MXM 3.0 Type A\0"
"MXM 3.0 Type B\0"
"PCI Express Gen 2 SFF-8639\0"
"PCI Express Gen 3 SFF-8639\0"
"PCI Express Mini 52-Pin with bottom-side keep-outs\0"
"PCI Express Mini 52-Pin without bottom-side keep-outs\0"
"PCI Express Mini 76-Pin\0"
"CXL Flexbus 1.0");
DefineListLoad("ST_SMBIOS_SLOT_TYPES2",
" \0"
" \0"
" \0"
" \0"
" \0"
"PCI Express\0"
"PCI Express 1x\0"
"PCI Express 2x\0"
"PCI Express 4x\0"
"PCI Express 8x\0"
"PCI Express 16x\0"
"PCI Express Gen 2\0"
"PCI Express Gen 2 1x\0"
"PCI Express Gen 2 2x\0"
"PCI Express Gen 2 4x\0"
"PCI Express Gen 2 8x\0"
"PCI Express Gen 2 16x\0"
"PCI Express Gen 3\0"
"PCI Express Gen 3 1x\0"
"PCI Express Gen 3 2x\0"
"PCI Express Gen 3 4x\0"
"PCI Express Gen 3 8x\0"
"PCI Express Gen 3 16x\0"
"PCI Express Gen 4\0"
"PCI Express Gen 4 1x\0"
"PCI Express Gen 4 2x\0"
"PCI Express Gen 4 4x\0"
"PCI Express Gen 4 8x\0"
"PCI Express Gen 4 16x");
//Section 7.10.2 line 1244 (slot data bus width field)
DefineListLoad("ST_SMBIOS_SLOT_DATA_BUS_WIDTHS",
" \0"
"Other\0"
"Unknown\0"
"8 Bit\0"
"16 Bit\0"
"32 Bit\0"
"64 Bit\0"
"128 Bit\0"
"1x\0"
"2x\0"
"4x\0"
"8x\0"
"12x\0"
"16x\0"
"32x");
//Section 7.10.6 line 1259 (slot characteristics 1 field)
DefineListLoad("ST_SMBIOS_SLOT_FLAGS1",
" \0"
"5.0 V\0"
"3.3 V\0"
"Shared Slot Opening\0"
"PC Card 16\0"
"CardBus\0"
"Zoom Video\0"
"Modem Ring Resume");
//Section 7.10.7 line 1262 (slot characteristics 2 field)
DefineListLoad("ST_SMBIOS_SLOT_FLAGS2",
"PCI Power Management Event (PME#) Signal\0"
"HotPlug\0"
"SMBus\0"
"Bifurcation");
//Section 7.17.1 line 1523 (memory array location field)
DefineListLoad("ST_SMBIOS_PHYMEM_LOCATIONS",
" \0"
"Other\0"
"Unknown\0"
"Motherboard\0"
"ISA Add-On Card\0"
"EISA Add-On Card\0"
"PCI Add-On Card\0"
"MCA Add-On Card\0"
"PCMCIA Add-On Card\0"
"Proprietary Add-On Card\0"
"NuBus\0"
" \0"
" \0"
" \0"
" \0"
" \0");
//Section 7.17.2 line 1527 (memory array use field)
DefineListLoad("ST_SMBIOS_PHYMEM_USES",
" \0"
"Other\0"
"Unknown\0"
"System Memory\0"
"Video Memory\0"
"Flash Memory\0"
"Non-Volatile RAM\0"
"Cache Memory");
//Section 7.18.1 line 1542 (form factor field)
DefineListLoad("ST_SMBIOS_MEMDEV_FORM_FACTORS",
" \0"
"Other\0"
"Unknown\0"
"SIMM\0"
"SIP\0"
"DIP\0"
"ZIP\0"
"Proprietary Card\0"
"DIMM\0"
"TSOP\0"
"Row of Chips\0"
"RIMM\0"
"SODIMM\0"
"SRIMM\0"
"FB-DIMM\0"
"Die");
//Section 7.18.2 line 1546 (type field)
DefineListLoad("ST_SMBIOS_MEMDEV_TYPES",
" \0"
"Unknown\0"
"DRAM\0"
"EDRAM\0"
"VRAM\0"
"SRAM\0"
"RAM\0"
"ROM\0"
"FLASH\0"
"EEPROM\0"
"FEPROM\0"
"EPROM\0"
"CDRAM\0"
"3DRAM\0"
"SDRAM\0"
"SGRAM\0"
"RDRAM\0"
"DDR\0"
"DDR2\0"
"DDR2 FB-DIMM\0"
" \0"
" \0"
" \0"
"DDR3\0"
"FBD2\0"
"DDR4\0"
"LPDDR\0"
"LPDDR2\0"
"LPDDR3\0"
"LPDDR4\0"
"Logical Non-Volatile Device\0"
"HBM (High Bandwidth Memory)\0"
"HBM2 (High Bandwidth Memory Gen 2)");
//Section 7.18.3 line 1550 (type detail field)
DefineListLoad("ST_SMBIOS_MEMDEV_TYPE_DETAILS",
" \0"
" \0"
" \0"
"Fast Paged\0"
"Static Column\0"
"Psuedo Static\0"
"RAMBUS\0"
"Synchronous\0"
"CMOS\0"
"EDO\0"
"Window DRAM\0"
"Cache DRAM\0"
"Non Volatile\0"
"Registered (Buffered)\0"
"Unregistered (Unbuffered)\0"
"LRDIMM");
} }
U8 *Color2Str(U8 *buf, CColorROPU32 c) U8 *Color2Str(U8 *buf, CColorROPU32 c)

1
src/Kernel/Kernel.PRJ
View file

@ -56,6 +56,7 @@
#include "EdLite" #include "EdLite"
#include "BlkDev/MakeBlkDev" #include "BlkDev/MakeBlkDev"
#include "FunSeg" #include "FunSeg"
#include "SMBIOS"
#include "KMain" #include "KMain"
#exe {KConfigDel(kernel_config);}; #exe {KConfigDel(kernel_config);};

7
src/Kernel/KernelC.HH
View file

@ -637,9 +637,14 @@ public extern I64 IntEntryAlloc();
public extern I64 IntEntryFree(I64 irq); public extern I64 IntEntryFree(I64 irq);
#help_index "ScreenCast;Cmd Line (Typically)" #help_index "ScreenCast;Cmd Line (Typically)"
public extern Bool ScreenCast(Bool val=ON, Bool just_audio=FALSE, U8 *print_format="B:/Tmp/%X.GR") public extern Bool ScreenCast(Bool val=ON, Bool just_audio=FALSE, U8 *print_format="B:/Tmp/%X.GR");
public extern CScreenCastGlobals screencast; public extern CScreenCastGlobals screencast;
#help_index "SMBIOS"
extern Bool SMBIOSEntryScan(CSMBIOSEntryPoint **entry);
extern U8 *SMBIOSStr(CSMBIOSHeader *header, I64 str_num, U8 *default="None");
extern CSMBIOSHeader *SMBIOSStructGet(I64 type=0xFFFFF, I64 handle=0xFFFFF, CSMBIOSHeader *head=NULL);
#help_index "Sound" #help_index "Sound"
#help_file "::/Doc/Sound" #help_file "::/Doc/Sound"
public extern U0 Beep(I8 ona=62, Bool busy=FALSE); public extern U0 Beep(I8 ona=62, Bool busy=FALSE);

75
src/Kernel/SMBIOS.ZC Executable file
View file

@ -0,0 +1,75 @@
//SMBIOS parsing.
//See $LK+PU,"KDefine.ZC",A="FF:::/Kernel/KDefine.ZC,SMBIOS"$.
//Based on SMBIOS specification 3.3.0 (document "DSP0134")
Bool SMBIOSEntryScan(CSMBIOSEntryPoint **entry)
{//Search 0xF0000 - 0x100000 for SMBIOS Entry Point structure.
I64 i;
U8 noreg checksum = 0, *mem = 0xF0000;
if (sys_smbios_entry)
{
*entry = sys_smbios_entry;
return TRUE;
}
do
{
if (!MemCompare(mem, "_SM_", 4))
{
*entry = mem;
for (i = 0; i < (*entry)->length; i++)
checksum += mem[i];
if (checksum == 0) //valid checksums sum to zero
break;
}
}
while ((mem += 16) < 0x100000); //anchor sits on 16-byte boundary
return mem != 0x100000;
}
U8 *SMBIOSStr(CSMBIOSHeader *header, I64 str_num, U8 *default="None")
{//Get string str_num from end of structure (string section).
I64 i;
U8* ptr = header(U8 *) + header->length;
if (!str_num)
return default;
for (i = 1; i < str_num; i++)
{
while (*ptr++);
if (!ptr[0] && !ptr[1]) //structure ends in double NULL
return default;
}
return ptr;
}
CSMBIOSHeader *SMBIOSStructGet(I64 type=0xFFFFF, I64 handle=0xFFFFF, CSMBIOSHeader *head=NULL)
{//Search for struct with type or handle. Return NULL if not found.
I64 i;
CSMBIOSEntryPoint *entry;
if (!head)
{
if (!SMBIOSEntryScan(&entry))
return NULL;
head = entry->table_address;
}
while (head->type != 127)
{
if (head->handle == handle)
return head;
if (head->type == type)
return head;
head = head(U8 *) + head->length;
for (i = 1; head(U8 *)[i - 1] || head(U8 *)[i]; i++);
head = head(U8 *) + i + 1;
}
return NULL;
}

746
src/System/Utils/SysRep.ZC
View file

@ -1,732 +1,3 @@
//SMBIOS parsing.
//Based on SMBIOS specification 3.3.0 (document "DSP0134")
U0 SMBIOSInit()
{
//Section 7.1.1 line 925 (BIOS characteristics)
DefineListLoad("ST_SMBIOS_BIOS_FLAGS",
" \0"
" \0"
" \0"
" \0"
"ISA\0"
"MCA\0"
"EISA\0"
"PCI\0"
"PC Card\0"
"Plug and Play\0"
"APM\0"
"Flashable BIOS\0"
"BIOS shadowing\0"
"VESA Local Bus\0"
"ESCD\0"
"CD Boot\0"
"Selectable boot\0"
"BIOS ROM socketed\0"
"PC Card Boot\0"
"Enhanced Disk Drive Services\0"
" \0"
" \0"
"INT 0x13 5.25\"/360 KB Floppy Support\0"
"INT 0x13 5.25\"/1.2 MB Floppy Support\0"
"INT 0x13 3.5\"/720 KB Floppy Support\0"
"INT 0x13 3.5\"/2.88 MB Floppy Support\0"
"INT 0x05 Screen Printing\0"
"INT 0x09 8042 Keyboard\0"
"INT 0x14 Serial\0"
"INT 0x17 Printer\0"
"INT 0x10 CGA/Mono Video");
//Section 7.1.2.1 line 931 (BIOS characteristics extension byte 1)
DefineListLoad("ST_SMBIOS_BIOS_FLAGSEXT1",
"ACPI\0"
"USB Legacy\0"
" \0"
" \0"
" \0"
" \0"
"Serial Boot\0"
"Smart Battery");
//Section 7.1.2.2 line 935 (BIOS characteristics extension byte 2)
DefineListLoad("ST_SMBIOS_BIOS_FLAGSEXT2",
"BIOS Boot\0"
"Network Boot\0"
"Targeted Content Distribution\0"
"UEFI\0"
"Virtual Machine");
//Section 7.2.2 line 959 (system wakeup types)
DefineListLoad("ST_SMBIOS_WAKEUP_TYPES",
" \0"
"Other\0"
"Unknown\0"
"APM Timer\0"
"Modem Ring\0"
"LAN Remote\0"
"Power Switch\0"
"PCI PME#\0"
"AC Power Restored");
//Section 7.3.1 line 972 (baseboard feature flags)
DefineListLoad("ST_SMBIOS_BASEBOARD_FLAGS",
"Hosting Board (Motherboard)\0"
"Requires Auxilary Board\0"
"Removable\0"
"Replaceable\0"
"Hot Swappable");
//Section 7.3.2 line 977 (baseboard board types)
DefineListLoad("ST_SMBIOS_BASEBOARD_TYPES",
" \0"
"Unknown\0"
"Other\0"
"Server Blade\0"
"Connectivity Switch\0"
"System Management Module\0"
"Processor Module\0"
"I/O Module\0"
"Daughterboard\0"
"Motherboard\0"
"Processor/Memory Module\0"
"Processor/IO Module\0"
"Interconnect Board\0");
//Section 7.4.1 line 988 (system enclosure types)
DefineListLoad("ST_SMBIOS_ENCLOSURE_TYPES",
" \0"
"Other\0"
"Unknown\0"
"Desktop\0"
"Low Profile Desktop\0"
"Pizza Box\0"
"Mini Tower\0"
"Tower\0"
"Portable\0"
"Laptop\0"
"Notebook\0"
"Hand Held\0"
"Docking Station\0"
"All-in-One\0"
"Sub Notebook\0"
"Space-saving\0"
"Lunch box\0"
"Main Server Chassis\0"
"Expansion Chassis\0"
"SubChassis\0"
"Bus Expansion Chassis\0"
"Peripheral Chassis\0"
"RAID Chassis\0"
"Rack Mount Chassis\0"
"Sealed-case PC\0"
"Multi-system Chassis\0"
"Compact PCI\0"
"Advanced TCA\0"
"Blade\0"
"Blade Enclosure\0"
"Tablet\0"
"Convertible\0"
"Detachable\0"
"IoT Gateway\0"
"Embedded PC\0"
"Mini PC\0"
"Stick PC");
//Section 7.4.2 line 991 (enclosure states)
DefineListLoad("ST_SMBIOS_ENCLOSURE_STATES",
" \0"
"Other\0"
"Unknown\0"
"Safe\0"
"Warning\0"
"Critical\0"
"Non-Recoverable");
//Section 7.4.3 line 994 (enclosure security status field)
DefineListLoad("ST_SMBIOS_ENCLOSURE_SECURITY_STATUSES",
" \0"
"Other\0"
"Unknown\0"
"None\0"
"External Interface Locked Out\0"
"External Interface Enabled");
//Section 7.5.1 line 1014 (processor type field)
DefineListLoad("ST_SMBIOS_PROCESSOR_TYPES",
" \0"
"Other\0"
"Unknown\0"
"Central Processor\0"
"Math Processor\0"
"DSP Processor\0"
"Video Processor");
//Section 7.5.4 line 1050 (processor voltage field)
DefineListLoad("ST_SMBIOS_PROCESSOR_VOLTAGE_LEVELS",
"5V\0"
"3.3V\0"
"2.9V");
DefineListLoad("ST_CPUID_1_EDX_FLAGS",
"x87 FPU\0"
"Virtual 8086 Mode Enhancements\0"
"Debugging Extensions\0"
"Page Size Extensions\0"
"Time Stamp Counter\0"
"MSRs\0"
"Page Address Extension\0"
"Machine Check Exceptions\0"
"CMPXCHG8B\0"
"APIC\0"
" \0"
"SYSENTER/SYSEXIT\0"
"Memory Type Range Registers\0"
"Page Global Bit\0"
"Machine Check Architecture\0"
"CMOV Instructions\0"
"Page Attribute Table\0"
"36 Bit Page Size Extension\0"
"Processor Serial Number\0"
"CLFLUSH\0"
" \0"
"Debug Store\0"
"ACPI\0"
"MMX\0"
"FXSAVE/FXRSTOR\0"
"SSE\0"
"SSE2\0"
"Self Snoop\0"
"HTT\0"
"Thermal Monitor\0"
" \0"
"Pending Break Enable\0");
DefineListLoad("ST_CPUID_1_ECX_FLAGS",
"SSE3\0"
"PCLMULQDQ\0"
"64 bit DS AREA\0"
"MONITOR/MWAIT\0"
"CPL Qualified Debug Store\0"
"Virtual Machine Extensions\0"
"Safer Mode Extensions\0"
" \0"
"Thermal Monitor 2\0"
"SSSE3\0"
"L1 Context ID\0"
"IA32_DEBUG_INTERFACE\0"
"FMA Extensions\0"
"CMPXCHG16B\0"
"xTPR Update Control\0"
"Perfmon and Debug Capability\0"
" \0"
"Process Context Identifiers\0"
"MMIO Prefetch\0"
"SSE4.1\0"
"SSE4.2\0"
"x2APIC\0"
"MOVBE\0"
"POPCNT\0"
"TSC Deadline\0"
"AESNI\0"
"XSAVE\0"
"OSXSAVE\0"
"AVX\0"
"F16C\0"
"RDRAND");
//Section 7.5.5 line 1058 (upgrade field)
DefineListLoad("ST_SMBIOS_PROCESSOR_UPGRADES",
" \0"
"Other\0"
"Unknown\0"
"Daughterboard\0"
"ZIF Socket\0"
"Replacable Piggy Back\0"
"None\0"
"LIF Socket\0"
"Slot 1\0"
"Slot2\0"
"370-pin Socket\0"
"Slot A\0"
"Slot M\0"
"Socket 423\0"
"Socket A (Socket 462)\0"
"Socket 478\0"
"754\0"
"940\0"
"939\0"
"mPGA604\0"
"LGA771\0"
"LGA775\0"
"S1\0"
"AM2\0"
"F (1207)\0"
"LGA1366\0"
"G34\0"
"AM3\0"
"C32\0"
"LGA1156\0"
"LGA1567\0"
"PGA988A\0"
"BGA1288\0"
"rPGA988B\0"
"BGA1023\0"
"BGA1224\0"
"LGA1155\0"
"LGA1356\0"
"LGA2011\0"
"FS1\0"
"FS2\0"
"FM1\FM2\0"
"LGA2011-3\0"
"LGA1356-3\0"
"LGA1150\0"
"BGA1168\0"
"BGA1234\BGA1364\0"
"AM4\0"
"LGA1151\0"
"BGA1440\0"
"BGA1515\0"
"LGA3647-1\0"
"SP3\0"
"SP3r2\0"
"LGA2066\0"
"BGA1932\0"
"BGA1510\0"
"BGA1528");
//Section 7.5.9 line 1110 (processor characteristics)
DefineListLoad("ST_SMBIOS_PROCESSOR_FLAGS",
" \0"
" \0"
"64 Bit\0"
"Multicore\0"
"HyperThreading\0"
"NX/XD Protection\0"
"Enhanced Virtualization\0"
"Power/Performance Control\0"
"128 Bit Capable");
//Section 7.8.2 line 1178 (cache information SRAM type field)
DefineListLoad("ST_SMBIOS_CACHE_SRAM_TYPES",
"Other\0"
"Unknown\0"
"Non-Burst\0"
"Burst\0"
"Pipeline Burst\0"
"Synchronous\0"
"Asynchronous");
//Section 7.8.6 line 1193 (cache information associativity field)
DefineListLoad("ST_SMBIOS_CACHE_ASSOCIATIVITY",
" \0"
"Other\0"
"Unknown\0"
"Direct Mapped\0"
"2-way Set-Associative\0"
"4-way Set-Associative\0"
"Fully Associative\0"
"8-way Set-Associative\0"
"16-way Set-Associative\0"
"12-way Set-Associative\0"
"24-way Set-Associative\0"
"32-way Set-Associative\0"
"48-way Set-Associative\0"
"64-way Set-Associative\0"
"20-way Set-Associative");
//Section 7.9.2 line 1219 (connector type field)
DefineListLoad("ST_SMBIOS_CONNECTOR_TYPES",
"None\0"
"Centronics\0"
"Mini Centronics\0"
"Proprietary\0"
"DB-25 Pin Male\0"
"DB-25 Pin Female\0"
"DB-15 Pin Male\0"
"DB-15 Pin Female\0"
"DB-9 Pin Male\0"
"DB-9 Pin Female\0"
"RJ-11\0"
"RJ-45\0"
"50-Pin MiniSCSI\0"
"Mini-DIN\0"
"Micro-DIN\0"
"PS/2\0"
"Infrared\0"
"HP-HIL\0"
"Access Bus (USB)\0"
"SSA SCSI\0"
"Circular DIN-8 Male\0"
"Circular DIN-8 Female\0"
"Onboard IDE\0"
"Onboard Floppy\0"
"9-Pin Dual Inline (Pin 10 Cut)\0"
"25-Pin Dual Inline (Pin 26 Cut)\0"
"50-Pin Dual Inline\0"
"68-Pin Dual Inline\0"
"Onboard CD-ROM Sound Input\0"
"Mini-Centronics Type-14\0"
"Mini-Centronics Type-26\0"
"Mini-Jack (Headphones)\0"
"BNC\0"
"1394\0"
"SAS\SATA Plug\0"
"USB Type-C");
//Section 7.9.3 line 1222 (port type field)
DefineListLoad("ST_SMBIOS_PORT_TYPES",
"None\0"
"Parallel Port XT/AT Compatible\0"
"Parallel Port PS/2\0"
"Parallel Port ECP\0"
"Parallel Port EPP\0"
"Parallel Port ECP/EPP\0"
"Serial Port XT/AT Compatible\0"
"Serial Port 16450 Compatible\0"
"Serial Port 16550 Compatible\0"
"Serial Port 16550A Compatible\0"
"SCSI Port\0"
"MIDI Port\0"
"Joystick Port\0"
"Keyboard Port\0"
"Mouse Port\0"
"SSA SCSI\0"
"USB\0"
"FireWire (IEEE 1394)\0"
"PCMCIA Type I\0"
"PCMCIA Type II\0"
"PCMCIA Type III\0"
"Cardbus\0"
"Access Bus Port\0"
"SCSI II\0"
"SCSI Wide\0"
" \0"
" \0"
" \0"
"Video Port\0"
"Audio Port\0"
"Modem Port\0"
"Network Port\0"
"SATA\0"
"SAS\0"
"MFDP (Multi-Function Display Port\0"
"Thunderbolt\0"
"8251 Compatible\0"
"8251 FIFO Compatible");
//Section 7.10.1 line 1229 (slot type)
DefineListLoad("ST_SMBIOS_SLOT_TYPES1",
" \0"
"Other\0"
"Unknown\0"
"ISA\0"
"MCA\0"
"EISA\0"
"PCI\0"
"PC Card (PCMCIA)\0"
"VESA Local Bus\0"
"Proprietary\0"
"Proprietary Card Slot\0"
"Proprietary Memory Card Slot\0"
"I/O Riser Card Slot\0"
"NuBus\0"
"PCI - 66 MHz Capable\0"
"AGP\0"
"AGP 2X\0"
"AGP 4X\0"
"PCI-X\0"
"AGP 8X\0"
"M.2 Socket 1-DP (Mechanical Key A)\0"
"M.2 Socket 1-SD (Mechanical Key E)\0"
"M.2 Socket 2 (Mechanical Key B)\0"
"M.2 Socket 3 (Mechanical Key M)\0"
"MXM Type I\0"
"MXM Type II\0"
"MXM Type III (Standard Connector)\0"
"MXM Type III (HE Connector)\0"
"MXM Type IV\0"
"MXM 3.0 Type A\0"
"MXM 3.0 Type B\0"
"PCI Express Gen 2 SFF-8639\0"
"PCI Express Gen 3 SFF-8639\0"
"PCI Express Mini 52-Pin with bottom-side keep-outs\0"
"PCI Express Mini 52-Pin without bottom-side keep-outs\0"
"PCI Express Mini 76-Pin\0"
"CXL Flexbus 1.0");
DefineListLoad("ST_SMBIOS_SLOT_TYPES2",
" \0"
" \0"
" \0"
" \0"
" \0"
"PCI Express\0"
"PCI Express 1x\0"
"PCI Express 2x\0"
"PCI Express 4x\0"
"PCI Express 8x\0"
"PCI Express 16x\0"
"PCI Express Gen 2\0"
"PCI Express Gen 2 1x\0"
"PCI Express Gen 2 2x\0"
"PCI Express Gen 2 4x\0"
"PCI Express Gen 2 8x\0"
"PCI Express Gen 2 16x\0"
"PCI Express Gen 3\0"
"PCI Express Gen 3 1x\0"
"PCI Express Gen 3 2x\0"
"PCI Express Gen 3 4x\0"
"PCI Express Gen 3 8x\0"
"PCI Express Gen 3 16x\0"
"PCI Express Gen 4\0"
"PCI Express Gen 4 1x\0"
"PCI Express Gen 4 2x\0"
"PCI Express Gen 4 4x\0"
"PCI Express Gen 4 8x\0"
"PCI Express Gen 4 16x");
//Section 7.10.2 line 1244 (slot data bus width field)
DefineListLoad("ST_SMBIOS_SLOT_DATA_BUS_WIDTHS",
" \0"
"Other\0"
"Unknown\0"
"8 Bit\0"
"16 Bit\0"
"32 Bit\0"
"64 Bit\0"
"128 Bit\0"
"1x\0"
"2x\0"
"4x\0"
"8x\0"
"12x\0"
"16x\0"
"32x");
//Section 7.10.6 line 1259 (slot characteristics 1 field)
DefineListLoad("ST_SMBIOS_SLOT_FLAGS1",
" \0"
"5.0 V\0"
"3.3 V\0"
"Shared Slot Opening\0"
"PC Card 16\0"
"CardBus\0"
"Zoom Video\0"
"Modem Ring Resume");
//Section 7.10.7 line 1262 (slot characteristics 2 field)
DefineListLoad("ST_SMBIOS_SLOT_FLAGS2",
"PCI Power Management Event (PME#) Signal\0"
"HotPlug\0"
"SMBus\0"
"Bifurcation");
//Section 7.17.1 line 1523 (memory array location field)
DefineListLoad("ST_SMBIOS_PHYMEM_LOCATIONS",
" \0"
"Other\0"
"Unknown\0"
"Motherboard\0"
"ISA Add-On Card\0"
"EISA Add-On Card\0"
"PCI Add-On Card\0"
"MCA Add-On Card\0"
"PCMCIA Add-On Card\0"
"Proprietary Add-On Card\0"
"NuBus\0"
" \0"
" \0"
" \0"
" \0"
" \0");
//Section 7.17.2 line 1527 (memory array use field)
DefineListLoad("ST_SMBIOS_PHYMEM_USES",
" \0"
"Other\0"
"Unknown\0"
"System Memory\0"
"Video Memory\0"
"Flash Memory\0"
"Non-Volatile RAM\0"
"Cache Memory");
//Section 7.18.1 line 1542 (form factor field)
DefineListLoad("ST_SMBIOS_MEMDEV_FORM_FACTORS",
" \0"
"Other\0"
"Unknown\0"
"SIMM\0"
"SIP\0"
"DIP\0"
"ZIP\0"
"Proprietary Card\0"
"DIMM\0"
"TSOP\0"
"Row of Chips\0"
"RIMM\0"
"SODIMM\0"
"SRIMM\0"
"FB-DIMM\0"
"Die");
//Section 7.18.2 line 1546 (type field)
DefineListLoad("ST_SMBIOS_MEMDEV_TYPES",
" \0"
"Unknown\0"
"DRAM\0"
"EDRAM\0"
"VRAM\0"
"SRAM\0"
"RAM\0"
"ROM\0"
"FLASH\0"
"EEPROM\0"
"FEPROM\0"
"EPROM\0"
"CDRAM\0"
"3DRAM\0"
"SDRAM\0"
"SGRAM\0"
"RDRAM\0"
"DDR\0"
"DDR2\0"
"DDR2 FB-DIMM\0"
" \0"
" \0"
" \0"
"DDR3\0"
"FBD2\0"
"DDR4\0"
"LPDDR\0"
"LPDDR2\0"
"LPDDR3\0"
"LPDDR4\0"
"Logical Non-Volatile Device\0"
"HBM (High Bandwidth Memory)\0"
"HBM2 (High Bandwidth Memory Gen 2)");
//Section 7.18.3 line 1550 (type detail field)
DefineListLoad("ST_SMBIOS_MEMDEV_TYPE_DETAILS",
" \0"
" \0"
" \0"
"Fast Paged\0"
"Static Column\0"
"Psuedo Static\0"
"RAMBUS\0"
"Synchronous\0"
"CMOS\0"
"EDO\0"
"Window DRAM\0"
"Cache DRAM\0"
"Non Volatile\0"
"Registered (Buffered)\0"
"Unregistered (Unbuffered)\0"
"LRDIMM");
} SMBIOSInit;
Bool SMBIOSEntryScan(CSMBIOSEntryPoint **entry)
{//Search 0xF0000 - 0x100000 for SMBIOS Entry Point structure.
I64 i;
U8 noreg checksum = 0, *mem = 0xF0000;
if (sys_smbios_entry)
{
*entry = sys_smbios_entry;
return TRUE;
}
do
{
if (!MemCompare(mem, "_SM_", 4))
{
*entry = mem;
for (i = 0; i < (*entry)->length; i++)
checksum += mem[i];
if (checksum == 0) //valid checksums sum to zero
break;
}
}
while ((mem += 16) < 0x100000); //anchor sits on 16-byte boundary
return mem != 0x100000;
}
U8 *SMBIOSStr(CSMBIOSHeader *header, I64 str_num, U8 *default="None")
{//Get string str_num from end of structure (string section).
I64 i;
U8* ptr = header(U8 *) + header->length;
if (!str_num)
return default;
for (i = 1; i < str_num; i++)
{
while (*ptr++);
if (!ptr[0] && !ptr[1]) //structure ends in double NULL
return default;
}
return ptr;
}
CSMBIOSHeader *SMBIOSStructGet(I64 type=0xFFFFF, I64 handle=0xFFFFF, CSMBIOSHeader *head=NULL)
{//Search for struct with type or handle. Return NULL if not found.
I64 i;
CSMBIOSEntryPoint *entry;
if (!head)
{
if (!SMBIOSEntryScan(&entry))
return NULL;
head = entry->table_address;
}
while (head->type != 127)
{
if (head->handle == handle)
return head;
if (head->type == type)
return head;
head = head(U8 *) + head->length;
for (i = 1; head(U8 *)[i - 1] || head(U8 *)[i]; i++);
head = head(U8 *) + i + 1;
}
return NULL;
}
U8 *SysRepFlagsMake(U8 *buf) U8 *SysRepFlagsMake(U8 *buf)
{ {
U8 *str; U8 *str;
@ -1220,20 +491,3 @@ public U0 BIOSRep()
{//Wrapper around $LK,"SysRep",A="MN:SysRep"$() to only show BIOS info. {//Wrapper around $LK,"SysRep",A="MN:SysRep"$() to only show BIOS info.
SysRep(SMBIOSt_BIOS); SysRep(SMBIOSt_BIOS);
} }
/*
U0 SMBIOSWallPaperInit()
{
CSMBIOSSystemInfo *sys_info = SMBIOSStructGet(SMBIOSt_SYSTEM);
U8 *company = SMBIOSStr(sys_info, sys_info->manufacturer);
if (!StrCompare(company, "VMware, Inc."))
wall->host_ch = 'W';
else if (!StrCompare(company, "innotek GmbH"))
wall->host_ch = 'V';
else if (!StrCompare(company, "QEMU"))
wall->host_ch = 'Q';
else
wall->host_ch = 'M';
} SMBIOSWallPaperInit;
*/

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src/System/WallPaper.ZC
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