mirror of
https://github.com/Zeal-Operating-System/ZealOS.git
synced 2025-04-15 04:08:38 +01:00
Remove redundancies in AHCI RBlks and WBlks functions.
Clean up and reformat AHCI code.
This commit is contained in:
TomAwezome
parent
9a0c955bea
commit
baa862b268
3 changed files with 115 additions and 113 deletions
Binary file not shown.
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@ -1,6 +1,6 @@
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//Ed("/Doc/ChangeLog.DD");
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//In("CC\n\n1\n\n5\n\n\n");
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In("CC\n0\n\n5\n\n\n");
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BootHDIns;
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"\n\nSuccessful? ";
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@ -7,16 +7,18 @@ I64 AHCILBA48CapacityGet(U16 *id_record)
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I64 AHCIPortCmdSlotGet(I64 port_num)
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{//Get next free command slot in port; if none, throw error.
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I64 i;
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CAHCIPort *port = &blkdev.ahci_hba->ports[port_num];
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U32 slots = port->sata_active | port->cmd_issue;
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I64 i;
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CAHCIPort *port = &blkdev.ahci_hba->ports[port_num];
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U32 slots = port->sata_active | port->cmd_issue;
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for (i = 0; i < blkdev.cmd_slot_count; i++)
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{
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if (!(slots & 1))
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return i;
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slots >>= 1;
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}
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ZenithErr("AHCI: No empty command slots on port %d!\n", port_num);
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throw('AHCI');
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}
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@ -29,16 +31,19 @@ Bool AHCIPortIsIdle(I64 port_num)
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U0 AHCIPortCmdStop(I64 port_num)
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{//Stop command engine on port.
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CAHCIPort *port = &blkdev.ahci_hba->ports[port_num];
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Btr(&port->command, AHCI_PxCMDf_ST);
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Btr(&port->command, AHCI_PxCMDf_FRE);
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// while (port->command & (AHCI_PxCMDF_CR | AHCI_PxCMDF_FR));
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while (Bt(&port->command, AHCI_PxCMDf_CR) || Bt(&port->command, AHCI_PxCMDf_FR));
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}
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U0 AHCIPortCmdStart(I64 port_num)
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{//Start command engine on port.
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CAHCIPort *port = &blkdev.ahci_hba->ports[port_num];
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while (Bt(&port->command, AHCI_PxCMDf_CR));
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Bts(&port->command, AHCI_PxCMDf_FRE);
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Bts(&port->command, AHCI_PxCMDf_ST);
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}
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@ -46,6 +51,7 @@ U0 AHCIPortCmdStart(I64 port_num)
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Bool AHCIPortWait(I64 port_num, F64 timeout, Bool throwing=TRUE)
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{//Wait until DRQ & BSY are clear in port task file.
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CAHCIPort *port = &blkdev.ahci_hba->ports[port_num];
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do
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{
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if (!(port->task_file_data & (ATAS_DRQ | ATAS_BSY)))
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@ -53,10 +59,12 @@ Bool AHCIPortWait(I64 port_num, F64 timeout, Bool throwing=TRUE)
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Yield; // don't hang OS
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}
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while (timeout > tS);
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if (throwing)
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{ ZenithErr("AHCI: Port %d hung.\n", port_num);
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throw('AHCI');
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}
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return FALSE;
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}
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@ -64,7 +72,9 @@ U0 AHCIPortReset(I64 port_num)
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{//Software reset of port. Port command engine must be started after this.
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//If port is not responsive we do a full reset.
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CAHCIPort *port = &blkdev.ahci_hba->ports[port_num];
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AHCIPortCmdStop(port_num);
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port->interrupt_status = port->interrupt_status; //Acknowledge all interrupt statuses.
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if (!AHCIPortWait(port_num, tS + 1))
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@ -73,63 +83,76 @@ U0 AHCIPortReset(I64 port_num)
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Sleep(2); //Spec says 1 millisecond
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port->sata_ctrl = 0;
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}
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while (port->sata_status & 0xF != AHCI_PxSSTSF_DET_PRESENT);
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port->sata_error = ~0; //Write all 1s to sata error register.
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}
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CPortCmdHeader *AHCIPortActiveHeaderGet(I64 port_num, I64 cmd_slot)
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{//Get current command slot header on port.
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CAHCIPort *port = &blkdev.ahci_hba->ports[port_num];
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CPortCmdHeader *cmd_header = port->cmd_list_base;
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CAHCIPort *port = &blkdev.ahci_hba->ports[port_num];
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CPortCmdHeader *cmd_header = port->cmd_list_base;
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return cmd_header + cmd_slot; //Move up pointer to the slot we have in the command list.
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}
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U0 AHCIPortCmdWait(I64 port_num, I64 cmd_slot)
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{//Wait on command completion after command issue, and double check any error.
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CAHCIPort *port = &blkdev.ahci_hba->ports[port_num];
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while (TRUE)
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{
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if (!Bt(&port->cmd_issue, cmd_slot)) //When command has been processed
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break;
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if (Bt(&port->interrupt_status, AHCI_PxIf_TFE)) //Task File Error ($LK,"ATAS_ERR",A="MN:ATAS_ERR"$)
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{
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error:
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ZenithErr("AHCI: Port %d: Command failed!\n", port_num);
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throw('AHCI');
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}
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Yield; // don't hang OS
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}
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if (Bt(&port->interrupt_status, AHCI_PxIf_TFE)) //Second safety check
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goto error;
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}
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I64 AHCIAtapiCapacityGet(CBlkDev *bd)
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{
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CPortCmdTable *cmd_table;
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CFisH2D *cmd_fis;
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CAHCIPort *port = bd->ahci_port;
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I64 cmd_slot = AHCIPortCmdSlotGet(bd->port_num);
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CPortCmdHeader *cmd_header = AHCIPortActiveHeaderGet(bd->port_num, cmd_slot);
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CPortCmdTable *cmd_table;
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CFisH2D *cmd_fis;
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CAHCIPort *port = bd->ahci_port;
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I64 cmd_slot = AHCIPortCmdSlotGet(bd->port_num);
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CPortCmdHeader *cmd_header = AHCIPortActiveHeaderGet(bd->port_num, cmd_slot);
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U32 *buf;
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if (port->signature != AHCI_PxSIG_ATAPI)
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{
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ZenithErr("AHCI: Drive is not an ATAPI drive!\n");
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throw('AHCI');
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}
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U32 *buf = CAlloc(8, Fs->code_heap);
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buf = CAlloc(8, Fs->code_heap);
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Bts(&cmd_header->desc, AHCI_CH_DESCf_A);
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cmd_table = cmd_header->cmd_table_base;
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MemSet(cmd_table, 0, sizeof(CPortCmdTable));
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//Set up single PRD
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cmd_table->prdt[0].data_base = buf;
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cmd_table->prdt[0].data_byte_count = DVD_BLK_SIZE - 1; //Zero-based value
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cmd_header->prdt_len = 1;
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cmd_fis = &cmd_table->cmd_fis;
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cmd_fis->type = FISt_H2D;
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cmd_fis = &cmd_table->cmd_fis;
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cmd_fis->type = FISt_H2D;
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Bts(&cmd_fis->desc, AHCI_CF_DESCf_C); //Set Command bit in H2D FIS.
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cmd_fis->command = ATA_PACKET;
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cmd_table->acmd[0] = ATAPI_READ_CAPACITY >> 8;
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cmd_fis->command = ATA_PACKET;
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cmd_table->acmd[0] = ATAPI_READ_CAPACITY >> 8;
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AHCIPortWait(bd->port_num, tS + 2);
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Bts(&port->cmd_issue, cmd_slot); //Issue the command.
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@ -148,19 +171,21 @@ I64 AHCIAtapiCapacityGet(CBlkDev *bd)
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U0 AHCIPortIdentify(CBlkDev *bd)
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{//Perform ATA_IDENTIFY command on ATA/ATAPI drive and store capacity and id record.
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CPortCmdTable *cmd_table;
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CFisH2D *cmd_fis;
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CAHCIPort *port = bd->ahci_port;
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I64 cmd_slot = AHCIPortCmdSlotGet(bd->port_num);
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CPortCmdHeader *cmd_header = AHCIPortActiveHeaderGet(bd->port_num, cmd_slot);
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CPortCmdTable *cmd_table;
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CFisH2D *cmd_fis;
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CAHCIPort *port = bd->ahci_port;
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I64 cmd_slot = AHCIPortCmdSlotGet(bd->port_num);
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CPortCmdHeader *cmd_header = AHCIPortActiveHeaderGet(bd->port_num, cmd_slot);
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U16 *dev_id_record;
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port->interrupt_status = port->interrupt_status; //TODO: Why?
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//Using the code heap for this alloc to stay under 32-bit address space.
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U16 *dev_id_record = CAlloc(512, Fs->code_heap);
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dev_id_record = CAlloc(512, Fs->code_heap);
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cmd_table = cmd_header->cmd_table_base;
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MemSet(cmd_table, 0, sizeof(CPortCmdTable));
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//Set up single PRD
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cmd_table->prdt[0].data_base = dev_id_record;
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cmd_table->prdt[0].data_base_upper = 0;
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@ -169,6 +194,7 @@ U0 AHCIPortIdentify(CBlkDev *bd)
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//Setup command FIS
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cmd_fis = &cmd_table->cmd_fis;
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cmd_fis->type = FISt_H2D;
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Bts(&cmd_fis->desc, AHCI_CF_DESCf_C); //Set Command bit in H2D FIS.
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@ -176,6 +202,7 @@ U0 AHCIPortIdentify(CBlkDev *bd)
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cmd_fis->command = ATA_IDENTIFY_PACKET;
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else
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cmd_fis->command = ATA_IDENTIFY;
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cmd_fis->device = 0; //No bits need to be set in the device register.
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//Wait on previous command to complete.
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@ -209,12 +236,16 @@ U8 *AHCIBufferAlign(CBlkDev *bd, U8 *user_buf, I64 buf_size, Bool write)
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// "Aligning buffer under 32-bit range\n";
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Free(bd->prd_buf);
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bd->prd_buf = MAlloc(buf_size, Fs->code_heap);
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Bts(&bd->flags, BDf_INTERNAL_BUF);
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if (write)
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MemCopy(bd->prd_buf, user_buf, buf_size);
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return bd->prd_buf;
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}
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Btr(&bd->flags, BDF_INTERNAL_BUF);
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return user_buf;
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}
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@ -280,6 +311,7 @@ I64 AHCIAtaBlksRW(CBlkDev *bd, U8 *buf, I64 blk, I64 count, Bool write)
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}
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//Setup the command FIS.
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cmd_fis = &cmd_table->cmd_fis;
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cmd_fis->type = FISt_H2D;
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Bts(&cmd_fis->desc, AHCI_CF_DESCf_C); //Set Command bit in H2D FIS
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@ -289,14 +321,14 @@ I64 AHCIAtaBlksRW(CBlkDev *bd, U8 *buf, I64 blk, I64 count, Bool write)
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cmd_fis->command = ATA_READ_DMA_EXT;
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//Fill in the rest of the command FIS.
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cmd_fis->lba0 = blk.u8[0];
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cmd_fis->lba1 = blk.u8[1];
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cmd_fis->lba2 = blk.u8[2];
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cmd_fis->device = 1 << 6; //Required as per ATA8-ACS section 7.25.3
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cmd_fis->lba3 = blk.u8[3];
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cmd_fis->lba4 = blk.u8[4];
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cmd_fis->lba5 = blk.u8[5];
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cmd_fis->count = count;
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cmd_fis->lba0 = blk.u8[0];
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cmd_fis->lba1 = blk.u8[1];
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cmd_fis->lba2 = blk.u8[2];
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cmd_fis->device = 1 << 6; //Required as per ATA8-ACS section 7.25.3
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cmd_fis->lba3 = blk.u8[3];
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cmd_fis->lba4 = blk.u8[4];
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cmd_fis->lba5 = blk.u8[5];
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cmd_fis->count = count;
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//Wait on previous command to complete.
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AHCIPortWait(bd->port_num, tS + 2);
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@ -311,6 +343,7 @@ I64 AHCIAtaBlksRW(CBlkDev *bd, U8 *buf, I64 blk, I64 count, Bool write)
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// "Writing back internal buffer\n";
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MemCopy(buf, internal_buf, buf_size);
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}
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return cmd_header->prd_byte_count;
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}
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@ -373,12 +406,13 @@ I64 AHCIAtaBlksWrite(CBlkDev *bd, U8 *buf, I64 blk, I64 count)
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I64 AHCIAtapiBlksRead(CBlkDev *bd, U8 *buf, I64 blk, I64 count)
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{//Read 'blk' amount of blocks from from AHCI ATAPI device. Returns num of bytes transferred.
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CPortCmdTable *cmd_table;
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CFisH2D *cmd_fis;
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CAHCIPort *port = bd->ahci_port;
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I64 i, byte_count, buf_size, buf_size_tmp, prdt_len, cmd_slot = AHCIPortCmdSlotGet(bd->port_num);
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CPortCmdHeader *cmd_header = AHCIPortActiveHeaderGet(bd->port_num, cmd_slot);
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U8 *internal_buf, *internal_buf_tmp;
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CPortCmdTable *cmd_table;
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CFisH2D *cmd_fis;
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CAHCIPort *port = bd->ahci_port;
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I64 i, byte_count, buf_size, buf_size_tmp, prdt_len, cmd_slot = AHCIPortCmdSlotGet(bd->port_num);
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CPortCmdHeader *cmd_header = AHCIPortActiveHeaderGet(bd->port_num, cmd_slot);
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U8 *internal_buf, *internal_buf_tmp;
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CAtapiReadCmd read_cmd;
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if (port->signature != AHCI_PxSIG_ATAPI)
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{
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@ -403,6 +437,7 @@ I64 AHCIAtapiBlksRead(CBlkDev *bd, U8 *buf, I64 blk, I64 count)
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if (!internal_buf) throw('AHCI');
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Bts(&cmd_header->desc, AHCI_CH_DESCf_A); //Set ATAPI flag in command header
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cmd_table = cmd_header->cmd_table_base;
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MemSet(cmd_table, 0, sizeof(CPortCmdTable));
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@ -417,9 +452,11 @@ I64 AHCIAtapiBlksRead(CBlkDev *bd, U8 *buf, I64 blk, I64 count)
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// "prdt[%d].data_byte_count = 0x%X\n\n", i, byte_count;
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cmd_table->prdt[i].data_base = internal_buf_tmp;
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cmd_table->prdt[i].data_byte_count = byte_count - 1; //Zero-based value
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buf_size_tmp -= byte_count;
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buf_size_tmp -= byte_count;
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internal_buf_tmp += byte_count;
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}
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cmd_fis = &cmd_table->cmd_fis;
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MemSet(cmd_fis, 0, sizeof(CFisH2D));
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@ -427,13 +464,12 @@ I64 AHCIAtapiBlksRead(CBlkDev *bd, U8 *buf, I64 blk, I64 count)
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Bts(&cmd_fis->desc, AHCI_CF_DESCf_C); //Set Command bit in H2D FIS
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cmd_fis->feature_low = 1; //Necessary?
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cmd_fis->command = ATA_PACKET;
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cmd_fis->command = ATA_PACKET;
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CAtapiReadCmd read_cmd;
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MemSet(&read_cmd, 0, sizeof(CAtapiReadCmd));
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read_cmd.command = ATAPI_READ >> 8; //$BK,1$FIX$BK,0$
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read_cmd.lba = EndianU32(blk);
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read_cmd.count = EndianU32(count);
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read_cmd.lba = EndianU32(blk);
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read_cmd.count = EndianU32(count);
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MemCopy(&cmd_table->acmd, &read_cmd, 16);
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cmd_fis->count = count; //Necessary?
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@ -449,16 +485,17 @@ I64 AHCIAtapiBlksRead(CBlkDev *bd, U8 *buf, I64 blk, I64 count)
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// "Writing back internal buffer\n";
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MemCopy(buf, internal_buf, buf_size);
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}
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return cmd_header->prd_byte_count;
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}
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U0 AHCIPortInit(CBlkDev *bd, CAHCIPort *port, I64 port_num)
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{//Initialize base addresses for command list and FIS receive area and start command execution on port.
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CPortCmdHeader *cmd_header;
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I64 i;
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I64 i;
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bd->ahci_port = port;
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bd->port_num = port_num;
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bd->port_num = port_num;
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AHCIPortReset(port_num);
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AHCIPortCmdStart(port_num);
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@ -499,9 +536,9 @@ U0 AHCIHbaReset()
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U0 AHCIInit()
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{
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CAHCIHba *hba;
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CAHCIPort *port;
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I64 i, bdf = PCIClassFind(PCIC_STORAGE << 16 | PCISC_AHCI << 8 + 1, 0); //0x010601, last byte prog_if, AHCI version 1.0
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CAHCIHba *hba;
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CAHCIPort *port;
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I64 i, bdf = PCIClassFind(PCIC_STORAGE << 16 | PCISC_AHCI << 8 + 1, 0); //0x010601, last byte prog_if, AHCI version 1.0
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if (bdf == -1)
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{
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@ -520,7 +557,9 @@ U0 AHCIInit()
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if (Bt(&hba->caps_ext, AHCI_CAPSEXTf_BOH))
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{
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Bt(&hba->bohc, AHCI_BOHCf_OOS);
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while (Bt(&hba->bohc, AHCI_BOHCf_BOS));
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Sleep(25);
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if (Bt(&hba->bohc, AHCI_BOHCf_BB)) //if Bios Busy is still set after 25 mS, wait 2 seconds.
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Sleep(2000);
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@ -586,51 +625,36 @@ Bool AHCIBootDVDProbeAll(CBlkDev *bd)
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Bool AHCIAtapiRBlks(CDrive *drive, U8 *buf, I64 blk, I64 count)
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{
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CBlkDev *bd = drive->bd;
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I64 nn, spc = bd->blk_size >> BLK_SIZE_BITS, n, blk2, l2;
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I64 spc = bd->blk_size >> BLK_SIZE_BITS, n, blk2,
|
||||
l2 = bd->max_reads << 1 + spc << 1;
|
||||
U8 *dvd_buf;// = MAlloc(l2 << BLK_SIZE_BITS);
|
||||
|
||||
while (count > 0)
|
||||
if (bd->type == BDT_ATAPI)
|
||||
{
|
||||
nn = count;
|
||||
// if (nn > bd->max_reads)
|
||||
// nn = bd->max_reads;
|
||||
dvd_buf = MAlloc(l2 << BLK_SIZE_BITS);
|
||||
|
||||
if (bd->type == BDT_ATAPI)
|
||||
{
|
||||
// "AHCIAtapiBlksRead(bd, buf, %d, %d);\n", blk, nn;
|
||||
// AHCIAtapiBlksRead(bd, buf, blk, nn);
|
||||
|
||||
|
||||
l2 = bd->max_reads << 1 + spc << 1;
|
||||
dvd_buf = MAlloc(l2 << BLK_SIZE_BITS);
|
||||
|
||||
if (blk <= bd->max_reads)
|
||||
blk2 = 0;
|
||||
else
|
||||
blk2 = FloorU64(blk - bd->max_reads, spc);
|
||||
|
||||
if (blk2 + l2 > drive->size + drive->drv_offset)
|
||||
l2 = drive->size + drive->drv_offset - blk2;
|
||||
|
||||
n = (l2 + spc - 1) / spc;
|
||||
|
||||
// "AHCIAtapiBlksRead(bd, dvd_buf, %d, %d);", blk2 / spc, n;
|
||||
AHCIAtapiBlksRead(bd, dvd_buf, blk2 / spc, n);
|
||||
|
||||
if (bd->flags & BDF_READ_CACHE)
|
||||
DiskCacheAdd(drive, dvd_buf, blk2, n * spc);
|
||||
|
||||
MemCopy(buf, dvd_buf + (blk - blk2) << BLK_SIZE_BITS, nn << BLK_SIZE_BITS);
|
||||
Free(dvd_buf);
|
||||
|
||||
}
|
||||
if (blk <= bd->max_reads)
|
||||
blk2 = 0;
|
||||
else
|
||||
return FALSE;
|
||||
blk2 = FloorU64(blk - bd->max_reads, spc);
|
||||
|
||||
if (blk2 + l2 > drive->size + drive->drv_offset)
|
||||
l2 = drive->size + drive->drv_offset - blk2;
|
||||
|
||||
n = (l2 + spc - 1) / spc;
|
||||
|
||||
// "AHCIAtapiBlksRead(bd, dvd_buf, %d, %d);", blk2 / spc, n;
|
||||
AHCIAtapiBlksRead(bd, dvd_buf, blk2 / spc, n);
|
||||
|
||||
if (bd->flags & BDF_READ_CACHE)
|
||||
DiskCacheAdd(drive, dvd_buf, blk2, n * spc);
|
||||
|
||||
MemCopy(buf, dvd_buf + (blk - blk2) << BLK_SIZE_BITS, count << BLK_SIZE_BITS);
|
||||
Free(dvd_buf);
|
||||
|
||||
buf += nn << BLK_SIZE_BITS;
|
||||
blk += nn;
|
||||
count -= nn;
|
||||
}
|
||||
else
|
||||
return FALSE;
|
||||
|
||||
return TRUE;
|
||||
}
|
||||
|
|
@ -638,45 +662,23 @@ Bool AHCIAtapiRBlks(CDrive *drive, U8 *buf, I64 blk, I64 count)
|
|||
|
||||
Bool AHCIAtaRBlks(CDrive *drive, U8 *buf, I64 blk, I64 count)
|
||||
{
|
||||
I64 n;
|
||||
CBlkDev *bd = drive->bd;
|
||||
|
||||
while (count > 0)
|
||||
{
|
||||
n = count;
|
||||
// if (n > bd->max_reads)
|
||||
// n = bd->max_reads;
|
||||
if (bd->type == BDT_ATA)
|
||||
AHCIAtaBlksRead(bd, buf, blk, count);
|
||||
else
|
||||
return FALSE;
|
||||
|
||||
if (bd->type == BDT_ATA)
|
||||
AHCIAtaBlksRead(bd, buf, blk, n);
|
||||
else
|
||||
return FALSE;
|
||||
|
||||
buf += n << BLK_SIZE_BITS;
|
||||
blk += n;
|
||||
count -= n;
|
||||
}
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
Bool AHCIAtaWBlks(CDrive *drive, U8 *buf, I64 blk, I64 count)
|
||||
{
|
||||
I64 n;
|
||||
CBlkDev *bd = drive->bd;
|
||||
// Bool unlock;
|
||||
|
||||
while (count > 0)
|
||||
{
|
||||
n = count;
|
||||
// if (n > bd->max_writes)
|
||||
// n = bd->max_writes;
|
||||
AHCIAtaBlksWrite(bd, buf, blk, n);
|
||||
AHCIAtaBlksWrite(bd, buf, blk, count);
|
||||
|
||||
buf += n << BLK_SIZE_BITS;
|
||||
blk += n;
|
||||
count -= n;
|
||||
blkdev.write_count += n;
|
||||
}
|
||||
blkdev.write_count += count;
|
||||
|
||||
return TRUE;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in a new issue