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https://github.com/Zeal-Operating-System/ZealOS.git
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Merge branch 'limine-ahci-doodguy-debug' into limine
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commit
6ff44d06cb
2 changed files with 38 additions and 18 deletions
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@ -1,11 +1,16 @@
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/*
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- Perhaps make more references to spec in comments
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- Make more references to spec in comments
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- ATAPI RW
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- ATAPI RW needs cleaning up / improving
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- Remove Buffer alignment check and just do it on every call
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- AHCIATAPISetMaxSpeed?
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- AHCIATAPISetMaxSpeed needs to be implemented
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- TODO FIXME: certain Bt() and Bts() on AHCI memory areas, and variable casting,
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caused strange crashes on a Ryzen with Gigabyte brand motherboard. Bit test
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function implementation and compiler casting internal functionality need
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to be researched to fix those bugs.
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*/
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I64 AHCI_DEBUG = FALSE;
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@ -224,7 +229,8 @@ U0 AHCIPortCmdWait(I64 port_num, I64 cmd_slot)
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while (TRUE)
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{
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if (!Bt(&port->cmd_issue, cmd_slot)) //When command has been processed
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// if (!Bt(&port->cmd_issue, cmd_slot)) //When command has been processed
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if (!(port->cmd_issue & (1 << cmd_slot))) //When command has been processed (using & and 1 << for debug)
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break;
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if (Bt(&port->interrupt_status, AHCI_PxIf_TFE)) //Task File Error ($LK,"ATAS_ERR",A="MN:ATAS_ERR"$)
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@ -282,7 +288,8 @@ I64 AHCIAtapiCapacityGet(CBlkDev *bd)
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cmd_table->acmd[0] = ATAPI_READ_CAPACITY >> 8;
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AHCIPortWait(bd->port_num, tS + 2);
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Bts(&port->cmd_issue, cmd_slot); //Issue the command.
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// Bts(&port->cmd_issue, cmd_slot); //Issue the command.
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port->cmd_issue |= 1 << cmd_slot; //issue the command with |= for debug sake
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try
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AHCIPortCmdWait(bd->port_num, cmd_slot);
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@ -504,7 +511,8 @@ Bool AHCIAtapiStartStop(CBlkDev *bd, Bool start)
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cmd_table->acmd[4] = start;
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AHCIPortWait(bd->port_num, tS + 2);
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Bts(&port->cmd_issue, cmd_slot); //Issue the command.
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// Bts(&port->cmd_issue, cmd_slot); //Issue the command.
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port->cmd_issue |= 1 << cmd_slot; //issue the command with |= for debug sake
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try
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AHCIPortCmdWait(bd->port_num, cmd_slot);
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@ -578,7 +586,9 @@ U0 AHCIPortIdentify(CBlkDev *bd)
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//Wait on previous command to complete.
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AHCIPortWait(bd->port_num, tS + 2);
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Bts(&port->cmd_issue, cmd_slot); //Issue the command.
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// Bts(&port->cmd_issue, cmd_slot); //Issue the command.
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port->cmd_issue |= 1 << cmd_slot; //issue the command with |= for debug sake
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AHCIPortCmdWait(bd->port_num, cmd_slot);
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Free(bd->dev_id_record);
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@ -707,7 +717,8 @@ I64 AHCIAtaBlksRW(CBlkDev *bd, U8 *buf, I64 blk, I64 count, Bool write)
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//Wait on previous command to complete.
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AHCIPortWait(bd->port_num, tS + 2);
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//Issue the command.
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Bts(&port->cmd_issue, cmd_slot);
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// Bts(&port->cmd_issue, cmd_slot);
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port->cmd_issue |= 1 << cmd_slot; //issue the command with |= for debug sake
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//Wait on command to finish.
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AHCIPortCmdWait(bd->port_num, cmd_slot);
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@ -745,7 +756,7 @@ I64 AHCIAtaBlksRead(CBlkDev *bd, U8 *buf, I64 blk, I64 count)
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blk += AHCI_PRDT_MAX_BLOCKS;
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buf += AHCI_PRDT_MAX_BLOCKS * BLK_SIZE;
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// "$$GREEN$$read count: %d\n$$FG$$", count;
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}$ER$
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}
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byte_count += AHCIAtaBlksRW(bd, buf, blk, count, FALSE);
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}
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@ -859,7 +870,8 @@ I64 AHCIAtapiBlksRead(CBlkDev *bd, U8 *buf, I64 blk, I64 count, Bool lock=TRUE)
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AHCIPortWait(bd->port_num, tS + 2);
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Bts(&port->cmd_issue, cmd_slot);
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// Bts(&port->cmd_issue, cmd_slot);
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port->cmd_issue |= 1 << cmd_slot; //issue the command with |= for debug sake
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AHCIPortCmdWait(bd->port_num, cmd_slot);
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if (bd->flags & BDF_INTERNAL_BUF)
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@ -961,8 +973,9 @@ I64 AHCIAtapiBlksWrite(CBlkDev *bd, U8 *buf, I64 blk, I64 count, Bool lock=TRUE)
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U0 AHCIPortInit(CBlkDev *bd, CAHCIPort *port, I64 port_num)
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{//Initialize base addresses for command list and FIS receive area and start command execution on port.
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CPortCmdHeader *cmd_header;
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I64 i;
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CPortCmdHeader *cmd_header,
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*cmd_header_base;
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I64 i;
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if (!(port->signature == AHCI_PxSIG_ATAPI || port->signature == AHCI_PxSIG_ATA))
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Debug("AHCI Port/BlkDev error: Invalid Port Signature");
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@ -992,9 +1005,12 @@ U0 AHCIPortInit(CBlkDev *bd, CAHCIPort *port, I64 port_num)
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port->fis_base = CAllocAligned(sizeof(CFisReceived), 256, sys_task->code_heap);
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port->fis_base_upper = 0;
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cmd_header_base = port->cmd_list_base;
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for (i = 0; i < blkdev.cmd_slot_count; i++)
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{
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cmd_header = &port->cmd_list_base(CPortCmdHeader *)[i];
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// cmd_header = &port->cmd_list_base(CPortCmdHeader *)[i];
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cmd_header = &cmd_header_base[i];
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//Write Command FIS Length (CFL, a fixed size) in bits 4:0 of the desc. Takes size in U32s.
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cmd_header->desc = sizeof(CFisH2D) / sizeof(U32);
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@ -1009,7 +1025,7 @@ U0 AHCIPortInit(CBlkDev *bd, CAHCIPort *port, I64 port_num)
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Bool AHCIAtaInit(CBlkDev *bd)
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{
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Bool unlock, okay = FALSE;
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CPortCmdHeader *cmd_header;
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CPortCmdHeader *cmd_header, *cmd_header_base;
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I64 i;
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if (!bd->ahci_port)
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@ -1022,7 +1038,9 @@ Bool AHCIAtaInit(CBlkDev *bd)
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{
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for (i = 0; i < blkdev.cmd_slot_count; i++)
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{
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cmd_header = &bd->ahci_port->cmd_list_base(CPortCmdHeader *)[i];
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cmd_header_base = bd->ahci_port->cmd_list_base;
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// cmd_header = &bd->ahci_port->cmd_list_base(CPortCmdHeader *)[i];
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cmd_header = &cmd_header_base[i];
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Free(cmd_header->cmd_table_base);
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}
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Free(bd->ahci_port->cmd_list_base);
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@ -1101,7 +1119,8 @@ U0 AHCIInit()
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for (i = 0; i < AHCI_MAX_PORTS; i++)
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{
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if (Bt(&hba->ports_implemented, i))
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// if (Bt(&hba->ports_implemented, i))
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if (hba->ports_implemented & (1 << i))
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{//$BK,1$Make ports idle?$BK,0$
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port = &hba->ports[i];
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"AHCI: Port %2d signature 0x%08X ", i, port->signature;
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@ -1139,7 +1158,8 @@ Bool AHCIBootDVDProbeAll(CBlkDev *bd)
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for (i = 0; i < AHCI_MAX_PORTS; i++)
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{
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if (Bt(&blkdev.ahci_hba->ports_implemented, i))
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// if (Bt(&blkdev.ahci_hba->ports_implemented, i))
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if (blkdev.ahci_hba->ports_implemented & (1 << i))
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{
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port = &blkdev.ahci_hba->ports[i];
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"AHCI: BootDVDProbeAll: Saw port at %2d with signature 0x%0X\n", i, port->signature;
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@ -2718,7 +2718,7 @@ class CPCIDev
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//Command FIS flags
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#define AHCI_CF_DESCf_C 7 //'Command' bit. Set when FIS is an ATA command.
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#define AHCI_CF_DESCF_C (1 << AHCI_CF_DESCF_C)
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#define AHCI_CF_DESCF_C (1 << AHCI_CF_DESCf_C)
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//Port register flags
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//Command and Status register flags
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