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On PCNet nics enable FCS check and strip via ASTRP_RCV
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80ce532072
commit
3809e15849
1 changed files with 18 additions and 2 deletions
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@ -59,6 +59,7 @@
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#define PCNET_INT_TINTM 9 // Transmit Interrupt Mask
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#define PCNET_INT_TINTM 9 // Transmit Interrupt Mask
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#define PCNET_INT_RINTM 10 // Receive Interrupt Mask
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#define PCNET_INT_RINTM 10 // Receive Interrupt Mask
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#define PCNET_FEATURE_ASTRPRCV 10
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#define PCNET_FEATURE_APADXMT 11
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#define PCNET_FEATURE_APADXMT 11
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#define PCNET_BCR_MISC_CONFIG_ASEL 1
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#define PCNET_BCR_MISC_CONFIG_ASEL 1
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@ -455,7 +456,7 @@ U0 PCNetInterruptCSRSet()
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U0 PCNetTXAutoPadEnable()
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U0 PCNetTXAutoPadEnable()
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{/* AMD PCNet datasheet p.1-958
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{/* AMD PCNet datasheet p.1-958
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Setting bit 11 (Auto Pad Transmit) allows
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Setting bit 11 (Auto Pad Transmit) allows
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shoft transmit frames to be automatically
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short transmit frames to be automatically
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extended to 64 bytes. */
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extended to 64 bytes. */
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U32 csr = PCNetCSRRead(PCNET_CSR_FEATURECTRL);
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U32 csr = PCNetCSRRead(PCNET_CSR_FEATURECTRL);
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@ -465,6 +466,19 @@ U0 PCNetTXAutoPadEnable()
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PCNetCSRWrite(PCNET_CSR_FEATURECTRL, csr);
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PCNetCSRWrite(PCNET_CSR_FEATURECTRL, csr);
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}
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}
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U0 PCNetRXAutoStripEnable()
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{/* AMD PCNet datasheet p.1-958
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Setting bit 10 (Auto Strip Receive) allows
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pad and FCS fields to be automatically
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stripped. ONLY WORKS ON 802.3!!! */
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U32 csr = PCNetCSRRead(PCNET_CSR_FEATURECTRL);
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Bts(&csr, PCNET_FEATURE_ASTRPRCV);
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PCNetCSRWrite(PCNET_CSR_FEATURECTRL, csr);
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}
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U0 PCNetConfigModeExit()
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U0 PCNetConfigModeExit()
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{/* AMD PCNet datasheet p.1-954
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{/* AMD PCNet datasheet p.1-954
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PCNet controller can be started
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PCNet controller can be started
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@ -749,6 +763,8 @@ U0 PCNetInit()
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PCNetTXAutoPadEnable;
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PCNetTXAutoPadEnable;
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PCNetRXAutoStripEnable;
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PCNetAutoLinkSelect;
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PCNetAutoLinkSelect;
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PCNetEnableFullDuplex;
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PCNetEnableFullDuplex;
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@ -845,4 +861,4 @@ U0 NetStart()
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PCNetCSRWrite(PCNET_CSR_CTRLSTATUS, csr);
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PCNetCSRWrite(PCNET_CSR_CTRLSTATUS, csr);
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}
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}
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PCNetInit;
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PCNetInit;
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