ZealOS/docs/Compiler/BackB.CC.html

831 lines
105 KiB
HTML
Raw Normal View History

2021-07-03 05:07:57 +01:00
<!DOCTYPE HTML>
<html>
<head>
<meta http-equiv="Content-Type" content="text/html;charset=US-ASCII">
<meta name="generator" content="ZealOS V0.10">
2021-07-03 05:07:57 +01:00
<style type="text/css">
body {background-color:#000000;}
.cF0{color:#ffffff;background-color:#000000;}
.cF1{color:#3465a4;background-color:#000000;}
.cF2{color:#4e9a06;background-color:#000000;}
.cF3{color:#06989a;background-color:#000000;}
.cF4{color:#a24444;background-color:#000000;}
.cF5{color:#75507b;background-color:#000000;}
.cF6{color:#ce982f;background-color:#000000;}
.cF7{color:#bcc0b9;background-color:#000000;}
.cF8{color:#555753;background-color:#000000;}
.cF9{color:#729fcf;background-color:#000000;}
.cFA{color:#82bc49;background-color:#000000;}
.cFB{color:#34e2e2;background-color:#000000;}
.cFC{color:#ac3535;background-color:#000000;}
.cFD{color:#ad7fa8;background-color:#000000;}
.cFE{color:#fce94f;background-color:#000000;}
.cFF{color:#000000;background-color:#000000;}
</style>
</head>
<body>
<pre style="font-family:monospace;font-size:12pt">
2021-07-03 05:07:57 +01:00
<a name="l1"></a><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICUnaries</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> op, </span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l2"></a>{
<a name="l3"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip);
<a name="l4"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, op, rip);
<a name="l5"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
2021-07-03 05:07:57 +01:00
<a name="l6"></a>}
<a name="l7"></a>
<a name="l8"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICNot</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l9"></a>{
<a name="l10"></a> </span><span class=cF9>I64</span><span class=cF0> i;
2021-07-03 05:07:57 +01:00
<a name="l11"></a>
<a name="l12"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg1.type.raw_type &lt;= </span><span class=cF3>RT_U8</span><span class=cF0> &amp;&amp; tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDG_DISP_SIB_RIP</span><span class=cF0>)
<a name="l13"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l14"></a> i = </span><span class=cFD>ICModr1</span><span class=cF0>(tmpi, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp);
<a name="l15"></a> </span><span class=cFD>ICRex</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>1</span><span class=cF0>]);
<a name="l16"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] &lt;&lt; </span><span class=cFE>8</span><span class=cF0> + </span><span class=cFE>0xF6</span><span class=cF0>); </span><span class=cF2>//TEST ?,0xFF</span><span class=cF0>
<a name="l17"></a> </span><span class=cFD>ICModr2</span><span class=cF0>(tmpi, i,, tmpi-&gt;arg1.disp, rip + </span><span class=cFE>1</span><span class=cF0>);
<a name="l18"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0xFF</span><span class=cF0>);
<a name="l19"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l20"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l21"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l22"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip);
<a name="l23"></a> </span><span class=cFD>ICTest</span><span class=cF0>(tmpi, </span><span class=cF3>REG_RAX</span><span class=cF0>);
<a name="l24"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l25"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xC0940F</span><span class=cF0>); </span><span class=cF2>//SETZ AL</span><span class=cF0>
<a name="l26"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, </span><span class=cFE>0xC0B60F48</span><span class=cF0>);</span><span class=cF2>//MOVZX RAX,AL</span><span class=cF0>
<a name="l27"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_U64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
2021-07-03 05:07:57 +01:00
<a name="l28"></a>}
<a name="l29"></a>
<a name="l30"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICAndAnd</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l31"></a>{
<a name="l32"></a> </span><span class=cF9>I64</span><span class=cF0> r2;
2021-07-03 05:07:57 +01:00
<a name="l33"></a>
<a name="l34"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi-&gt;arg2.type, tmpi-&gt;arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg2.disp, rip);
<a name="l35"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDF_REG</span><span class=cF7>)</span><span class=cF0> || tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0> == </span><span class=cF3>REG_RAX</span><span class=cF0>)
<a name="l36"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l37"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip);
<a name="l38"></a> r2 = </span><span class=cF3>REG_RDX</span><span class=cF0>;
<a name="l39"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l40"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l41"></a> r2 = tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>;
<a name="l42"></a> </span><span class=cFD>ICZero</span><span class=cF0>(tmpi, </span><span class=cF3>REG_RAX</span><span class=cF0>);
<a name="l43"></a> </span><span class=cFD>ICTest</span><span class=cF0>(tmpi, r2);
<a name="l44"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0x0874</span><span class=cF0>);
<a name="l45"></a> </span><span class=cFD>ICTest</span><span class=cF0>(tmpi, </span><span class=cF3>REG_RCX</span><span class=cF0>);
<a name="l46"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0x0374</span><span class=cF0>);
<a name="l47"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xC0FF48</span><span class=cF0>);
<a name="l48"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
2021-07-03 05:07:57 +01:00
<a name="l49"></a>}
<a name="l50"></a>
<a name="l51"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICOrOr</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l52"></a>{
<a name="l53"></a> </span><span class=cF9>I64</span><span class=cF0> i = </span><span class=cFE>0x48</span><span class=cF0>, r2;
2021-07-03 05:07:57 +01:00
<a name="l54"></a>
<a name="l55"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi-&gt;arg2.type, tmpi-&gt;arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg2.disp, rip);
<a name="l56"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDF_REG</span><span class=cF7>)</span><span class=cF0> || tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0> == </span><span class=cF3>REG_RAX</span><span class=cF0>)
<a name="l57"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l58"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip);
<a name="l59"></a> r2 = </span><span class=cF3>REG_RDX</span><span class=cF0>;
<a name="l60"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l61"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l62"></a> r2 = tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>;
2021-07-03 05:07:57 +01:00
<a name="l63"></a>
<a name="l64"></a> </span><span class=cF1>if</span><span class=cF0> (r2 &gt; </span><span class=cFE>7</span><span class=cF0>)
<a name="l65"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l66"></a> i++;
<a name="l67"></a> r2 &amp;= </span><span class=cFE>7</span><span class=cF0>;
<a name="l68"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l69"></a> </span><span class=cFD>ICZero</span><span class=cF0>(tmpi, </span><span class=cF3>REG_RAX</span><span class=cF0>);
<a name="l70"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xC80B00</span><span class=cF0> + i + r2 &lt;&lt; </span><span class=cFE>16</span><span class=cF0>);
<a name="l71"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0x0374</span><span class=cF0>);
<a name="l72"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xC0FF48</span><span class=cF0>);
<a name="l73"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
2021-07-03 05:07:57 +01:00
<a name="l74"></a>}
<a name="l75"></a>
<a name="l76"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICXorXor</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l77"></a>{
<a name="l78"></a> </span><span class=cF9>I64</span><span class=cF0> r2;
2021-07-03 05:07:57 +01:00
<a name="l79"></a>
<a name="l80"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi-&gt;arg2.type, tmpi-&gt;arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg2.disp, rip);
<a name="l81"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDF_REG</span><span class=cF7>)</span><span class=cF0>)
<a name="l82"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l83"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip);
<a name="l84"></a> r2 = </span><span class=cF3>REG_RDX</span><span class=cF0>;
<a name="l85"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l86"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l87"></a> r2 = tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>;
<a name="l88"></a> </span><span class=cFD>ICZero</span><span class=cF0>(tmpi, </span><span class=cF3>REG_RBX</span><span class=cF0>);
<a name="l89"></a> </span><span class=cFD>ICTest</span><span class=cF0>(tmpi, r2);
<a name="l90"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0x0374</span><span class=cF0>);
<a name="l91"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xC3FF48</span><span class=cF0>);
2021-07-03 05:07:57 +01:00
<a name="l92"></a>
<a name="l93"></a> </span><span class=cFD>ICZero</span><span class=cF0>(tmpi, </span><span class=cF3>REG_RAX</span><span class=cF0>);
<a name="l94"></a> </span><span class=cFD>ICTest</span><span class=cF0>(tmpi, </span><span class=cF3>REG_RCX</span><span class=cF0>);
<a name="l95"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0x0374</span><span class=cF0>);
<a name="l96"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xC0FF48</span><span class=cF0>);
2021-07-03 05:07:57 +01:00
<a name="l97"></a>
<a name="l98"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xC33348</span><span class=cF0>);
2021-07-03 05:07:57 +01:00
<a name="l99"></a>
<a name="l100"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
2021-07-03 05:07:57 +01:00
<a name="l101"></a>}
<a name="l102"></a>
<a name="l103"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICComp</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> us, </span><span class=cF9>I64</span><span class=cF0> is, </span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l104"></a>{
<a name="l105"></a> </span><span class=cF9>I64</span><span class=cF0> r1, d1, r2, i = </span><span class=cFE>0x48</span><span class=cF0>, j = tmpi-&gt;arg2.disp;
2021-07-03 05:07:57 +01:00
<a name="l106"></a>
<a name="l107"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg2.type &amp; </span><span class=cF3>MDF_IMM</span><span class=cF0> &amp;&amp; </span><span class=cF3>I32_MIN</span><span class=cF0> &lt;= j &lt;= </span><span class=cF3>I32_MAX</span><span class=cF0>)
<a name="l108"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l109"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>tmpi-&gt;ic_flags &amp; (</span><span class=cF3>ICF_POP_CMP</span><span class=cF0> | </span><span class=cF3>ICF_PUSH_CMP</span><span class=cF0>)</span><span class=cF7>)</span><span class=cF0> &amp;&amp;
<a name="l110"></a> tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDF_DISP</span><span class=cF0> &amp;&amp; </span><span class=cF2>//TODO</span><span class=cF0>
<a name="l111"></a> tmpi-&gt;arg1.type.raw_type &gt;= </span><span class=cF3>RT_I64</span><span class=cF0> &amp;&amp; tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0> != </span><span class=cF3>REG_RAX</span><span class=cF0>)
<a name="l112"></a> {
<a name="l113"></a> r1 = tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>;
<a name="l114"></a> d1 = tmpi-&gt;arg1.disp;
<a name="l115"></a> </span><span class=cFD>ICZero</span><span class=cF0>(tmpi, </span><span class=cF3>REG_RAX</span><span class=cF0>);
<a name="l116"></a> </span><span class=cF1>if</span><span class=cF0> (r1 &gt; </span><span class=cFE>7</span><span class=cF0>)
<a name="l117"></a> i++;
<a name="l118"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0> &lt;= j &lt;= </span><span class=cF3>I8_MAX</span><span class=cF0>)
<a name="l119"></a> i += </span><span class=cFE>0x388300</span><span class=cF0>;
<a name="l120"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l121"></a> i += </span><span class=cFE>0x388100</span><span class=cF0>;
<a name="l122"></a> </span><span class=cF1>if</span><span class=cF0> (!d1)
<a name="l123"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l124"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0x000000</span><span class=cF0> + i + </span><span class=cF7>(</span><span class=cF0>r1 &amp; </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> &lt;&lt; </span><span class=cFE>16</span><span class=cF0>);
<a name="l125"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l126"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0> &lt;= d1 &lt;= </span><span class=cF3>I8_MAX</span><span class=cF0>)
<a name="l127"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l128"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0x400000</span><span class=cF0> + i + </span><span class=cF7>(</span><span class=cF0>r1 &amp; </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> &lt;&lt; </span><span class=cFE>16</span><span class=cF0>);
<a name="l129"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, d1);
<a name="l130"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l131"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l132"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l133"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0x800000</span><span class=cF0> + i + </span><span class=cF7>(</span><span class=cF0>r1 &amp; </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> &lt;&lt; </span><span class=cFE>16</span><span class=cF0>);
<a name="l134"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, d1);
<a name="l135"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l136"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0> &lt;= j &lt;= </span><span class=cF3>I8_MAX</span><span class=cF0>)
<a name="l137"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, j);
<a name="l138"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l139"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, j);
<a name="l140"></a> }
<a name="l141"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l142"></a> {
<a name="l143"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_POP_CMP</span><span class=cF0>)
<a name="l144"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l145"></a> </span><span class=cFD>ICPopRegs</span><span class=cF0>(tmpi, </span><span class=cFE>1</span><span class=cF0> &lt;&lt; </span><span class=cF3>REG_RCX</span><span class=cF0>);
<a name="l146"></a> r1 = </span><span class=cF3>REG_RCX</span><span class=cF0>;
<a name="l147"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l148"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l149"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l150"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDF_REG</span><span class=cF0> &amp;&amp; tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0> != </span><span class=cF3>REG_RAX</span><span class=cF0>)
<a name="l151"></a> r1 = tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>;
<a name="l152"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l153"></a> {
<a name="l154"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip);
<a name="l155"></a> r1 = </span><span class=cF3>REG_RCX</span><span class=cF0>;
<a name="l156"></a> }
<a name="l157"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l158"></a> </span><span class=cFD>ICZero</span><span class=cF0>(tmpi, </span><span class=cF3>REG_RAX</span><span class=cF0>);
<a name="l159"></a> </span><span class=cF1>if</span><span class=cF0> (r1 &gt; </span><span class=cFE>7</span><span class=cF0>)
<a name="l160"></a> i++;
<a name="l161"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0> &lt;= j &lt;= </span><span class=cF3>I8_MAX</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
<a name="l162"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xF88300</span><span class=cF0> + i + </span><span class=cF7>(</span><span class=cF0>r1 &amp; </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> &lt;&lt; </span><span class=cFE>16</span><span class=cF0>);
<a name="l163"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, j);
<a name="l164"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l165"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l166"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l167"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xF88100</span><span class=cF0> + i + </span><span class=cF7>(</span><span class=cF0>r1 &amp; </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> &lt;&lt; </span><span class=cFE>16</span><span class=cF0>);
<a name="l168"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, j);
<a name="l169"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l170"></a> }
<a name="l171"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_PUSH_CMP</span><span class=cF0>)
<a name="l172"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_IMM</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, j, rip);
<a name="l173"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_class-&gt;raw_type &amp; </span><span class=cF3>RTF_UNSIGNED</span><span class=cF0> || tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_USE_UNSIGNED</span><span class=cF0>)
<a name="l174"></a> is = us;
<a name="l175"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0x300</span><span class=cF0> + is);
<a name="l176"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xC0FF48</span><span class=cF0>);
<a name="l177"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l178"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l179"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l180"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l181"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg2.type &amp; </span><span class=cF3>MDF_REG</span><span class=cF0> &amp;&amp; tmpi-&gt;arg2.</span><span class=cF1>reg</span><span class=cF0> != </span><span class=cF3>REG_RAX</span><span class=cF0>)
<a name="l182"></a> r2 = tmpi-&gt;arg2.</span><span class=cF1>reg</span><span class=cF0>;
<a name="l183"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l184"></a> {
<a name="l185"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi-&gt;arg2.type, tmpi-&gt;arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg2.disp, rip);
<a name="l186"></a> r2 = </span><span class=cF3>REG_RCX</span><span class=cF0>;
<a name="l187"></a> }
<a name="l188"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_POP_CMP</span><span class=cF0>)
<a name="l189"></a> {
<a name="l190"></a> </span><span class=cFD>ICPopRegs</span><span class=cF0>(tmpi, </span><span class=cFE>1</span><span class=cF0> &lt;&lt; </span><span class=cF3>REG_RDX</span><span class=cF0>);
<a name="l191"></a> r1 = </span><span class=cF3>REG_RDX</span><span class=cF0>;
<a name="l192"></a> }
<a name="l193"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l194"></a> {
<a name="l195"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDF_REG</span><span class=cF0> &amp;&amp; tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0> != </span><span class=cF3>REG_RAX</span><span class=cF0>)
<a name="l196"></a> r1 = tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>;
<a name="l197"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l198"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l199"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip);
<a name="l200"></a> r1 = </span><span class=cF3>REG_RDX</span><span class=cF0>;
<a name="l201"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l202"></a> }
<a name="l203"></a> </span><span class=cFD>ICZero</span><span class=cF0>(tmpi, </span><span class=cF3>REG_RAX</span><span class=cF0>);
<a name="l204"></a> </span><span class=cF1>if</span><span class=cF0> (r2 &gt; </span><span class=cFE>7</span><span class=cF0>)
<a name="l205"></a> i++;
<a name="l206"></a> </span><span class=cF1>if</span><span class=cF0> (r1 &gt; </span><span class=cFE>7</span><span class=cF0>)
<a name="l207"></a> i += </span><span class=cFE>4</span><span class=cF0>;
<a name="l208"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_PUSH_CMP</span><span class=cF0>)
<a name="l209"></a> </span><span class=cFD>ICPushRegs</span><span class=cF0>(tmpi, </span><span class=cFE>1</span><span class=cF0> &lt;&lt; r2);
<a name="l210"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xC03B00</span><span class=cF0> + i + </span><span class=cF7>(</span><span class=cF0>r2 &amp; </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> &lt;&lt; </span><span class=cFE>16</span><span class=cF0> + </span><span class=cF7>(</span><span class=cF0>r1 &amp; </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> &lt;&lt; </span><span class=cFE>19</span><span class=cF0>);
<a name="l211"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_class-&gt;raw_type &amp; </span><span class=cF3>RTF_UNSIGNED</span><span class=cF0> || tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_USE_UNSIGNED</span><span class=cF0>)
<a name="l212"></a> is = us;
<a name="l213"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0x300</span><span class=cF0> + is);
<a name="l214"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xC0FF48</span><span class=cF0>);
<a name="l215"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l216"></a> </span><span class=cF7>}</span><span class=cF0>
2021-07-03 05:07:57 +01:00
<a name="l217"></a>}
<a name="l218"></a>
<a name="l219"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICBitOps</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>CICArg</span><span class=cF0> *arg1, </span><span class=cF9>CICArg</span><span class=cF0> *arg2, </span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi2, </span><span class=cF9>I64</span><span class=cF0> op, </span><span class=cF9>I64</span><span class=cF0> op_imm, </span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l220"></a>{</span><span class=cF2>//TODO:not fully utilizing Modr</span><span class=cF0>
<a name="l221"></a> </span><span class=cF1>Bool</span><span class=cF0> res_not_used = </span><span class=cF5>ToBool</span><span class=cF0>(tmpi2-&gt;ic_flags &amp; </span><span class=cF3>ICF_RES_NOT_USED</span><span class=cF0>);
<a name="l222"></a> </span><span class=cF9>I64</span><span class=cF0> r1, t2, r2, d2, i = </span><span class=cFE>0x48</span><span class=cF0>;
2021-07-03 05:07:57 +01:00
<a name="l223"></a>
<a name="l224"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_BY_VAL</span><span class=cF0>)
<a name="l225"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l226"></a> t2 = arg2-&gt;type &amp; </span><span class=cF3>MDG_MASK</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>; </span><span class=cF2>//TODO: check overflow</span><span class=cF0>
<a name="l227"></a> r2 = arg2-&gt;</span><span class=cF1>reg</span><span class=cF0>;
<a name="l228"></a> d2 = arg2-&gt;disp;
<a name="l229"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>t2 &amp; </span><span class=cF3>MDG_REG_DISP_SIB_RIP</span><span class=cF7>)</span><span class=cF0> ||
<a name="l230"></a> !</span><span class=cF7>(</span><span class=cF0>r2.u8[</span><span class=cFE>0</span><span class=cF0>] != </span><span class=cF3>REG_RAX</span><span class=cF0> &amp;&amp;
<a name="l231"></a> (!</span><span class=cF7>(</span><span class=cF0>t2 &amp; </span><span class=cF3>MDF_SIB</span><span class=cF7>)</span><span class=cF0> ||
<a name="l232"></a> r2.u8[</span><span class=cFE>1</span><span class=cF0>] &amp; </span><span class=cFE>15</span><span class=cF0> != </span><span class=cF3>REG_RAX</span><span class=cF0>) ||
<a name="l233"></a> res_not_used</span><span class=cF7>)</span><span class=cF0>)
<a name="l234"></a> {
<a name="l235"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, t2, r2, d2, rip);
<a name="l236"></a> t2 = </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l237"></a> r2 = </span><span class=cF3>REG_RCX</span><span class=cF0>;
<a name="l238"></a> d2 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l239"></a> }
<a name="l240"></a> </span><span class=cF1>if</span><span class=cF0> (arg1-&gt;type &amp; </span><span class=cF3>MDF_REG</span><span class=cF0> &amp;&amp; </span><span class=cF7>(</span><span class=cF0>arg1-&gt;</span><span class=cF1>reg</span><span class=cF0> != </span><span class=cF3>REG_RAX</span><span class=cF0> || res_not_used</span><span class=cF7>)</span><span class=cF0>)
<a name="l241"></a> r1 = arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>;
<a name="l242"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>arg1-&gt;type &amp; </span><span class=cF3>MDF_IMM</span><span class=cF7>)</span><span class=cF0> || arg1-&gt;disp &gt; </span><span class=cFE>63</span><span class=cF0>)
<a name="l243"></a> {
<a name="l244"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, arg1-&gt;type, arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg1-&gt;disp, rip);
<a name="l245"></a> r1 = </span><span class=cF3>REG_RDX</span><span class=cF0>;
<a name="l246"></a> }
<a name="l247"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l248"></a> r1 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l249"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l250"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l251"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l252"></a> t2 = </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l253"></a> d2 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l254"></a> </span><span class=cF1>if</span><span class=cF0> (arg2-&gt;type &amp; </span><span class=cF3>MDF_REG</span><span class=cF0> &amp;&amp; </span><span class=cF7>(</span><span class=cF0>arg2-&gt;</span><span class=cF1>reg</span><span class=cF0> != </span><span class=cF3>REG_RAX</span><span class=cF0> || res_not_used</span><span class=cF7>)</span><span class=cF0>)
<a name="l255"></a> r2 = arg2-&gt;</span><span class=cF1>reg</span><span class=cF0>;
<a name="l256"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l257"></a> {
<a name="l258"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, arg2-&gt;type, arg2-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg2-&gt;disp, rip);
<a name="l259"></a> r2 = </span><span class=cF3>REG_RCX</span><span class=cF0>;
<a name="l260"></a> }
<a name="l261"></a> </span><span class=cF1>if</span><span class=cF0> (arg1-&gt;type &amp; </span><span class=cF3>MDF_REG</span><span class=cF0> &amp;&amp; </span><span class=cF7>(</span><span class=cF0>arg1-&gt;</span><span class=cF1>reg</span><span class=cF0> != </span><span class=cF3>REG_RAX</span><span class=cF0> || res_not_used</span><span class=cF7>)</span><span class=cF0>)
<a name="l262"></a> r1 = arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>;
<a name="l263"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>arg1-&gt;type &amp; </span><span class=cF3>MDF_IMM</span><span class=cF7>)</span><span class=cF0> || arg1-&gt;disp &gt; </span><span class=cFE>63</span><span class=cF0>)
<a name="l264"></a> {
<a name="l265"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, arg1-&gt;type, arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg1-&gt;disp, rip);
<a name="l266"></a> r1 = </span><span class=cF3>REG_RDX</span><span class=cF0>;
<a name="l267"></a> }
<a name="l268"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l269"></a> r1 = </span><span class=cFE>0</span><span class=cF0>;
<a name="l270"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l271"></a> </span><span class=cF1>if</span><span class=cF0> (!res_not_used)
<a name="l272"></a> </span><span class=cFD>ICZero</span><span class=cF0>(tmpi, </span><span class=cF3>REG_RAX</span><span class=cF0>);
<a name="l273"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_LOCK</span><span class=cF0> &amp;&amp; op != </span><span class=cFE>0xA30F</span><span class=cF0>)
<a name="l274"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cF3>OC_LOCK_PREFIX</span><span class=cF0>);
<a name="l275"></a> </span><span class=cF1>if</span><span class=cF0> (arg1-&gt;type &amp; </span><span class=cF3>MDF_IMM</span><span class=cF0> &amp;&amp; arg1-&gt;disp &lt; </span><span class=cFE>32</span><span class=cF0>)
<a name="l276"></a> t2 = t2 &amp; </span><span class=cF3>MDG_MASK</span><span class=cF0> + </span><span class=cF3>RT_U32</span><span class=cF0>;
<a name="l277"></a> i = </span><span class=cFD>ICModr1</span><span class=cF0>(r1, t2, r2, d2);
<a name="l278"></a> </span><span class=cFD>ICRex</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>1</span><span class=cF0>]);
<a name="l279"></a> </span><span class=cF1>if</span><span class=cF0> (arg1-&gt;type &amp; </span><span class=cF3>MDF_IMM</span><span class=cF0> &amp;&amp; arg1-&gt;disp &lt; </span><span class=cFE>64</span><span class=cF0>)
<a name="l280"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l281"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] &lt;&lt; </span><span class=cFE>16</span><span class=cF0> + op_imm);
<a name="l282"></a> </span><span class=cFD>ICModr2</span><span class=cF0>(tmpi, i,, d2, rip + </span><span class=cFE>1</span><span class=cF0>);
<a name="l283"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, arg1-&gt;disp);
<a name="l284"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l285"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l286"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l287"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] &lt;&lt; </span><span class=cFE>16</span><span class=cF0> + op);
<a name="l288"></a> </span><span class=cFD>ICModr2</span><span class=cF0>(tmpi, i,, d2, rip);
<a name="l289"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l290"></a> </span><span class=cF1>if</span><span class=cF0> (!res_not_used)
<a name="l291"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l292"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xC0920F</span><span class=cF0>); </span><span class=cF2>//SETC AL</span><span class=cF0>
<a name="l293"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;res.type.mode)
<a name="l294"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l295"></a> </span><span class=cF7>}</span><span class=cF0>
2021-07-03 05:07:57 +01:00
<a name="l296"></a>}
<a name="l297"></a>
<a name="l298"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICToUpper</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l299"></a>{
<a name="l300"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip);
<a name="l301"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, </span><span class=cFE>0x61F88348</span><span class=cF0>);
<a name="l302"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0x0A7C</span><span class=cF0>);
<a name="l303"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, </span><span class=cFE>0x7AF88348</span><span class=cF0>);
<a name="l304"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, </span><span class=cFE>0x047F</span><span class=cF0>);
<a name="l305"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, </span><span class=cFE>0xE0C08348</span><span class=cF0>);
2021-07-03 05:07:57 +01:00
<a name="l306"></a>}
<a name="l307"></a>
<a name="l308"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICToI64</span><span class=cF0>(</span><span class=cF9>CCompCtrl</span><span class=cF0> *cc, </span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l309"></a>{
<a name="l310"></a> </span><span class=cFD>ICFConvert</span><span class=cF0>(cc, tmpi, </span><span class=cF3>REG_RAX</span><span class=cF0>, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, </span><span class=cF3>TRUE</span><span class=cF0>, CN_INST, rip);
2021-07-03 05:07:57 +01:00
<a name="l311"></a>}
<a name="l312"></a>
<a name="l313"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICToF64</span><span class=cF0>(</span><span class=cF9>CCompCtrl</span><span class=cF0> *cc, </span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l314"></a>{
<a name="l315"></a> </span><span class=cFD>ICFConvert</span><span class=cF0>(cc, tmpi, </span><span class=cF3>REG_RAX</span><span class=cF0>, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, </span><span class=cF3>FALSE</span><span class=cF0>, CN_INST, rip);
2021-07-03 05:07:57 +01:00
<a name="l316"></a>}
<a name="l317"></a>
<a name="l318"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICToBool</span><span class=cF0>(</span><span class=cF9>CCompCtrl</span><span class=cF0> *, </span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l319"></a>{
<a name="l320"></a> </span><span class=cF9>I64</span><span class=cF0> r;
2021-07-03 05:07:57 +01:00
<a name="l321"></a>
<a name="l322"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDF_REG</span><span class=cF0>)
<a name="l323"></a> r = tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>;
<a name="l324"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l325"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l326"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip);
<a name="l327"></a> r = </span><span class=cF3>REG_RAX</span><span class=cF0>;
<a name="l328"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l329"></a> </span><span class=cFD>ICTest</span><span class=cF0>(tmpi, r);
<a name="l330"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xC0950F</span><span class=cF0>); </span><span class=cF2>//SETNZ AL</span><span class=cF0>
<a name="l331"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, </span><span class=cFE>0xC0B60F48</span><span class=cF0>); </span><span class=cF2>//MOVZX RAX,AL</span><span class=cF0>
2021-07-03 05:07:57 +01:00
<a name="l332"></a>}
<a name="l333"></a>
<a name="l334"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICPreIncDec</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> op, </span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l335"></a>{
<a name="l336"></a> </span><span class=cF9>I64</span><span class=cF0> r;
<a name="l337"></a> </span><span class=cF9>CHashClass</span><span class=cF0> *tmpc = tmpi-&gt;ic_class, *tmpc1 = tmpc - </span><span class=cFE>1</span><span class=cF0>;
2021-07-03 05:07:57 +01:00
<a name="l338"></a>
<a name="l339"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_BY_VAL</span><span class=cF0>)
<a name="l340"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l341"></a> </span><span class=cF1>if</span><span class=cF0> (tmpc-&gt;ptr_stars_count &amp;&amp; tmpc1-&gt;size != </span><span class=cFE>1</span><span class=cF0>)
<a name="l342"></a> {
<a name="l343"></a> </span><span class=cFD>ICAddSubEctImm</span><span class=cF0>(tmpi,
<a name="l344"></a> tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDG_MASK</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to,
<a name="l345"></a> tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp,
<a name="l346"></a> tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDG_MASK</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to,
<a name="l347"></a> tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp,
<a name="l348"></a> tmpc1-&gt;size, op.u16[</span><span class=cFE>3</span><span class=cF0>], rip);
<a name="l349"></a> }
<a name="l350"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l351"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDG_MASK</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to,
<a name="l352"></a> tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, op, rip);
2021-07-03 05:07:57 +01:00
<a name="l353"></a>
<a name="l354"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;res.type.mode)
<a name="l355"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp,
<a name="l356"></a> tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDG_MASK</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to,
<a name="l357"></a> tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip);
<a name="l358"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l359"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l360"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l361"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDF_REG</span><span class=cF0>)
<a name="l362"></a> r = tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>;
<a name="l363"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l364"></a> {
<a name="l365"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip);
<a name="l366"></a> r = </span><span class=cF3>REG_RCX</span><span class=cF0>;
<a name="l367"></a> }
<a name="l368"></a> </span><span class=cF1>if</span><span class=cF0> (tmpc-&gt;ptr_stars_count &amp;&amp; tmpc1-&gt;size != </span><span class=cFE>1</span><span class=cF0>)
<a name="l369"></a> {
<a name="l370"></a> </span><span class=cFD>ICAddSubEctImm</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to, r, </span><span class=cFE>0</span><span class=cF0>,
<a name="l371"></a> </span><span class=cF3>MDF_DISP</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to, r, </span><span class=cFE>0</span><span class=cF0>,
<a name="l372"></a> tmpc1-&gt;size, op.u16[</span><span class=cFE>3</span><span class=cF0>], rip);
<a name="l373"></a> }
<a name="l374"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l375"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to, r, </span><span class=cFE>0</span><span class=cF0>, op, rip);
<a name="l376"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;res.type.mode)
<a name="l377"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp, </span><span class=cF3>MDF_DISP</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to, r, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l378"></a> </span><span class=cF7>}</span><span class=cF0>
2021-07-03 05:07:57 +01:00
<a name="l379"></a>}
<a name="l380"></a>
<a name="l381"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICPostIncDec</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> op, </span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l382"></a>{
<a name="l383"></a> </span><span class=cF9>I64</span><span class=cF0> r;
<a name="l384"></a> </span><span class=cF9>CHashClass</span><span class=cF0> *tmpc = tmpi-&gt;ic_class, *tmpc1 = tmpc - </span><span class=cFE>1</span><span class=cF0>;
2021-07-03 05:07:57 +01:00
<a name="l385"></a>
<a name="l386"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_BY_VAL</span><span class=cF0>)
<a name="l387"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l388"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;res.type.mode)
<a name="l389"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp,
<a name="l390"></a> tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDG_MASK</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to,
<a name="l391"></a> tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip);
<a name="l392"></a> </span><span class=cF1>if</span><span class=cF0> (tmpc-&gt;ptr_stars_count &amp;&amp; tmpc1-&gt;size != </span><span class=cFE>1</span><span class=cF0>)
<a name="l393"></a> </span><span class=cFD>ICAddSubEctImm</span><span class=cF0>(tmpi,
<a name="l394"></a> tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDG_MASK</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to,
<a name="l395"></a> tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp,
<a name="l396"></a> tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDG_MASK</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to,
<a name="l397"></a> tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp,
<a name="l398"></a> tmpc1-&gt;size, op.u16[</span><span class=cFE>3</span><span class=cF0>], rip);
<a name="l399"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l400"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi,
<a name="l401"></a> tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDG_MASK</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to,
<a name="l402"></a> tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, op, rip);
<a name="l403"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l404"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l405"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l406"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDF_REG</span><span class=cF0> &amp;&amp; !</span><span class=cF7>(</span><span class=cF0>tmpi-&gt;res.type &amp; </span><span class=cF3>MDF_REG</span><span class=cF0> &amp;&amp; tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0> == tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF7>)</span><span class=cF0>)
<a name="l407"></a> r = tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>;
<a name="l408"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l409"></a> {
<a name="l410"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip);
<a name="l411"></a> r = </span><span class=cF3>REG_RCX</span><span class=cF0>;
<a name="l412"></a> }
<a name="l413"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;res.type.mode)
<a name="l414"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp, </span><span class=cF3>MDF_DISP</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to, r, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l415"></a> </span><span class=cF1>if</span><span class=cF0> (tmpc-&gt;ptr_stars_count &amp;&amp; tmpc1-&gt;size != </span><span class=cFE>1</span><span class=cF0>)
<a name="l416"></a> </span><span class=cFD>ICAddSubEctImm</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to, r, </span><span class=cFE>0</span><span class=cF0>,
<a name="l417"></a> </span><span class=cF3>MDF_DISP</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to, r, </span><span class=cFE>0</span><span class=cF0>, tmpc1-&gt;size, op.u16[</span><span class=cFE>3</span><span class=cF0>], rip);
<a name="l418"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l419"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to, r, </span><span class=cFE>0</span><span class=cF0>, op, rip);
<a name="l420"></a> </span><span class=cF7>}</span><span class=cF0>
2021-07-03 05:07:57 +01:00
<a name="l421"></a>}
<a name="l422"></a>
<a name="l423"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICDerefPostIncDec</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> op, </span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l424"></a>{
<a name="l425"></a> </span><span class=cF9>CICType</span><span class=cF0> t;
<a name="l426"></a> </span><span class=cF9>I64</span><span class=cF0> r;
<a name="l427"></a> </span><span class=cF9>CHashClass</span><span class=cF0> *tmpc1 = tmpi-&gt;ic_class;
2021-07-03 05:07:57 +01:00
<a name="l428"></a>
<a name="l429"></a> t = tmpi-&gt;res.type.raw_type;
<a name="l430"></a> </span><span class=cF1>if</span><span class=cF0> (t &gt; tmpi-&gt;arg1_type_pointed_to)
<a name="l431"></a> t = tmpi-&gt;arg1_type_pointed_to;
<a name="l432"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_BY_VAL</span><span class=cF0>)
<a name="l433"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l434"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDF_REG</span><span class=cF0>)
<a name="l435"></a> r = tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>;
<a name="l436"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l437"></a> {
<a name="l438"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>,
<a name="l439"></a> tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDG_MASK</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip);
<a name="l440"></a> r = </span><span class=cF3>REG_RDX</span><span class=cF0>;
<a name="l441"></a> }
<a name="l442"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp, </span><span class=cF3>MDF_DISP</span><span class=cF0> + t, r, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l443"></a> </span><span class=cF1>if</span><span class=cF0> (tmpc1-&gt;size != </span><span class=cFE>1</span><span class=cF0>)
<a name="l444"></a> </span><span class=cFD>ICAddSubEctImm</span><span class=cF0>(tmpi,
<a name="l445"></a> tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDG_MASK</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp,
<a name="l446"></a> tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDG_MASK</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp,
<a name="l447"></a> tmpc1-&gt;size, op.u16[</span><span class=cFE>3</span><span class=cF0>], rip);
<a name="l448"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l449"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDG_MASK</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>,
<a name="l450"></a> tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, op, rip);
<a name="l451"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l452"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l453"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l454"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDF_REG</span><span class=cF0>)
<a name="l455"></a> r = tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>;
<a name="l456"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l457"></a> {
<a name="l458"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>,
<a name="l459"></a> tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDG_MASK</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip);
<a name="l460"></a> r = </span><span class=cF3>REG_RCX</span><span class=cF0>;
<a name="l461"></a> }
<a name="l462"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l463"></a> </span><span class=cF1>if</span><span class=cF0> (tmpc1-&gt;size != </span><span class=cFE>1</span><span class=cF0>)
<a name="l464"></a> </span><span class=cFD>ICAddSubEctImm</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r, </span><span class=cFE>0</span><span class=cF0>, tmpc1-&gt;size, op.u16[</span><span class=cFE>3</span><span class=cF0>], rip);
<a name="l465"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l466"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r, </span><span class=cFE>0</span><span class=cF0>, op, rip);
<a name="l467"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp, </span><span class=cF3>MDF_DISP</span><span class=cF0> + t, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l468"></a> </span><span class=cF7>}</span><span class=cF0>
2021-07-03 05:07:57 +01:00
<a name="l469"></a>}
<a name="l470"></a>
<a name="l471"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICAssignPostIncDec</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> op, </span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l472"></a>{
<a name="l473"></a> </span><span class=cF9>CHashClass</span><span class=cF0> *tmpc1 = tmpi-&gt;ic_class2 - </span><span class=cFE>1</span><span class=cF0>;
<a name="l474"></a> </span><span class=cF9>I64</span><span class=cF0> r;
2021-07-03 05:07:57 +01:00
<a name="l475"></a>
<a name="l476"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_BY_VAL</span><span class=cF0>)
<a name="l477"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l478"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDF_REG</span><span class=cF0>)
<a name="l479"></a> r = tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>;
<a name="l480"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l481"></a> {
<a name="l482"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>,
<a name="l483"></a> tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDG_MASK</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip);
<a name="l484"></a> r = </span><span class=cF3>REG_RDX</span><span class=cF0>;
<a name="l485"></a> }
<a name="l486"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to, r, </span><span class=cFE>0</span><span class=cF0>, tmpi-&gt;arg2.type, tmpi-&gt;arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg2.disp, rip);
<a name="l487"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;res.type.mode)
<a name="l488"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp, tmpi-&gt;arg2.type, tmpi-&gt;arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg2.disp, rip);
<a name="l489"></a> </span><span class=cF1>if</span><span class=cF0> (tmpc1-&gt;size != </span><span class=cFE>1</span><span class=cF0> || tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDF_STACK</span><span class=cF0>)
<a name="l490"></a> </span><span class=cFD>ICAddSubEctImm</span><span class=cF0>(tmpi, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp,
<a name="l491"></a> </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, r, </span><span class=cFE>0</span><span class=cF0>, tmpc1-&gt;size, op.u16[</span><span class=cFE>3</span><span class=cF0>], rip);
<a name="l492"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l493"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, op, rip);
<a name="l494"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l495"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l496"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l497"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip);
<a name="l498"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, rip);
<a name="l499"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + tmpi-&gt;arg1_type_pointed_to, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi-&gt;arg2.type, tmpi-&gt;arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg2.disp, rip);
<a name="l500"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;res.type.mode)
<a name="l501"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp, tmpi-&gt;arg2.type, tmpi-&gt;arg2.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg2.disp, rip);
<a name="l502"></a> </span><span class=cF1>if</span><span class=cF0> (tmpc1-&gt;size != </span><span class=cFE>1</span><span class=cF0>)
<a name="l503"></a> </span><span class=cFD>ICAddSubEctImm</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpc1-&gt;size, op.u16[</span><span class=cFE>3</span><span class=cF0>], rip);
<a name="l504"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l505"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_DISP</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, op, rip);
<a name="l506"></a> </span><span class=cF7>}</span><span class=cF0>
2021-07-03 05:07:57 +01:00
<a name="l507"></a>}
<a name="l508"></a>
<a name="l509"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICCompAndBranch</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF1>Bool</span><span class=cF0> has_res, </span><span class=cF9>I64</span><span class=cF0> rip, </span><span class=cF9>I64</span><span class=cF0> us, </span><span class=cF9>I64</span><span class=cF0> is, </span><span class=cF9>I64</span><span class=cF0> not_us, </span><span class=cF9>I64</span><span class=cF0> not_is, </span><span class=cF1>U8</span><span class=cF0> *buf, </span><span class=cF9>I64</span><span class=cF0> rip2)
<a name="l510"></a>{
<a name="l511"></a> </span><span class=cF9>I64</span><span class=cF0> r1, r2, i = </span><span class=cFE>0x48</span><span class=cF0>, j, res_reg;
<a name="l512"></a> </span><span class=cF9>CICType</span><span class=cF0> t1, t2;
<a name="l513"></a> </span><span class=cF1>Bool</span><span class=cF0> short_jmp, swap, done;
<a name="l514"></a> </span><span class=cF9>CCodeMisc</span><span class=cF0> *lb;
<a name="l515"></a> </span><span class=cF9>CICArg</span><span class=cF0> *arg1 = &amp;tmpi-&gt;arg1, *arg2 = &amp;tmpi-&gt;arg2;
2021-07-03 05:07:57 +01:00
<a name="l516"></a>
<a name="l517"></a> j = arg1-&gt;disp;
<a name="l518"></a> </span><span class=cF1>if</span><span class=cF0> (arg1-&gt;type &amp; </span><span class=cF3>MDF_IMM</span><span class=cF0> &amp;&amp; </span><span class=cF3>I32_MIN</span><span class=cF0> &lt;= j &lt;= </span><span class=cF3>I32_MAX</span><span class=cF0>)
<a name="l519"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l520"></a> </span><span class=cF5>SwapI64</span><span class=cF0>(&amp;arg1, &amp;arg2);
<a name="l521"></a> swap = </span><span class=cF3>TRUE</span><span class=cF0>;
<a name="l522"></a> us = not_us;
<a name="l523"></a> is = not_is;
<a name="l524"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l525"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l526"></a> swap = </span><span class=cF3>FALSE</span><span class=cF0>;
<a name="l527"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_class-&gt;raw_type &amp; </span><span class=cF3>RTF_UNSIGNED</span><span class=cF0> || tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_USE_UNSIGNED</span><span class=cF0>)
<a name="l528"></a> is = us;
2021-07-03 05:07:57 +01:00
<a name="l529"></a>
<a name="l530"></a> j = arg2-&gt;disp;
<a name="l531"></a> </span><span class=cF1>if</span><span class=cF0> (arg2-&gt;type &amp; </span><span class=cF3>MDF_IMM</span><span class=cF0> &amp;&amp; </span><span class=cF3>I32_MIN</span><span class=cF0> &lt;= j &lt;= </span><span class=cF3>I32_MAX</span><span class=cF0>)
<a name="l532"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l533"></a> </span><span class=cF1>if</span><span class=cF0> (!has_res &amp;&amp; arg1-&gt;type &amp; </span><span class=cF3>MDG_REG_DISP_SIB_RIP</span><span class=cF0>)
<a name="l534"></a> </span><span class=cFD>ICAddSubEctImm</span><span class=cF0>(tmpi, arg1-&gt;type, arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg1-&gt;disp, arg1-&gt;type, arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg1-&gt;disp, j, </span><span class=cFE>0x073B</span><span class=cF0>, rip2);
<a name="l535"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l536"></a> {
<a name="l537"></a> </span><span class=cF1>if</span><span class=cF0> (arg1-&gt;type &amp; </span><span class=cF3>MDF_REG</span><span class=cF0>)
<a name="l538"></a> r1 = arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>;
<a name="l539"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l540"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l541"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RDX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, arg1-&gt;type, arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg1-&gt;disp, rip2);
<a name="l542"></a> r1 = </span><span class=cF3>REG_RDX</span><span class=cF0>;
<a name="l543"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l544"></a> </span><span class=cF1>if</span><span class=cF0> (!j)
<a name="l545"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l546"></a> </span><span class=cF1>if</span><span class=cF0> (is.u8[</span><span class=cFE>2</span><span class=cF0>] == </span><span class=cFE>0x7C</span><span class=cF0>)
<a name="l547"></a> {
<a name="l548"></a> </span><span class=cFD>ICTest</span><span class=cF0>(tmpi, r1);
<a name="l549"></a> is = </span><span class=cFE>0x78880F</span><span class=cF0>;
<a name="l550"></a> }
<a name="l551"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (is.u8[</span><span class=cFE>2</span><span class=cF0>] == </span><span class=cFE>0x7D</span><span class=cF0>)
<a name="l552"></a> {
<a name="l553"></a> </span><span class=cFD>ICTest</span><span class=cF0>(tmpi, r1);
<a name="l554"></a> is = </span><span class=cFE>0x79890F</span><span class=cF0>;
<a name="l555"></a> }
<a name="l556"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (is.u8[</span><span class=cFE>2</span><span class=cF0>] == </span><span class=cFE>0x74</span><span class=cF0> || is.u8[</span><span class=cFE>2</span><span class=cF0>] == </span><span class=cFE>0x75</span><span class=cF0>)
<a name="l557"></a> </span><span class=cFD>ICTest</span><span class=cF0>(tmpi, r1);
<a name="l558"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l559"></a> {
<a name="l560"></a> </span><span class=cF1>if</span><span class=cF0> (r1 &gt; </span><span class=cFE>7</span><span class=cF0>)
<a name="l561"></a> i++;
<a name="l562"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xF88300</span><span class=cF0> + i + </span><span class=cF7>(</span><span class=cF0>r1 &amp; </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> &lt;&lt; </span><span class=cFE>16</span><span class=cF0>);
<a name="l563"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, j);
<a name="l564"></a> }
<a name="l565"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l566"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l567"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l568"></a> </span><span class=cF1>if</span><span class=cF0> (r1 &gt; </span><span class=cFE>7</span><span class=cF0>)
<a name="l569"></a> i++;
<a name="l570"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0> &lt;= j &lt;= </span><span class=cF3>I8_MAX</span><span class=cF0>)
<a name="l571"></a> {
<a name="l572"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xF88300</span><span class=cF0> + i + </span><span class=cF7>(</span><span class=cF0>r1 &amp; </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> &lt;&lt; </span><span class=cFE>16</span><span class=cF0>);
<a name="l573"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, j);
<a name="l574"></a> }
<a name="l575"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l576"></a> {
<a name="l577"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xF88100</span><span class=cF0> + i + </span><span class=cF7>(</span><span class=cF0>r1 &amp; </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> &lt;&lt; </span><span class=cFE>16</span><span class=cF0>);
<a name="l578"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, j);
<a name="l579"></a> }
<a name="l580"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l581"></a> }
<a name="l582"></a> </span><span class=cF1>if</span><span class=cF0> (has_res)
<a name="l583"></a> {
<a name="l584"></a> </span><span class=cF1>if</span><span class=cF0> (!swap)
<a name="l585"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l586"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, </span><span class=cF3>MDF_IMM</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, j, rip2);
<a name="l587"></a> res_reg = </span><span class=cF3>REG_RCX</span><span class=cF0>;
<a name="l588"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l589"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l590"></a> res_reg = r1;
<a name="l591"></a> }
<a name="l592"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l593"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l594"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l595"></a> done = </span><span class=cF3>FALSE</span><span class=cF0>;
<a name="l596"></a> t1 = arg1-&gt;type;
<a name="l597"></a> r1 = arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>;
<a name="l598"></a> r2 = arg2-&gt;</span><span class=cF1>reg</span><span class=cF0>;
<a name="l599"></a> t2 = arg2-&gt;type;
<a name="l600"></a> </span><span class=cF1>if</span><span class=cF0> (t2.raw_type &gt;= </span><span class=cF3>RT_I64</span><span class=cF0> &amp;&amp; !has_res &amp;&amp; t2 &amp; </span><span class=cF3>MDG_DISP_SIB_RIP</span><span class=cF0>)
<a name="l601"></a> {
<a name="l602"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>t1 &amp; </span><span class=cF3>MDF_REG</span><span class=cF7>)</span><span class=cF0> || t1.raw_type &lt; </span><span class=cF3>RT_I64</span><span class=cF0>)
<a name="l603"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l604"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, arg1-&gt;type, arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg1-&gt;disp, rip2);
<a name="l605"></a> r1 = </span><span class=cF3>REG_RAX</span><span class=cF0>;
<a name="l606"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l607"></a> i = </span><span class=cFD>ICModr1</span><span class=cF0>(r1, t2, r2, arg2-&gt;disp);
<a name="l608"></a> </span><span class=cFD>ICRex</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>1</span><span class=cF0>]);
<a name="l609"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] &lt;&lt; </span><span class=cFE>8</span><span class=cF0> + </span><span class=cFE>0x3B</span><span class=cF0>);
<a name="l610"></a> </span><span class=cFD>ICModr2</span><span class=cF0>(tmpi, i,, arg2-&gt;disp, rip2);
<a name="l611"></a> done = </span><span class=cF3>TRUE</span><span class=cF0>;
<a name="l612"></a> }
<a name="l613"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (t1.raw_type &gt;= </span><span class=cF3>RT_I64</span><span class=cF0> &amp;&amp; t1 &amp; </span><span class=cF3>MDG_REG_DISP_SIB_RIP</span><span class=cF0>)
<a name="l614"></a> {
<a name="l615"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>t2 &amp; </span><span class=cF3>MDF_REG</span><span class=cF7>)</span><span class=cF0> || t2.raw_type &lt; </span><span class=cF3>RT_I64</span><span class=cF0>)
<a name="l616"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l617"></a> </span><span class=cF1>if</span><span class=cF0> (t1 &amp; </span><span class=cF3>MDF_REG</span><span class=cF0> &amp;&amp; r1 == </span><span class=cF3>REG_RAX</span><span class=cF0>)
<a name="l618"></a> {
<a name="l619"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, arg2-&gt;type, arg2-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg2-&gt;disp, rip2);
<a name="l620"></a> r2 = </span><span class=cF3>REG_RCX</span><span class=cF0>;
<a name="l621"></a> }
<a name="l622"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l623"></a> {
<a name="l624"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, arg2-&gt;type, arg2-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg2-&gt;disp, rip2);
<a name="l625"></a> r2 = </span><span class=cF3>REG_RAX</span><span class=cF0>;
<a name="l626"></a> }
<a name="l627"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l628"></a> i = </span><span class=cFD>ICModr1</span><span class=cF0>(r2, t1, r1, arg1-&gt;disp);
<a name="l629"></a> </span><span class=cFD>ICRex</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>1</span><span class=cF0>]);
<a name="l630"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] &lt;&lt; </span><span class=cFE>8</span><span class=cF0> + </span><span class=cFE>0x39</span><span class=cF0>);
<a name="l631"></a> </span><span class=cFD>ICModr2</span><span class=cF0>(tmpi, i,, arg1-&gt;disp, rip2);
<a name="l632"></a> </span><span class=cF1>if</span><span class=cF0> (has_res)
<a name="l633"></a> res_reg = r2;
<a name="l634"></a> done = </span><span class=cF3>TRUE</span><span class=cF0>;
<a name="l635"></a> }
<a name="l636"></a> </span><span class=cF1>if</span><span class=cF0> (!done)
<a name="l637"></a> {
<a name="l638"></a> </span><span class=cF1>if</span><span class=cF0> (arg2-&gt;type &amp; </span><span class=cF3>MDF_REG</span><span class=cF0>)
<a name="l639"></a> r2 = arg2-&gt;</span><span class=cF1>reg</span><span class=cF0>;
<a name="l640"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l641"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l642"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, arg2-&gt;type, arg2-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg2-&gt;disp, rip2);
<a name="l643"></a> r2 = </span><span class=cF3>REG_RAX</span><span class=cF0>;
<a name="l644"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l645"></a> </span><span class=cF1>if</span><span class=cF0> (arg1-&gt;type &amp; </span><span class=cF3>MDF_REG</span><span class=cF0>)
<a name="l646"></a> r1 = arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>;
<a name="l647"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l648"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l649"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RCX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, arg1-&gt;type, arg1-&gt;</span><span class=cF1>reg</span><span class=cF0>, arg1-&gt;disp, rip2);
<a name="l650"></a> r1 = </span><span class=cF3>REG_RCX</span><span class=cF0>;
<a name="l651"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l652"></a> </span><span class=cF1>if</span><span class=cF0> (r2 &gt; </span><span class=cFE>7</span><span class=cF0>)
<a name="l653"></a> i++;
<a name="l654"></a> </span><span class=cF1>if</span><span class=cF0> (r1 &gt; </span><span class=cFE>7</span><span class=cF0>)
<a name="l655"></a> i += </span><span class=cFE>4</span><span class=cF0>;
<a name="l656"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi, </span><span class=cFE>0xC03B00</span><span class=cF0> + i + </span><span class=cF7>(</span><span class=cF0>r2 &amp; </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> &lt;&lt; </span><span class=cFE>16</span><span class=cF0> + </span><span class=cF7>(</span><span class=cF0>r1 &amp; </span><span class=cFE>7</span><span class=cF7>)</span><span class=cF0> &lt;&lt; </span><span class=cFE>19</span><span class=cF0>);
<a name="l657"></a> </span><span class=cF1>if</span><span class=cF0> (has_res)
<a name="l658"></a> res_reg = r2;
<a name="l659"></a> }
<a name="l660"></a> </span><span class=cF7>}</span><span class=cF0>
2021-07-03 05:07:57 +01:00
<a name="l661"></a>
<a name="l662"></a> rip += tmpi-&gt;ic_count;
<a name="l663"></a> lb = </span><span class=cFD>OptLabelFwd</span><span class=cF0>(tmpi-&gt;ic_data);
<a name="l664"></a> short_jmp = </span><span class=cF5>ToBool</span><span class=cF0>(tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_SHORT_JMP</span><span class=cF0>);
<a name="l665"></a> </span><span class=cF1>if</span><span class=cF0> (!buf &amp;&amp; lb-&gt;addr != </span><span class=cF3>INVALID_PTR</span><span class=cF0>)
<a name="l666"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l667"></a> i = lb-&gt;addr - (rip + </span><span class=cFE>2</span><span class=cF0>);
<a name="l668"></a> </span><span class=cF1>if</span><span class=cF0> (lb-&gt;flags &amp; </span><span class=cF3>CMF_POP_CMP</span><span class=cF0>)
<a name="l669"></a> {
<a name="l670"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_PUSH_CMP</span><span class=cF0>)
<a name="l671"></a> i += </span><span class=cFE>4</span><span class=cF0>;
<a name="l672"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l673"></a> i += </span><span class=cFE>8</span><span class=cF0>;
<a name="l674"></a> }
<a name="l675"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0> &lt;= i &lt;= </span><span class=cF3>I8_MAX</span><span class=cF0>)
<a name="l676"></a> short_jmp = </span><span class=cF3>TRUE</span><span class=cF0>;
<a name="l677"></a> </span><span class=cF7>}</span><span class=cF0>
2021-07-03 05:07:57 +01:00
<a name="l678"></a>
<a name="l679"></a> </span><span class=cF1>if</span><span class=cF0> (short_jmp)
<a name="l680"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l681"></a> tmpi-&gt;ic_flags |= </span><span class=cF3>ICF_SHORT_JMP</span><span class=cF0>;
<a name="l682"></a> i = lb-&gt;addr - (rip + </span><span class=cFE>2</span><span class=cF0>);
<a name="l683"></a> </span><span class=cF1>if</span><span class=cF0> (lb-&gt;flags &amp; </span><span class=cF3>CMF_POP_CMP</span><span class=cF0>)
<a name="l684"></a> {
<a name="l685"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_PUSH_CMP</span><span class=cF0>)
<a name="l686"></a> i += </span><span class=cFE>4</span><span class=cF0>;
<a name="l687"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l688"></a> i += </span><span class=cFE>8</span><span class=cF0>;
<a name="l689"></a> }
<a name="l690"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, i &lt;&lt; </span><span class=cFE>8</span><span class=cF0> + is.u8[</span><span class=cFE>2</span><span class=cF0>]);
<a name="l691"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l692"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l693"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l694"></a> tmpi-&gt;ic_flags &amp;= ~</span><span class=cF3>ICF_SHORT_JMP</span><span class=cF0>;
<a name="l695"></a> i = lb-&gt;addr - (rip + </span><span class=cFE>6</span><span class=cF0>);
<a name="l696"></a> </span><span class=cF1>if</span><span class=cF0> (lb-&gt;flags &amp; </span><span class=cF3>CMF_POP_CMP</span><span class=cF0>)
<a name="l697"></a> {
<a name="l698"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_PUSH_CMP</span><span class=cF0>)
<a name="l699"></a> i += </span><span class=cFE>4</span><span class=cF0>;
<a name="l700"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l701"></a> i += </span><span class=cFE>8</span><span class=cF0>;
<a name="l702"></a> }
<a name="l703"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, is.u16[</span><span class=cFE>0</span><span class=cF0>]);
<a name="l704"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, i);
<a name="l705"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l706"></a> </span><span class=cF1>if</span><span class=cF0> (has_res)
<a name="l707"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, tmpi-&gt;res.type, tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;res.disp, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, res_reg, </span><span class=cFE>0</span><span class=cF0>, rip2);
2021-07-03 05:07:57 +01:00
<a name="l708"></a>}
<a name="l709"></a>
<a name="l710"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICTestAndBranch</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip, </span><span class=cF9>I64</span><span class=cF0> is, </span><span class=cF1>U8</span><span class=cF0> *buf, </span><span class=cF9>I64</span><span class=cF0> rip2)
<a name="l711"></a>{
<a name="l712"></a> </span><span class=cF9>I64</span><span class=cF0> i;
<a name="l713"></a> </span><span class=cF1>Bool</span><span class=cF0> short_jmp;
<a name="l714"></a> </span><span class=cF9>CCodeMisc</span><span class=cF0> *lb;
2021-07-03 05:07:57 +01:00
<a name="l715"></a>
<a name="l716"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDF_REG</span><span class=cF7>)</span><span class=cF0>)
<a name="l717"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l718"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg1.type.raw_type &lt;= </span><span class=cF3>RT_U8</span><span class=cF0> &amp;&amp; tmpi-&gt;arg1.type &amp; </span><span class=cF3>MDG_DISP_SIB_RIP</span><span class=cF0>)
<a name="l719"></a> {
<a name="l720"></a> i = </span><span class=cFD>ICModr1</span><span class=cF0>(tmpi, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp);
<a name="l721"></a> </span><span class=cFD>ICRex</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>1</span><span class=cF0>]);
<a name="l722"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, i.u8[</span><span class=cFE>2</span><span class=cF0>] &lt;&lt; </span><span class=cFE>8</span><span class=cF0> + </span><span class=cFE>0xF6</span><span class=cF0>);
<a name="l723"></a> </span><span class=cFD>ICModr2</span><span class=cF0>(tmpi, i,, tmpi-&gt;arg1.disp, rip2 + </span><span class=cFE>1</span><span class=cF0>);
<a name="l724"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi, </span><span class=cFE>0xFF</span><span class=cF0>);
<a name="l725"></a> }
<a name="l726"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l727"></a> {
<a name="l728"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi, </span><span class=cF3>MDF_REG</span><span class=cF0> + </span><span class=cF3>RT_I64</span><span class=cF0>, </span><span class=cF3>REG_RAX</span><span class=cF0>, </span><span class=cFE>0</span><span class=cF0>, tmpi-&gt;arg1.type, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>, tmpi-&gt;arg1.disp, rip2);
<a name="l729"></a> </span><span class=cFD>ICTest</span><span class=cF0>(tmpi, </span><span class=cF3>REG_RAX</span><span class=cF0>);
<a name="l730"></a> }
<a name="l731"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l732"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l733"></a> </span><span class=cFD>ICTest</span><span class=cF0>(tmpi, tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>);
2021-07-03 05:07:57 +01:00
<a name="l734"></a>
<a name="l735"></a> rip += tmpi-&gt;ic_count;
<a name="l736"></a> lb = </span><span class=cFD>OptLabelFwd</span><span class=cF0>(tmpi-&gt;ic_data);
<a name="l737"></a> short_jmp = </span><span class=cF5>ToBool</span><span class=cF0>(tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_SHORT_JMP</span><span class=cF0>);
<a name="l738"></a> </span><span class=cF1>if</span><span class=cF0> (!buf &amp;&amp; lb-&gt;addr != </span><span class=cF3>INVALID_PTR</span><span class=cF0>)
<a name="l739"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l740"></a> i = lb-&gt;addr - (rip + </span><span class=cFE>2</span><span class=cF0>);
<a name="l741"></a> </span><span class=cF1>if</span><span class=cF0> (lb-&gt;flags &amp; </span><span class=cF3>CMF_POP_CMP</span><span class=cF0>)
<a name="l742"></a> i += </span><span class=cFE>8</span><span class=cF0>;
<a name="l743"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0> &lt;= i &lt;= </span><span class=cF3>I8_MAX</span><span class=cF0>)
<a name="l744"></a> short_jmp = </span><span class=cF3>TRUE</span><span class=cF0>;
<a name="l745"></a> </span><span class=cF7>}</span><span class=cF0>
2021-07-03 05:07:57 +01:00
<a name="l746"></a>
<a name="l747"></a> </span><span class=cF1>if</span><span class=cF0> (short_jmp)
<a name="l748"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l749"></a> tmpi-&gt;ic_flags |= </span><span class=cF3>ICF_SHORT_JMP</span><span class=cF0>;
<a name="l750"></a> i = lb-&gt;addr - (rip + </span><span class=cFE>2</span><span class=cF0>);
<a name="l751"></a> </span><span class=cF1>if</span><span class=cF0> (lb-&gt;flags &amp; </span><span class=cF3>CMF_POP_CMP</span><span class=cF0>)
<a name="l752"></a> i += </span><span class=cFE>8</span><span class=cF0>;
<a name="l753"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, i &lt;&lt; </span><span class=cFE>8</span><span class=cF0> + is.u8[</span><span class=cFE>2</span><span class=cF0>]);
<a name="l754"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l755"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l756"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l757"></a> tmpi-&gt;ic_flags &amp;= ~</span><span class=cF3>ICF_SHORT_JMP</span><span class=cF0>;
<a name="l758"></a> i = lb-&gt;addr - (rip + </span><span class=cFE>6</span><span class=cF0>);
<a name="l759"></a> </span><span class=cF1>if</span><span class=cF0> (lb-&gt;flags &amp; </span><span class=cF3>CMF_POP_CMP</span><span class=cF0>)
<a name="l760"></a> i += </span><span class=cFE>8</span><span class=cF0>;
<a name="l761"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, is.u16[</span><span class=cFE>0</span><span class=cF0>]);
<a name="l762"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, i);
<a name="l763"></a> </span><span class=cF7>}</span><span class=cF0>
2021-07-03 05:07:57 +01:00
<a name="l764"></a>}
<a name="l765"></a>
<a name="l766"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICFlagBranch</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi, </span><span class=cF9>I64</span><span class=cF0> rip, </span><span class=cF9>I64</span><span class=cF0> is, </span><span class=cF1>U8</span><span class=cF0> *buf)
<a name="l767"></a>{
<a name="l768"></a> </span><span class=cF9>I64</span><span class=cF0> i;
<a name="l769"></a> </span><span class=cF1>Bool</span><span class=cF0> short_jmp;
<a name="l770"></a> </span><span class=cF9>CCodeMisc</span><span class=cF0> *lb;
2021-07-03 05:07:57 +01:00
<a name="l771"></a>
<a name="l772"></a> rip += tmpi-&gt;ic_count;
<a name="l773"></a> lb = </span><span class=cFD>OptLabelFwd</span><span class=cF0>(tmpi-&gt;ic_data);
<a name="l774"></a> short_jmp = </span><span class=cF5>ToBool</span><span class=cF0>(tmpi-&gt;ic_flags &amp; </span><span class=cF3>ICF_SHORT_JMP</span><span class=cF0>);
<a name="l775"></a> </span><span class=cF1>if</span><span class=cF0> (!buf &amp;&amp; lb-&gt;addr != </span><span class=cF3>INVALID_PTR</span><span class=cF0>)
<a name="l776"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l777"></a> i = lb-&gt;addr - (rip + </span><span class=cFE>2</span><span class=cF0>);
<a name="l778"></a> </span><span class=cF1>if</span><span class=cF0> (lb-&gt;flags &amp; </span><span class=cF3>CMF_POP_CMP</span><span class=cF0>)
<a name="l779"></a> i += </span><span class=cFE>8</span><span class=cF0>;
<a name="l780"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0> &lt;= i &lt;= </span><span class=cF3>I8_MAX</span><span class=cF0>)
<a name="l781"></a> short_jmp = </span><span class=cF3>TRUE</span><span class=cF0>;
<a name="l782"></a> </span><span class=cF7>}</span><span class=cF0>
2021-07-03 05:07:57 +01:00
<a name="l783"></a>
<a name="l784"></a> </span><span class=cF1>if</span><span class=cF0> (short_jmp)
<a name="l785"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l786"></a> tmpi-&gt;ic_flags |= </span><span class=cF3>ICF_SHORT_JMP</span><span class=cF0>;
<a name="l787"></a> i = lb-&gt;addr - (rip + </span><span class=cFE>2</span><span class=cF0>);
<a name="l788"></a> </span><span class=cF1>if</span><span class=cF0> (lb-&gt;flags &amp; </span><span class=cF3>CMF_POP_CMP</span><span class=cF0>)
<a name="l789"></a> i += </span><span class=cFE>8</span><span class=cF0>;
<a name="l790"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, i &lt;&lt; </span><span class=cFE>8</span><span class=cF0> + is.u8[</span><span class=cFE>2</span><span class=cF0>]);
<a name="l791"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l792"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l793"></a> </span><span class=cF7>{</span><span class=cF0>
<a name="l794"></a> tmpi-&gt;ic_flags &amp;= ~</span><span class=cF3>ICF_SHORT_JMP</span><span class=cF0>;
<a name="l795"></a> i = lb-&gt;addr - (rip + </span><span class=cFE>6</span><span class=cF0>);
<a name="l796"></a> </span><span class=cF1>if</span><span class=cF0> (lb-&gt;flags &amp; </span><span class=cF3>CMF_POP_CMP</span><span class=cF0>)
<a name="l797"></a> i += </span><span class=cFE>8</span><span class=cF0>;
<a name="l798"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi, is.u16[</span><span class=cFE>0</span><span class=cF0>]);
<a name="l799"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi, i);
<a name="l800"></a> </span><span class=cF7>}</span><span class=cF0>
2021-07-03 05:07:57 +01:00
<a name="l801"></a>}
</span></pre></body>
</html>